Datasheet ML63187, ML63189B Datasheet (OKI)

Page 1
E2E0053-59-71
¡ Semiconductor ML63187/63189B
¡ Semiconductor
This version: Jul. 1999
Previous version: Mar. 1999
ML63187/63189B
4-Bit Microcontroller with Built-in 1024-Dot Matrix LCD Drivers and Melody Circuit, Operating at 0.9 V (Min.)
GENERAL DESCRIPTION
The ML63187/63189B is a CMOS 4-bit microcontroller with built-in 1024-dot matrix LCD drivers and operates at 0.9 V (min.). The ML63187/63189B is suitable for applications such as games, toys, watches, etc. which are provided with an LCD display. The ML63187/63189B is an M6318x series mask ROM-version product of OLMS-63K family, which employs Oki's original CPU core nX-4/250.
• Rich instruction set 408 instructions
Transfer, rotate, increment/decrement, arithmetic operations, comparison, logic operations, mask operations, bit operations, ROM table reference, stack operations, flag operations, branch, conditional branch, call/return, control.
• Rich selection of addressing modes Indirect addressing of four data memory types, with current bank register, extra bank register, HL register and XY register. Data memory bank internal direct addressing mode.
• Processing speed Two clocks per machine cycle, with most instructions executed in one machine cycle. Minimum instruction execution time : 61 ms (@ 32.768 kHz system clock)
1 ms (@ 2 MHz system clock)
• Clock generation circuit Low-speed clock : Crystal oscillation or RC oscillation selected with
mask option (30 to 80 kHz)
High-speed clock : Ceramic oscillation or RC oscillation selected with
software (2 MHz max.)
• Program memory space
• ML63187 : 16K words
• ML63189B : 32K words Basic instruction length is 16 bits/1 word
• Data memory space
• ML63187 : 1024 nibbles
• ML63189B : 1536 nibbles
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¡ Semiconductor ML63187/63189B
• Stack level Call stack level : 16 levels Register stack level : 16 levels
• I/O ports Input ports: Selectable as input with pull-up resistor/input with pull-down resistor/high-
impedance input
Input-output ports: Selectable as input with pull-up resistor/input with pull-down resistor/
high-impedance input Selectable as P-channel open drain output/N-channel open drain
output/CMOS output/high-impedance output Can be interfaced with external peripherals that use a different power supply than this device uses. Number of ports: ML63187
Input-output port : 2 ports ¥ 4 bits
ML63189B
Input port : 1 port ¥ 4 bits Input-output port : 4 ports ¥ 4 bits
• Melody output Melody frequency : 529 to 2979 Hz Tone length : 63 types Tempo : 15 types Melody data : Resides in the program memory Buzzer driver signal output : 4 kHz
• LCD driver
Number of segments : 1024 Max. (64 SEG ¥ 16 COM) 1/1 to 1/16 duty 1/4 or 1/5 bias (regulator built-in) Selectable as all-ON mode/all-OFF mode/power down mode/normal display mode Adjustable contrast
• Reset function Reset through RESET pin Power-on reset Reset by low-speed oscillation halt
• Battery check Low-voltage supply check The value of the judgment voltage is selected by the software by setting the LD1 and LD0 bits of BLDCON.
LD1
0 0 1 1
LD0
0 1 0 1
Judgment Voltage (V)
1.05 ±0.10
1.20 ±0.10
1.80 ±0.10
2.40 ±0.10
Remarks
Ta = 25°C Ta = 25°C Ta = 25°C Ta = 25°C
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¡ Semiconductor ML63187/63189B
• Power supply backup Backup circuit (voltage multiplier) enables operation at 0.9 V minimum
• Timers and counter 8-bit timer ¥ 4
Selectable as auto-reload mode/capture mode/clock frequency measurement mode Watchdog timer ¥ 1 100 Hz timer ¥ 1
Measurable in steps of 1/100 sec. 15-bit time base counter ¥ 1
1, 2, 4, 8, 16, 32, 64, and 128 Hz signals can be read
• Shift register Shift clock : 1 ¥ or 1/2 ¥ system clock, timer 1 overflow,
external clock
Data length : 8 bits
• Interrupt sources
ML63187
External interrupt : 2 Internal interrupt : 12 (watchdog timer interrupt is a nonmask-
able interrupt)
ML63189B
External interrupt : 3 Internal interrupt : 12 (watchdog timer interrupt is a nonmask-
able interrupt)
• Operating temperature
–20 to +70°C
• Operating voltage When backup used : 0.9 to 2.7 V
(Operating frequency: 30 to 80 kHz)
1.2 to 2.7 V (Operating frequency: 300 to 500 kHz)
1.5 to 2.7 V (Operating frequency: 200 kHz to 1 MHz)
When backup not used : 1.8 to 5.5 V
(Operating frequency: 200 kHz to 2 MHz)
• Package: 128-pin plastic QFP (QFP128-P-1420-0.50-K) : (Product name: ML63187-xxxGA,
ML63189B-xxxGA)
Chip : ML63187-xxx, ML63189B-xxx
xxx indicates a code number.
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¡ Semiconductor ML63187/63189B
BLOCK DIAGRAM (ML63187)
An asterisk (*) indicates the port secondary function. indicates that the power is supplied to the circuits corresponding to the signal names inside from V interface).
nX-4/250
H
TIMING CON­TROL
SP
RSP
CBR
EBR
ALU
L
YX
RA
A
C G
MIE
PC
Z
BUS CON­TROL
ROM 16KW
(power supply for
DDI
RESET
TST1 TST2
XT0
XT1
OSC0
OSC1
STACK CAL : 16-level REG : 16-level
RST
TST
OSC
V
CB1
CB2 V V V V V
V
DDH
V
DD1
DD2
DD3
DD4
DD5
DDL
INSTRUCTION DECODER
INT
4
INT
1
INT
1
DD
BACK UP
BIAS
RAM
1024N
INT187
TBC
BLD
100HzTC
WDT
IR
INT
DATA BUS
4
TIMER
8bit ¥ 4
INT
1
SFT
INT
1
MELODY
INT
2
I/O PORT
LCD
&
DSPR
TM0CAP/TM1CAP* TM0OVF/TM1OVF* T02CK* T13CK*
SCLK* SIN* SOUT*
MD MDB
PB.0-PB.3
PE.0-PE.3
COM1-16
SEG0-63
C1
V
C2
DDI
V
SS
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¡ Semiconductor ML63187/63189B
BLOCK DIAGRAM (ML63189B)
An asterisk (*) indicates the port secondary function. indicates that the power is supplied to the circuits corresponding to the signal names inside from V interface).
nX-4/250
H
TIMING CON­TROL
SP
RSP
CBR
EBR
ALU
L
YX
RA
A
C G
MIE
PC
Z
BUS CON­TROL
ROM 32KW
(power supply for
DDI
RESET
TST1 TST2
XT0
XT1
OSC0
OSC1
STACK CAL : 16-level REG : 16-level
RST
TST
OSC
V
CB1
CB2 V V V V V
V
DDH
V
DD1
DD2
DD3
DD4
DD5
DDL
INSTRUCTION DECODER
INT
4
INT
1
INT
1
DD
BACK UP
BIAS
C1 C2
RAM
1536N
INT189
TBC
BLD
100HzTC
WDT
IR
INT
4
TIMER
8bit ¥ 4
INT
1
SFT
INT
1
MELODY
DATA BUS
INT 1
INPUT PORT
I/O PORT
INT
2
LCD
&
DSPR
TM0CAP/TM1CAP* TM0OVF/TM1OVF* T02CK* T13CK*
SCLK* SIN* SOUT*
MD MDB
P0.0-P0.3
P9.0-P9.3
PA.0-PA.3
PB.0-PB.3
PE.0-PE.3
COM1-16
SEG0-63
V
DDI
V
SS
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¡ Semiconductor ML63187/63189B
PIN CONFIGURATION (TOP VIEW) (ML63187)
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
SEG33
SEG34
SEG35
SEG36
SEG37
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
(NC) (NC) (NC)
(NC) SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63
COM9 COM10 COM11 COM12
(NC) (NC) (NC) (NC)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
39
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
102
(NC)
101
(NC)
100
(NC)
99
(NC)
98
SEG11
97
SEG10
96
SEG9
95
SEG8
94
SEG7
93
SEG6
92
SEG5
91
SEG4
90
SEG3
89
SEG2
88
SEG1
87
SEG0
86
COM8
85
COM7
84
COM6
83
COM5
82
COM4
81
COM3
80
COM2
79
COM1
78
PB.3
77
PB.2
76
PB.1
75
PB.0
74
PE.3
73
PE.2
72
PE.1
71
PE.0
70
V
DDI
(NC)
69
(NC)
68
(NC)
67
(NC)
66
(NC)
65
64
63
62
COM14
COM13
COM16
COM15
SS
DD1
V
V
V
DD2
V
DD3
V
DD4
V
DD5
C1
C2
DDH
V
CB1
CB2
DD
DDL
V
V
OSC0
OSC1
XT1
RESET
XT0
128-Pin Plastic QFP
Note: Pins marked as (NC) are no-connection pins which are left open.
TST1
TST2
MD
MDB
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¡ Semiconductor ML63187/63189B
PAD CONFIGURATION (ML63187)
Pad Layout
SS
DD1
DD2
DD3
DD4
DD5
DDH
DD
DDL
57 COM13
58 COM14
59 COM15
60 COM16
61 V
62 V
63 V
64 V
65 V
66 V
67 C1
68 C2
69 V
70 CB1
71 CB2
72 V
73 V
74 OSC1
75 OSC0
76 RESET
77 XT1
78 XT0
79 TST1
80 TST2
81 MD
82 MDB
V
83
DDI
PE.0 84 PE.1 85 PE.2 86
PE.3 87 PB.0 88 PB.1 89 PB.2 90 PB.3 91
COM1 92 COM2 93 COM3 94 COM4 95 COM5 96 COM6 97 COM7 98 COM8 99
SEG0 100 SEG1 101 SEG2 102 SEG3 103 SEG4 104 SEG5 105 SEG6 106 SEG7 107 SEG8 108
SEG9 109 SEG10 110 SEG11 111
ML63187
56 COM12 55 COM11 54 COM10 53 COM9 52 SEG63 51 SEG62 50 SEG61 49 SEG60 48 SEG59 47 SEG58 46 SEG57 45 SEG56 44 SEG55 43 SEG54 42 SEG53 41 SEG52 40 SEG51 39 SEG50 38 SEG49 37 SEG48 36 SEG47 35 SEG46 34 SEG45 33 SEG44 32 SEG43 31 SEG42 30 SEG41 29 SEG40 28 SEG39 27 SEG38
Y
SEG12 1
SEG33 22
SEG32 21
SEG31 20
SEG37 26
SEG36 25
SEG35 24
SEG34 23
SEG30 19
SEG29 18
SEG28 17
SEG27 16
SEG26 15
SEG25 14
SEG24 13
SEG23 12
SEG22 11
SEG21 10
SEG20 9
SEG19 8
SEG18 7
SEG17 6
SEG16 5
SEG15 4
SEG14 3
SEG13 2
Chip size : 4.238 mm ¥ 4.914 mm Chip thickness : 350 mm (280 mm: available as required) Coordinate origin : center of chip Pad hole size : 100 mm ¥ 100 mm Pad size : 110 mm ¥ 110 mm Minimum pad pitch : 140 mm
Note: The chip substrate voltage is VSS.
X
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¡ Semiconductor ML63187/63189B
Pad Coordinates (ML63187)
Pad No.
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
Pad
Name
SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52
X (µm) Y (µm)
–1755 –1615 –1474 –1334 –1193 –1053
–913 –772 –632 –491 –351 –211
–70
70 211 351 491 632 772 913
1053 1193 1334 1474 1615 1755 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969
–2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2311 –2036 –1895 –1755 –1615 –1474 –1334 –1193 –1053
–913 –772 –632 –491 –351 –211
1969 –70
Pad No.
42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
Pad
Name
SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63
COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16
V
SS
V
DD1
V
DD2
V
DD3
V
DD4
V
DD5
C1 C2
V
DDH
CB1 CB2
V
DD
V
DDL
OSC1 OSC0
RESET
XT1
XT0 TST1 TST2
MD
MDB
X (µm) Y (µm)
1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1969 1755 1615 1474 1334 1193 1053
913 772 632 491 351 211
70
–70 –211 –351 –491 –632 –772 –913
–1053 –1193 –1334 –1474 –1615 –1755
70 211 351 491 632 772 913
1053 1193 1334 1474 1615 1755 1895 2036 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311 2311
Pad No.
83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98
99 100 101 102 103 104 105 106 107 108 109 110 111
Pad
Name
V
DDI
PE.0 PE.1 PE.2 PE.3 PB.0 PB.1 PB.2
PB.3 COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8
SEG0 SEG1 SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8
SEG9 SEG10 SEG11
X (µm) Y (µm)
–1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969
–1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969 –1969
1895 1755 1615 1474 1334 1193 1053
913 772 632 491 351 211
70
–70 –211 –351 –491 –632 –772 –913
–1053 –1193 –1334 –1474 –1615 –1755 –1895 –2036
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¡ Semiconductor ML63187/63189B
PIN CONFIGURATION (TOP VIEW) (ML63189B)
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
(NC) SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42 SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63
COM9
COM10
(NC)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
39
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
102
(NC)
101
SEG3
100
SEG2
99
SEG1
98
SEG0
97
COM8
96
COM7
95
COM6
94
COM5
93
COM4
92
COM3
91
COM2
90
COM1
89
P0.3
88
P0.2
87
P0.1
86
P0.0
85
P9.3
84
P9.2
83
P9.1
82
P9.0
81
PA.3
80
PA.2
79
PA.1
78
PA.0
77
PB.3
76
PB.2
75
PB.1
74
PB.0
73
PE.3
72
PE.2
71
PE.1
70
PE.0
69
V
DDI
(NC)
68
MDB
67
MD
66
(NC)
65
64
63
62
COM12
COM11
COM14
COM13
COM16
COM15
SS
DD1
V
V
V
DD2
V
DD3
DD4
V
V
DD5
C1
C2
DDH
V
CB1
CB2
DD
DDL
V
V
OSC1
OSC0
RESET
128-Pin Plastic QFP
Note: Pins marked as (NC) are no-connection pins which are left open.
XT1
XT0
TST1
TST2
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¡ Semiconductor ML63187/63189B
PAD CONFIGURATION (ML63189B)
Pad Layout
SS
DD1
DD2
DD3
DD4
DD5
DDH
DD
DDL
65 COM11
66 COM12
67 COM13
68 COM14
69 COM15
70 COM16
71 V
72 V
73 V
74 V
75 V
76 V
77 C1
78 C2
79 V
80 CB1
81 CB2
82 V
83 V
84 OSC1
85 OSC0
86 RESET
87 XT1
88 XT0
89 TST1
90 TST2
V
93
DDI
PE.0 94 PE.1 95 PE.2 96 PE.3 97 PB.0 98 PB.1 99 PB.2 100 PB.3 101 PA.0 102 PA.1 103 PA.2 104 PA.3 105 P9.0 106 P9.1 107 P9.2 108 P9.3 109 P0.0 110 P0.1 111 P0.2 112
P0.3 113 COM1 114 COM2 115 COM3 116 COM4 117 COM5 118 COM6 119 COM7 120 COM8 121
SEG0 122 SEG1 123
91 MD
92 MDB
ML63189B
64 COM10
63 COM9
62 SEG63 61 SEG62 60 SEG61 59 SEG60 58 SEG59 57 SEG58 56 SEG57 55 SEG56 54 SEG55 53 SEG54 52 SEG53 51 SEG52 50 SEG51 49 SEG50 48 SEG49 47 SEG48 46 SEG47 45 SEG46 44 SEG45 43 SEG44 42 SEG43 41 SEG42 40 SEG41 39 SEG40 38 SEG39 37 SEG38 36 SEG37 35 SEG36 34 SEG35 33 SEG34 32 SEG33 31 SEG32
SEG2 1
SEG13 12
SEG12 11
SEG11 10
SEG10 9
SEG17 16
SEG16 15
SEG15 14
SEG14 13
SEG21 20
SEG20 19
SEG19 18
SEG18 17
SEG25 24
SEG24 23
SEG23 22
SEG22 21
SEG26 25
SEG30 29
SEG29 28
SEG28 27
SEG27 26
SEG31 30
SEG9 8
SEG8 7
SEG7 6
SEG6 5
SEG5 4
SEG4 3
SEG3 2
Chip size : 4.81 mm ¥ 5.20 mm Chip thickness : 350 mm (280 mm: available as required) Coordinate origin : center of chip Pad hole size : 100 mm ¥ 100 mm Pad size : 110 mm ¥ 110 mm Minimum pad pitch : 140 mm
Note: The chip substrate voltage is VSS.
Y
X
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¡ Semiconductor ML63187/63189B
Pad Coordinates (ML63189B)
Pad No.
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41
Pad
Name
SEG2 SEG3 SEG4 SEG5 SEG6 SEG7 SEG8
SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24 SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41
X (µm) Y (µm)
–2259 –1895 –1755 –1615 –1474 –1334 –1193 –1053
–913 –772 –632 –491 –351 –211
–70
70 211 351 491 632 772 913
1053 1193 1334 1474 1615 1755 1895 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259
–2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2438 –2176 –2036 –1895 –1755 –1615 –1474 –1334 –1193 –1053
–913
Pad No.
42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82
Pad
Name
X (µm) Y (µm)
SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63
COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16
V
SS
V
DD1
V
DD2
V
DD3
V
DD4
V
DD5
C1 C2
V
DDH
CB1 CB2 2438–491
V
DD
2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 2259 1895 1755 1615 1474 1334 1193 1053
913 772 632 491 351 211
70
–70 –211 –351
–632 –491 –351 –211
–70
70 211 351 491 632 772 913
1053 1193 1334 1474 1615 1755 1895 2036 2176 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2438
2438–632
Pad No.
83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98
99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123
Pad
Name
V
DDL
OSC1 OSC0
RESET
XT1
XT0 TST1 TST2
MD MDB V
DDI
PE.0 PE.1 PE.2 PE.3 PB.0 PB.1 PB.2 PB.3 PA.0 PA.1 PA.2 PA.3 P9.0 P9.1 P9.2 P9.3 P0.0 P0.1 P0.2 P0.3
COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8
SEG0 SEG1
X (µm) Y (µm)
–772
–913 –1053 –1193 –1334 –1474 –1615 –1775 –1895 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259 –2259SEG42 2259 –772
2438 2438 2438 2438 2438 2438 2438 2438 2438 2438 2132 1895 1755 1615 1474 1334 1193 1053
913 772 632 491 351 211
70
–70 –211 –351 –491 –632 –772 –913
–1053 –1193 –1334 –1474 –1615 –1755 –1895 –2036 –2176
11/35
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¡ Semiconductor ML63187/63189B
PIN DESCRIPTIONS
The basic functions of each pin of the ML63187/ML63189B are described in Table 1. A symbol with a slash (/) denotes a pin that has a secondary function. Refer to Table 2 for secondary functions. For type, "—" denotes a power supply pin, "I" an input pin, "O" an output pin, and "I/O" an input­output pin.
Table 1 Pin Descriptions (Basic Functions)
Function Symbol
V
DD
V
SS
V
DD1
V
DD2
V
DD3
V
DD4
V
DD5
C1 — C2
V
Power
DDI
Supply
V
DDL
V
DDH
CB1
CB2
XT0 I
XT1 O
Oscillation
OSC0 I
OSC1 O
Pin No.
ML63187
54 43 44 45 46 47 48 49 50
70
55
51
52
53
60
59
57
56
ML63189B
56 45 46 47 48 49 50 51 52
69
57
53
54
55
62
61
59
58
Pad No.
ML63187
72 61 62 63 64 65 66 67 68
83
73
69
70
71
78
77
75
74
ML63189B
82 71 72 73 74 75 76 77 78
93
83
79
80
81
88
87
85
84
Type
Positive power supply
— —
Negative power supply
Description
Power supply pins for LCD bias (internally generated). Capacitors (0.1 mF) should be connected between these
pins and V
.
SS
Capacitor connection pins for LCD bias generation. A capacitor (0.1 mF) should be connected between C1 and C2. Positive power supply pin for external interface
(power supply for input, and input-output ports) Positive power supply pin for internal logic (internally generated).
A capacitor (0.1 mF) should be connected between this pin and V
.
SS
Voltage multiplier pin for power supply backup (internally generated).
A capacitor (1.0 mF) should be connected between this pin and V
.
SS
Pins to connect a capacitor for voltage multiplier. A capacitor (1.0 mF) should be connected between CB1 and CB2. Low-speed clock oscillation pins.
An option for using crystal oscillation or RC oscillation is chosen by the mask option. If the crystal oscillation is chosen, a crystal should be connected between XT0 and XT1, and capacitor (C should be connected between XT0 and V
.
SS
If the RC oscillation is chosen, external oscillation resistor (R
) should be connected between XT0 and
OSL
XT1. High-speed clock oscillation pins. A ceramic resonator and capacitors (C oscillation resistor (R
) should be connected to these pins.
OSH
, CL1) or external
L0
)
G
12/35
Page 13
¡ Semiconductor ML63187/63189B
Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol
TST1 I
Test
TST2 I
Reset
Melody
RESET
MD
MDB P0.0/INT5 P0.1/INT5 P0.2/INT5 P0.3/INT5
P9.0 P9.1 P9.2
P9.3 PA.0 PA.1 PA.2
Port
PA.3
PB.0/INT0/
TM0CAP/
TM0OVF
PB.1/INT0/
TM1CAP/
TM1OVF PB.2/INT0/T02CK PB.3/INT0/T13CK
PE.0/SIN
PE.1/SOUT PE.2/SCLK
PE.3/INT2
Pin No.
ML63187
61
62
58
63 64
75
76
77 78 71 72 73 74
Pad No.
ML63189B
63
64
66 67 O 86 87 88 89 82 83 84 85 78 79 80 81
74
75
76 77 70 71 72 73
ML63187
79
80
76
81 82
88
89
90 91 84 85 86 87
ML63189B
89
90
8660 I
91
92 110 111 112 113 106 107 108 109 102 103 104 105
98
99
100 101
94
95
96
97
Type Description
Input pins for testing. A pull-down resistor is internally connected to these pins. The user cannot use these pins. Reset input pin. Setting this pin to "H" level puts this device into a reset state. Then, setting this pin to "L" level starts executing an instruction from address 0000H. A pull-down resistor is internally connected to this pin.
O
Melody output pin (non-inverted output) Melody output pin (inverted output) 4-bit input ports. Pull-up resistor input, pull-down resistor input, or
I
high-impedance input is selectable for each bit. Applied to the ML63189B only. 4-bit input-output ports. In input mode, pull-up resistor input, pull-down
I/O
resistor input, or high-impedance input is selectable for each bit. In output mode, P-channel open drain output, N-channel open drain output, CMOS output, or
I/O
high-impedance output is selectable for each bit. P9.0 to P9.3 and PA.0 to PA.3 are applied to the ML63189B only.
I/O
I/O
13/35
Page 14
¡ Semiconductor ML63187/63189B
Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol
COM1 COM2 COM3 COM4 COM5 COM6 COM7 COM8
COM9 COM10 COM11 COM12 COM13 COM14 COM15 COM16
SEG0 SEG1 SEG2
LCD
SEG3 SEG4 SEG5 SEG6 SEG7 SEG8
SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 SEG17 SEG18 SEG19 SEG20 SEG21 SEG22 SEG23 SEG24
Pin No.
ML63187
79 80 81 82 83 84 85 86 31 32 33 34 39 40 41 42 87 88 89 90 91 92 93 94 95 96 97
98 103 104 105 106 107 108 109 110 111 112 113 114 115
ML63189B
90 91 92 93 94 95 96 97 36 37 39 40 41 42 43 44 98
99 100 101 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123
Pad No.
ML63187
92 93 94 95 96 97 98 99 53 54 55 56 57 58 59
60 100 101 102 103 104 105 106 107 108 109 110 111
1 2 3 4 5 6 7 8
9 10 11 12 13
ML63189B
114 115 116 117 118 119 120 121
63 64 65 66 67 68 69
70 122 123
1 2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
Type
LCD common signal output pins
O
LCD segment signal output pins
O
Description
14/35
Page 15
¡ Semiconductor ML63187/63189B
Table 1 Pin Descriptions (Basic Functions) (continued)
Function Symbol
SEG25 SEG26 SEG27 SEG28 SEG29 SEG30 SEG31 SEG32 SEG33 SEG34 SEG35 SEG36 SEG37 SEG38 SEG39 SEG40 SEG41 SEG42
LCD
SEG43 SEG44 SEG45 SEG46 SEG47 SEG48 SEG49 SEG50 SEG51 SEG52 SEG53 SEG54 SEG55 SEG56 SEG57 SEG58 SEG59 SEG60 SEG61 SEG62 SEG63
Pin No.
ML63187
116 117 118 119 120 121 122 123 124 125 126 127 128
5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
ML63189B
124 125 126 127 128
2 3 4 5 6 7 8
9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35
Pad No.
ML63187
14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
ML63189B
24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62
Type
LCD segment signal output pins
O
Description
15/35
Page 16
¡ Semiconductor ML63187/63189B
Table 2 shows the secondary functions of each pin of the ML63187/ML63189B.
Table 2 Pin Descriptions (Secondary Functions)
Function Symbol
PB.0/INT0 PB.1/INT0 PB.2/INT0 PB.3/INT0
External
Interrupt
PE.3/INT2
P0.0/INT5 P0.1/INT5 P0.2/INT5
P0.3/INT5
Pin No.
ML63187
75 76 77 78
74
ML63189B
74 75 76 77
73
86 87 88
89
Pad No.
ML63187
88 89 90 91
87
ML63189B
98
99 100 101
97
110 111 112
113
Type
Description
External 0 interrupt input pins. The change of input signal level causes an interrupt to
I
occur. The Port B Interrupt Enable register (PBIE) enables or disables an interrupt for each bit.
External 2 interrupt input pin. The change of input signal level causes an interrupt to
I
occur. External 5 interrupt input pins.
The change of input signal level causes an interrupt to occur.
I
The Port 0 Interrupt Enable register (P0IE) enable or disable an interrupt for each bit. Applied to the ML63189B only.
16/35
Page 17
¡ Semiconductor ML63187/63189B
Table 2 Pin Descriptions (Secondary Functions) (continued)
Function Symbol
Capture
PB.0/TM0CAP PB.1/TM1CAP PB.0/TM0OVF PB.1/TM1OVF
Timer
PB.2/T02CK PB.3/T13CK
PE.0/SIN
PE.1/SOUT
Shift
Register
PE.2/SCLK
Pin No.
ML63187
75 76 75 76 77 78 71 72
73
ML63189B
74 75 74 75 76 77 70 71
72
Pad No.
ML63187
88 89 88 89 90 91 84 85
86
ML63189B
98 99 98
99 100 101
94
95
96
Type
Timer 0 capture input pin.
I
Timer 1 capture input pin.
I
Timer 0 overflow flag output pin.
O
Timer 1 overflow flag output pin.
O
I
External clock input pin for timer 0 and timer 2.
I
External clock input pin for timer 1 and timer 3.
I
Shift register receive data input pin.
O
Shift register transmit data output pin.
Description
Shift register clock input-output pin. Clock output when this device is used as a master
I/O
processor. Clock input when this device is used as a slave processor.
17/35
Page 18
¡ Semiconductor ML63187/63189B
ABSOLUTE MAXIMUM RATINGS
= 0 V)
(V
SS
Parameter Symbol Condition Rating Unit
Power Supply Voltage 6
V V V V
V
V
T
DD1
DD2
DD3
DD4
DD5
DD
DDI
DDH
DDL
IN1
IN2
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
STG
DDI
DD1
DD2
DD3
DD4
DD5
DDI
DDH
–0.3 to +1.6Power Supply Voltage 1 Ta = 25°CV –0.3 to +2.9Power Supply Voltage 2 Ta = 25°C –0.3 to +4.2Power Supply Voltage 3 Ta = 25°C –0.3 to +5.5Power Supply Voltage 4 Ta = 25°C –0.3 to +6.8Power Supply Voltage 5 Ta = 25°C –0.3 to +6.0Ta = 25°C V –0.3 to +6.0Power Supply Voltage 7 Ta = 25°CV –0.3 to +6.0Power Supply Voltage 8 Ta = 25°C –0.3 to +6.0Power Supply Voltage 9 Ta = 25°CV
–0.3 to V
Input, Ta = 25°CV Output, Ta = 25°CV Output, Ta = 25°CV Output, Ta = 25°CV Output, Ta = 25°CV Output, Ta = 25°CV
–0.3 to V –0.3 to V –0.3 to V –0.3 to V –0.3 to V –0.3 to V
–0.3 to V
Output, Ta = 25°CV
Output, Ta = 25°CV
–0.3 to V
–0.3 to V
DD
DDI
DD1
DD2
DD3
DD4
DD5
DD
DDI
DDH
+ 0.3Input Voltage 1 VDD Input, Ta = 25°CV
+ 0.3Input Voltage 2 V
+ 0.3Output Voltage 1 V + 0.3Output Voltage 2 V + 0.3Output Voltage 3 V + 0.3Output Voltage 4 V + 0.3Output Voltage 5 V
+ 0.3Output Voltage 6 VDD Output, Ta = 25°CV
+ 0.3Output Voltage 7 V
+ 0.3Output Voltage 8 V
–55 to +150Storage Temperature
V V V V V
V V V V V V V V V V V V V
°C
18/35
Page 19
¡ Semiconductor ML63187/63189B
RECOMMENDED OPERATING CONDITIONS
• When backup is used
(V
= 0 V)
SS
Parameter Symbol Condition Range Unit
Operating Temperature T
Operating Voltage
Crystal Oscillation Frequency f
Low-speed RC Oscillation Frequency
f
Ceramic Oscillation Frequency
High-speed RC Oscillation Frequency
f
op
V
DD
V
DDI
XT
ROSL
f
CM
ROSH
= 5 to 25 pF
C
G
= 1.5 MW
OSL
= 700 kW
OSL
= 500 kW
OSL
VDD = 0.9 to 1.2 V
= 1.5 to 2.7 V
DD
= 0.9 to 1.2 V
V
DD
VDD = 1.2 to 2.7 V
— — 0.9 to 2.7 V —
= 400 kW
R
OSH
= 100 kW
R
OSH
R
= 75 kW 1M ±30%
OSH
–20 to +70 °C
0.9 to 5.5 V
32.768 to 76.8 kHz 32 ±30%R 60 ±30%R
kHz
80 ±30%R
Not applied
300k to 500kVDD = 1.2 to 2.7 V
Hz 200k to 1MV Not applied 200k ±30% 700k ±30%
Hz
• When backup is not used
Parameter Symbol Condition Range Unit
Operating Temperature T
Operating Voltage
Crystal Oscillation Frequency f
Low-speed RC Oscillation Frequency
Ceramic Oscillation Frequency
High-speed RC Oscillation Frequency
V
V
f
ROSL
f
CM
f
ROSH
op
DD
DDI
XT
VDD = 1.8 to 5.5 V
C
G
R
OSL
R
OSL
R
OSL
= 1.8 to 3.5 V, R
V
DD
–20 to +70 °C — 1.8 to 5.5 V —
= 5 to 25 pF
= 1.5 MW = 700 kW = 500 kW
1.8 to 5.5 V
32.768 to 76.8 kHz 32 ±30% 60 ±30% 80 ±30%
200k to 2MVDD = 1.8 to 5.5 V
= 100 kW
OSH
R
= 75 kW
OSH
= 51 kW
OSH
= 30 kW 2M ±30%
OSH
700k ±30%R
1M ±30%
1.35M ±30%R
(V
SS
= 0 V)
kHz
Hz
Hz
19/35
Page 20
¡ Semiconductor ML63187/63189B
• Typical characteristics of low-speed RC oscillation When backup is used/backup is not used (VDD = V
1000
[kHz]
ROSL
f
100
10
100 1000 10000
= 1.5 V/VDD = V
DDI
R
OSL
[kW]
DDI
= 3.0 V)
• Typical characteristics of high-speed RC oscillation When backup is used (VDD = V
10000
[kHz]
ROSH
f
1000
100
10 100 1000
DDI
= 1.5 V)
R
OSH
[kW]
20/35
Page 21
¡ Semiconductor ML63187/63189B
• Typical characteristics of high-speed RC oscillation When backup is not used (VDD = V
10000
[kHz]
ROSH
f
1000
100
10 100 1000
DDI
= 3.0 V)
R
OSH
[kW]
21/35
Page 22
¡ Semiconductor ML63187/63189B
ELECTRICAL CHARACTERISTICS
DC Characteristics
Parameter Symbol Condition
Voltage
DD2
Voltage Temperature Deviation DV
DD2
V
Voltage V
DD1
V
Voltage V
DD3
V
Voltage V
DD4
V
Voltage V
DD5
Voltage
V
DDH
(Backup used)
V
Voltage V
DDL
Crystal Oscillation Hold Voltage
External Crystal Oscillator Capacitance Internal Crystal Oscillator Capacitance
External Ceramic Oscillator Capacitance
POR Voltage V
Non-POR Voltage V
BLD Judgment Voltage V
BLD Judgment Voltage Temperature Deviation
(V
DV
= V
DD
V
DD2
DD1
DD3
DD4
DD5
= 0.9 to 5.5 V, VSS = 0 V, Ta = –20 to +70°C unless otherwise specified)
DDI
1/5 bias, 1/4 bias
DD2
1/5 bias, 1/4 bias V
1/4 bias (connect
V
DD3
High-speed clock oscillation
V
DDH
High-speed clock oscillation
(Ceramic oscillation, 1 MHz)
High-speed clock
oscillation stopped
DDL
High-speed clock oscillation
(V
DD
Oscillation start time:
within 5 seconds
V
T
STA
HOLD
STOP
C
G
C
D
CSA2.00MG (Murata
C
POR1
POR2
L0, 1
OS
MFG.-make) used
LD1 = 1, LD0 = 1, Ta = 25°C
BLDC
V
= 2.40 V (LD1 = 1, LD0 = 1)
BLDC
V
= 1.80 V (LD1 = 1, LD0 = 0)
BLDC
BLDC
V
= 1.20 V (LD1 = 0, LD0 = 1)
BLDC
V
= 1.05 V (LD1 = 0, LD0 = 0)
BLDC
Mea-
Unit
Max.Typ.Min.
suring
Circuit
1.91.81.7V
mV/°C
–4V
3.02.8 V
2.72.0
2.01.51.0
5.51.2
1.2Crystal Oscillation Start Voltage V
0.9
V
V
V
V
V
1
V
V
V
(Ta = 25°C)
Typ.+ 0.1
DD2
Typ.+ 0.3
DD2
Typ.+ 0.2
V
DD2
Typ.+ 0.4
DD2
Typ.+ 0.3
DD2
Typ.+ 0.5
DD2
Typ.+ 0.4
DD2
1/5 bias
and V 1/5 bias 1/4 bias 1/5 bias 1/4 bias
DD2
Typ.– 0.1 Typ.– 0.3
Typ.– 0.2
)
Typ.– 0.4 Typ.– 0.3 Typ.– 0.5 Typ.– 0.4
1/2 ¥ V 3/2 ¥ V
2 ¥ V 3/2 ¥ V 5/2 ¥ V
2 ¥ V
stopped
= 1.5 V
V
DD
= 1.5 V
V
DD
= 1.2 to 5.5 V)
Backup V
1.7Backup not used V —ms —pF —pF
V
= 3.0 V
DD
—pF
V
= 1.5 V V
DD
= 3.0 V V
DD
V
= 1.5 V V
DD
= 3.0 V V
DD
5.00.1Crystal Oscillation Stop Detect Time 255 302520
30
pF
16128Internal RC Oscillator Capacitance C
0.40.0
0.70.0V
1.51.2
3.02.0V
2.502.402.30
1.901.801.70LD1 = 1, LD0 = 0, Ta = 25°C
1.301.201.10LD1 = 0, LD0 = 1, Ta = 25°C
1.151.050.95LD1 = 0, LD0 = 0, Ta = 25°C
V
–3.5— —–2.3
mV/°C
–1.6
–1.2
22/35
Page 23
¡ Semiconductor ML63187/63189B
Notes: 1. "T
reset occurs.
2. "POR" denotes Power On Reset.
3. "V up to VDD.
4. "V again rises up to VDD.
" indicates that if the crystal oscillator stops over the value of T
STOP
" indicates that POR occurs when VDD falls from VDD to V
POR1
" indicates that POR does not occur when VDD falls from VDD to V
POR2
, the system
STOP
and again rises
POR1
POR2
and
23/35
Page 24
¡ Semiconductor ML63187/63189B
DC Characteristics (continued)
• When backup is used
(VDD = V
Parameter Symbol Condition
CPU is in HALT state.
Supply Current 1
(High-speed clock oscillation
I
DD1
CPU is in HALT state.
LCD is in Power Down mode.
Supply Current 2
I
DD2
(High-speed clock oscillation
CPU is in operation at
Supply Current 3 I
DD3
DD4
DD5
low-speed oscillation.
(High-speed clock oscillation
CPU is in operation at high-speed oscillation
CPU is in operation at high-speed oscillation
= 1.5 V, VSS = 0 V, 1/5 bias, Ta = –20 to +70°C unless otherwise specified)
DDI
Unit
Max.Typ.Min.
Ta = –20 to +50°C
6.55mA
stopped)
Ta = –20 to +70°C
Ta = –20 to +50°C
105
54
mA
stopped)
Ta = –20 to +70°C
Ta = –20 to +50°C
stopped)
(RC oscillation, R
Ta = –20 to +70°C
= 100 kW)
OSH
(Ceramic oscillation, 1 MHz)
84
1816
2016 mA
1000800Supply Current 4 I
850700Supply Current 5 I
mA
mA
mA
Mea-
suring
Circuit
1
• When backup is not used
(VDD = V
Parameter Symbol Condition
CPU is in HALT state.
Supply Current 1
(High-speed clock oscillation
I
DD1
CPU is in HALT state.
LCD is in Power Down mode.
Supply Current 2
I
DD2
(High-speed clock oscillation
CPU is in operation at
Supply Current 3 I
DD3
DD4
DD5
low-speed oscillation.
(High-speed clock oscillation
CPU is in operation at high-speed oscillation
CPU is in operation at high-speed oscillation
= 3.0 V, VSS = 0 V, 1/5 bias, Ta = –20 to +70°C unless otherwise specified)
DDI
stopped)
stopped)
stopped)
(RC oscillation, R
(Ceramic oscillation, 2 MHz)
Ta = –20 to +50°C
Ta = –20 to +70°C
Ta = –20 to +50°C
Ta = –20 to +70°C
Ta = –20 to +50°C
Ta = –20 to +70°C
= 100 kW)
OSH
Mea-
Unit
Max.Typ.Min.
suring
Circuit
32.2mA
52.2
2.51.8mA
41.8
97.5
1
mA
127.5
mA
700550Supply Current 4 I
1000850Supply Current 5 I
mA
24/35
Page 25
¡ Semiconductor ML63187/63189B
DC Characteristics (continued)
(VDD = V
DDI
= V
DDH
Parameter Symbol Condition
Output Current 1 (P9.0 to P9.3)* (PA.0 to PA.3)*
I
OH1
V
= V
OH1
– 0.5 V –1.0 mA
DDI
(PB.0 to PB.3) (PE.0 to PE.3)
V
I
OL1
= 0.5 V 6.0 mA
OL1
Output Current 2 (MD, MDB)
Output Current 3 (SEG0 to SEG63) (COM1 to COM16)
Output Current 4 (OSC1)
I
I
I
I
OHM3
I
OHM3S
I
OMH3
I
OMH3S
I
OML3
OML3S
OLM3
OLM3S
I
OH4R
I
I
OH4C
I
OH2
OL2
OH3
OL3
OL4R
OL4C
V
= VDD – 0.7 V –2.0 mA
OH2
V
= 0.7 V 11.0 mA
OL2
V
= V
OH3
V
OHM3
V
OHM3S
V
OMH3
V
OMH3S
V
OML3
V
OML3S
V
OLM3
V
OLM3S
V
OL3
V
OH4R
– 0.2 V (V
DD5
= V
+ 0.2 V (V
DD4
= V
DD4
= V
+ 0.2 V (V
DD3
= V
DD3
= V
+ 0.2 V (V
DD2
= V
– 0.2 V (V
DD2
= V
+ 0.2 V (V
DD1
= V
– 0.2 V (V
DD1
= VSS + 0.2 V (VSS level)
= V
– 0.5 V
DDH
(RC oscillation) V
= 0.5 V
OL4R
(RC oscillation) V
= V
DDH
– 0.5 V
OH4C
(ceramic oscillation) V
= 0.5 V
OL4C
(ceramic oscillation)
Output Leakage Current (P9.0 to P9.3)*
I
OOH
VOH = V
DDI
(PA.0 to PA.3)* (PB.0 to PB.3) (PE.0 to PE.3)
I
OOL
VOL = V
SS
= 3.0 V, V
V
DD5
V
DDI
V
DDI
V
DDI
V
DDI
V
DDI
V
DDI
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
DD5
– 0.2 V (V
– 0.2 V (V
V
DD
V
DD
V
DD
V
DD
V
DD
= 1.1 V, V
DD1
= 2.2 V, V
DD2
= 3.3 V, V
DD3
DD4
= 4.4 V,
= 5.5 V, Ta = –20 to +70°C unless otherwise specified)
Mea-
Unit
Min.
Typ.
Max.
suring
Circuit
–1.4
= 1.5 V = 3.0 V = 5.0 V = 1.5 V = 3.0 V
= 5.0 V = 1.5 V = 3.0 V = V = 1.5 V = 3.0 V = V
level)
level)
DD4
DD4
level)
DD3
DD3
level)
DD2
DD2
level)
DD1
DD1
= V = V
= V
= V
= V
= 5.0 V
DDH
= 5.0 V
DDH
level)
level)
level)
level)
= 3.0 V
DDH
= 5.0 V –0.5 mA–1.7–3.5
DDH
= 3.0 V
DDH
= 5.0 V 3.5 mA1.80.5
DDH
= 3.0 V
DDH
= 5.0 V –200 mA–350–800
DDH
= 3.0 V
DDH
= 5.0 V 1000 mA700400
DDH
–2.5 –6.0 –8.5
0.4
1.0
1.5
–4.0 –11.0 –14.0
0.5
2.0
4.0 —
4
4
4
4
4
–2.5
–0.3
–3.5 –5.0
1.4
3.0
3.7 –2.0 –6.0 –9.0
2.0
5.5
7.0
— — — — — — — — — —
–1.3
–0.4 mA
–1.5 mA
2.5 mA
8.5 mA
–0.5 mA
–4.0 mA
4.0 mA
14.0 mA –4 mA — mA –4
mA
mA mA
–4
mA
mAI
–4
mAI
mAI
–4
mAI
–0.25 mA
2.5 mA1.50.25VDD = V
–100 mA–250–500VDD = V
800 mA500200VDD = V
0.3 mA
mA
2
*: Applied to the ML63189B only.
25/35
Page 26
¡ Semiconductor ML63187/63189B
DC Characteristics (continued)
(VDD = V
DDI
= V
DDH
Parameter Symbol Condition
Input Current 1
V
= V
IH1
(P0.0 to P0.3)* (P9.0 to P9.3)*
I
IH1
DDI
(when pulled down) (PA.0 to PA.3)* (PB.0 to PB.3) (PE.0 to PE.3)
I
I Input Current 2 (OSC0)
I
I
I
I
V
I
IL1
IH1ZVIH1
IL1Z
I
IL2
IH2RVIH2R
IL2RVIL2R
IH2C
IL2C
IL1
(when pulled up)
V
IL1
V
IL2
(when pulled up)
V
IH2C
(ceramic oscillation) V
IL2C
(ceramic oscillation)
= V
SS
= V
(in a high impedance state) 1.0 mA0.0
DDI
= V
(in a high impedance state) 0.0 mA–1.0
SS
= V
SS
= V
(RC oscillation) 1.0 mA0.0
DDH
= VSS (RC oscillation) 0.0 mA–1.0 = V
DDH
= V
SS
Input Current 3 (RESET)
I
V
= V
IH3
DD
V
= V
IL3
SS
I
IH3
IL3
Input Current 4 (TST1, TST2)
V
I
IH4
I
IL4
= V
IH4
DD
V
= V
IL4
SS
= 3.0 V, V
DD1
V
= 5.5 V, Ta = –20 to +70°C unless otherwise specified)
DD5
= 1.5 V
V
DDI
= 3.0 V
V
DDI
= 5.0 V
V
DDI
= 1.5 V
V
DDI
= 3.0 V
V
DDI
= 5.0 V
V
DDI
V
= V
DD
= V
V
DD
V
= V
DD
= V
V
DD
V
= V
DD
= V
V
DD
= 1.5 V
V
DD
= 3.0 V 2400 mA1100150
V
DD
V
= V
DD
= 3.0 V 5.5 mA3.00.5
V
DD
= V
V
DD
= 1.1 V, V
= 3.0 V
DDH
= 5.0 V
DDH
= 3.0 V
DDH
= 5.0 V
DDH
= 3.0 V
DDH
= 5.0 V
DDH
= 5.0 V 5.0 mA2.70.5
DDH
= 5.0 V 11.0 mA6.52.0
DDH
= 2.2 V, V
DD2
= 3.3 V, V
DD3
DD4
= 4.4 V,
Mea-
Unit
Min.
Typ.
Max.
suring
Circuit
20
2 30 70
–45 –260 –650
–350 –750
–120 –350
–170 –450
120 350 –20
45 mA 260 mA 650 mA
–2 mA –30 mA –70 mA
–30 mA
–200 mA
3
1.8
0.5 3
–4.0
–10
10
–1.8
6
–6
180
4.0 mA 10 mA
–0.5 mA
–3 mA
350 mA
0.0 mA–1.0
1500 mA75050VDD = 1.5 V
0.0 mA–1.0
*: Applied to the ML63189B only.
26/35
Page 27
¡ Semiconductor ML63187/63189B
DC Characteristics (continued)
(VDD = V
DDI
= V
Parameter Symbol Condition
Input Voltage 1 (P0.0 to P0.3)* (P9.0 to P9.3)*
V
IH1
(PA.0 to PA.3)* (PB.0 to PB.3) (PE.0 to PE.3)
Input Voltage 2 (OSC0)
V
IL1
V
IH2
V
IL2
Input Voltage 3 (RESET, TST1, TST2)
V
IH3
V
IL3
Hysteresis Width 1 (P0.0 to P0.3)* (P9.0 to P9.3)* (PA.0 to PA.3)*
DV
T1
(PB.0 to PB.3) (PE.0 to PE.3)
Hysteresis Width 2 (RESET, TST1, TST2)
DV
T2
Input Pin Capacitance (P0.0 to P0.3)* (P9.0 to P9.3)* (PA.0 to PA.3)*
C
IN
(PB.0 to PB.3) (PE.0 to PE.3)
= 3.0 V, V
DDH
VDD = V VDD = V VDD = V VDD = V
V
V
DDI
V
DDI
V
DDI
V
DDI
V
DDI
V
DDI
V
DD
= 1.1 V, V
DD1
= 5.5 V, Ta = –20 to +70°C unless otherwise specified)
DD5
= 2.2 V, V
DD2
DD3
= 1.5 V 1.2 1.5 V = 3.0 V 2.4 3.0 V = 5.0 V 4.0 5.0 V = 1.5 V 0.0 0.3 V = 3.0 V 0.0 0.6 V = 5.0 V 0.0 1.0 V
= 3.0 V 2.4 3.0 V
DDH
= 5.0 V 4.0 5.0 V
DDH
= 3.0 V 0.0 0.6 V
DDH
= 5.0 V 0.0 1.0 V
DDH
= 1.5 V 1.35 1.5 V
VDD = 3.0 V 2.4 3.0 V
= 5.0 V 4.0 5.0 V
V
DD
VDD = 1.5 V 0.0 0.15 V VDD = 3.0 V 0.0 0.6 V
= 5.0 V 0.0 1.0 V
V
DD
V
= 1.5 V 0.05 0.1 0.3 V
DDI
V
= 3.0 V 0.2 0.5 1.0 V
DDI
= 5.0 V 0.25 1.0 1.5 V
V
DDI
VDD = 1.5 V 0.05 0.1 0.3 V
= 3.0 V 0.2 0.5 1.0 V
V
DD
= 5.0 V 0.25 1.0 1.5 V
V
DD
——5pF
= 3.3 V, V
Max.Typ.Min.
DD4
Unit
= 4.4 V,
Mea-
suring
Circuit
4
1
*: Applied to the ML63189B only.
27/35
Page 28
¡ Semiconductor ML63187/63189B
p
Measuring circuit 1
CB1
C
b12
CB2 C1
C
12
C2
q
OSC0
*1
w
OSC1
Ca, Cb, Cc, Cd, Ce, Cl, C C
, C
b12
h
C
G
C
L0
C
L1
Ceramic Resonator
C
G
XT0
XT1
V
SS
VDDV
A
12
DDIVDD1
C
: 0.1 mF
V
C
a
V
DD2
b
V
V
V
V
DD3
DD4
DD5
C
C
c
V
V
C
d
e
V
V
V
DDH
DDL
C
C
h
l
V
*1 RC Oscillator
32.768 kHz Crystal
V
: 1 mF : 15 pF : 30 pF : 30 pF : CSA2.00MG (2 MHz) CSB1000J (1 MHz) (Murata MFG.-make)
R
OSH
Ceramic Oscillator
q
w
q
C
L0
Ceramic Resonator
w
C
L1
Measuring circuit 2
V
IH
*2
V
IL
INPUT OUTPUT
V
SS
VDDV
DDIVDD1VDD2VDD3VDD4VDD5VDDH
V
DDL
*2 Input logic circuit to determine the specified measuring conditions. *3 Measured at the s
ecified output pins.
*3
A
28/35
Page 29
¡ Semiconductor ML63187/63189B
Measuring circuit 3
*4
A
Measuring circuit 4
V
IH
*4
INPUT OUTPUT
VSSVDDV
DDIVDD1VDD2VDD3VDD4VDD5VDDH
INPUT OUTPUT
V
DDL
Waveform Monitoring
V
IL
V
SS
VDDV
DDIVDD1VDD2VDD3VDD4VDD5VDDH
V
DDL
*4 Measured at the specified input pins.
29/35
Page 30
¡ Semiconductor ML63187/63189B
AC Characteristics (Serial Interface, Shift Register)
(VDD = 0.9 to 5.5 V, V
= 1.8 to 5.5 V, VSS = 0 V, V
DDH
specified)
Parameter Symbol Condition Unit
t
f
r
SCLK Input "L" Level Pulse Width
SCLK Input "H" Level Pulse Width
t
CWL
t
CWH
CYC
t
CYC1(O)
CPU in operation state at 32.768 kHz
SCLK Output Cycle Time
CYC2(O)
DDR
DS
DH
AC characteristics timing ("H" level = 4.0 V, "L" level = 1.0 V)
= 5.0 V, Ta = –20 to +70°C unless otherwise
DDI
ms 1.0 — ms 1.0
ms——
ms——
V
= 5 V to V
DDI
DD
CPU in operation at 2 MHz
= V
V
DD
= 1.8 V to 3.5 V
DDH
Cl = 10 pF ms 0.4
ms—— — ms——
SCLK Input Fall Time —SCLK Input Rise Time t
0.8
0.8
1.8SCLK Input Cycle Time t —
t
SOUT Output Delay Time t
0.5SIN Input Setup Time t
0.8SIN Input Hold Time t
Max.Typ.Min.
ms—— ms30.5
ms0.5
SCLK (PE.2)
SOUT (PE.1)
SIN (PE.0)
t
DDR
t
CYC
5 V (V
DDI
)
0 V (VSS)
t
r
t
CWH
t
DDR
t
f
t
CWL
5 V (V
DDI
)
0 V (VSS)
t
DS
t
DH
t
DS
5 V (V
DDI
)
0 V (VSS)
30/35
Page 31
¡ Semiconductor ML63187/63189B
APPLICATION CIRCUITS (ML63187)
•Crystal oscillation is selected as low-speed
LCD
Crystal
32.768 kHz
C
G
5 to
25 pF
C
1.0 mF
h
1.5 V
C
0.1 mF
v
C
C
l
C
e
C
d
C
c
C
b
C
a
b12
1.0 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
XT0
XT1 V
DDH
V
DD
CB1 CB2
V
DDL
V
DD5
V
DD4
V
DD3
V
DD2
V
DD1
COM1-16
ML63187
SEG0-63
C1
C
0.1 mF
12
Push SW
C2 RESET
TST1
Buzzer
TST2 MD
oscillation.
•RC oscillation is selected as high-speed oscillation.
•Ports are powered from external memory power source.
•C
is an IC power supply bypass capacitor.
v
•Values of C C
, and CG, are for reference only.
h
, Cb, Cc, Cd, Ce, Cl, C
a
OSC0
R
OSH
OSC1
PE.3 PE.2 PE.1 PE.0
PB.3 PB.2 PB.1 PB.0
V
DDI
b12
, C12,
V
DD
Note: V
MDB V
SS
is the power supply pin for the input-output ports.
DDI
Be sure to connect the V
pin either to the positive power supply pin (VDD) of this
DDI
device or to the positive power supply pin of the external memory.
Application Circuit Example with Power Supply Backup
31/35
Page 32
¡ Semiconductor ML63187/63189B
APPLICATION CIRCUITS (ML63187)
•Crystal oscillation is selected as low-speed oscillation.
•Ceramic oscillation is selected as high-speed oscillation.
•Ports, external memory, and IC share their power supply.
•C
is an IC power supply bypass capacitor.
v
•Values of C C
, and CL1 are for reference only.
L0
, Cb, Cc, Cd, Ce, Cl, C12, CG,
a
CL0 30 pF
OSC0
Ceramic Resonator (Example: 1 MHz)
OSC1
C
PE.3 PE.2
L1
30 pF
PE.1 PE.0
PB.3 PB.2 PB.1 PB.0
V
DDI
V
DD
C
V
DD
G
5 to 25 pF
5.0 V
C
v
C
l
C
e
C
d
C
c
C
b
C
a
Buzzer
Crystal
32.768 kHz
Open
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
C
12
Push SW
0.1 mF
XT0
XT1 V
DDH
V
DD
CB1 CB2 V
DDL
V
DD5
V
DD4
V
DD3
V
DD2
V
DD1
C1
C2
RESET TST1 TST2
MD
COM1-16
ML63187
LCD
SEG0-63
Note: V
MDB V
SS
is the power supply pin for the input-output ports.
DDI
Be sure to connect the V
pin either to the positive power supply pin (VDD) of this
DDI
device or to the positive power supply pin of the external memory.
Application Circuit Example with No Power Supply Backup
32/35
Page 33
¡ Semiconductor ML63187/63189B
APPLICATION CIRCUITS (ML63189B)
•Crystal oscillation is selected as low-speed
LCD
Crystal
32.768 kHz
C
G
5 to
25 pF
C
1.0 mF
h
1.5 V
C
0.1 mF
v
C
C
l
C
e
C
d
C
c
C
b
C
a
b12
1.0 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
XT0
XT1 V
DDH
V
DD
CB1 CB2
V
DDL
V
DD5
V
DD4
V
DD3
V
DD2
V
DD1
COM1-16
ML63189B
SEG0-63
C1
C
0.1 mF
12
Push SW
C2 RESET
TST1
Buzzer
TST2 MD
oscillation.
•RC oscillation is selected as high-speed oscillation.
•Ports are powered from external memory power source.
•C
is an IC power supply bypass capacitor.
v
•Values of C C
, and CG, are for reference only.
h
, Cb, Cc, Cd, Ce, Cl, C
a
OSC0
R
OSH
OSC1
PE.3 PE.2 PE.1 PE.0
PB.3 PB.2 PB.1 PB.0
PA.3 PA.2 PA.1 PA.0
P9.3 P9.2 P9.1 P9.0
P0.3 P0.2 P0.1 P0.0
V
DDI
b12
, C12,
V
DD
Note: V
MDB V
SS
is the power supply pin for the input and input-output ports.
DDI
Be sure to connect the V
pin either to the positive power supply pin (VDD) of this
DDI
device or to the positive power supply pin of the external memory.
Application Circuit Example with Power Supply Backup
33/35
Page 34
¡ Semiconductor ML63187/63189B
APPLICATION CIRCUITS (ML63189B)
•Crystal oscillation is selected as low-speed oscillation.
•Ceramic oscillation is selected as high-speed oscillation.
•Ports, external memory, and IC share their power supply.
•C
is an IC power supply bypass capacitor.
v
•Values of C C
, and CL1 are for reference only.
L0
, Cb, Cc, Cd, Ce, Cl, C12, CG,
a
CL0 30 pF
OSC0
Ceramic Resonator (Example: 1 MHz)
OSC1
C
PE.3 PE.2
L1
30 pF
PE.1 PE.0
PB.3 PB.2 PB.1 PB.0
PA.3 PA.2 PA.1 PA.0
P9.3 P9.2 P9.1 P9.0
P0.3 P0.2 P0.1 P0.0
V
DDI
V
DD
C
V
DD
G
5 to 25 pF
5.0 V
0.1 mF
C
v
C
l
C
e
C
d
C
c
C
b
C
a
C
Buzzer
Crystal
32.768 kHz
Open
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
0.1 mF
12
Push SW
XT0
XT1 V
DDH
V
DD
CB1 CB2 V
DDL
V
DD5
V
DD4
V
DD3
V
DD2
V
DD1
C1
C2
RESET TST1 TST2
MD
LCD
COM1-16
ML63189B
SEG0-63
Note: V
MDB V
SS
is the power supply pin for the input and input-output ports.
DDI
Be sure to connect the V
pin either to the positive power supply pin (VDD) of this
DDI
device or to the positive power supply pin of the external memory.
Application Circuit Example with No Power Supply Backup
34/35
Page 35
¡ Semiconductor ML63187/63189B
PACKAGE DIMENSIONS
(Unit : mm)
QFP128-P-1420-0.50-K
Mirror finish
Notes for Mounting the Surface Mount Type Package
Package material Lead frame material Pin treatment Solder plate thickness Package weight (g)
Epoxy resin 42 alloy Solder plating 5 mm or more
1.19 TYP.
The SOP, QFP, TSOP, TQFP, LQFP, SOJ, QFJ (PLCC), SHP, and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki’s responsible sales person on the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times).
35/35
Page 36
E2Y0002-29-62
NOTICE
1. The information contained herein can change without notice owing to product and/or technical improvements. Before using the product, please make sure that the information being referred to is up-to-date.
2. The outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. When planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs.
3. When designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature.
4. Oki assumes no responsibility or liability whatsoever for any failure or unusual or
unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range.
5. Neither indemnity against nor license of a third party’s industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. No responsibility is assumed by us for any infringement of a third party’s right which may result from the use thereof.
6. The products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). These products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. Such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems.
7. Certain products in this document may need government approval before they can be exported to particular countries. The purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these.
8. No part of the contents contained herein may be reprinted or reproduced without our prior permission.
9. MS-DOS is a registered trademark of Microsoft Corporation.
Copyright 1999 Oki Electric Industry Co., Ltd.
Printed in Japan
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