Datasheet ML4880CS, ML4880ES Datasheet (Micro Linear Corporation)

Page 1
FEATURING
Extended Commercial Temperature Range
–20°C to 70°C
for Portable Handheld Equipment
July 2000
ML4880*
Portable PC/PCMCIA Power Controller
GENERAL DESCRIPTION
The ML4880 Portable PC and PCMCIA Power Controller is a complete solution for DC/DC power conversion for portable computing systems with single or multiple PCMCIA slots.
The device provides two synchronous buck controllers to implement mixed voltage systems and a flyback controller for 12V VPP generation for PCMCIA slots. The flyback architecture enables generation of high currents (150mA or more per slot) on the 12V bus for multiple slot PCMCIA applications.
Each regulator can be independently switched off to fully isolate the load from the power supply. The PFM
FEATURES
Regulation to ±3% maximum: provides 2% PCMCIA
switch matrix margin
Two synchronous buck controllers for 3.3/3V, 5V
generation, and a flyback for high current, 12V generation from 5.5V to 18V input
Regulator power conversion efficiencies > 90%
Pulse frequency modulation for high efficiency
operation
Independent regulator shutdown for full load isolation
Adjustable current limit
Wide input voltage range (5.5V to 18V)
architecture will automatically adjust switching frequency at light loads in order to maintain power conversion efficiencies in excess of 90% over a wide output power range. (* Indicates Part is End Of Life as of July 1, 2000)
BLOCK DIAGRAM
V
IN
V
IN
5.5 – 18V
+
V
C
OUT
6V – 15V
TO SYSTEM
POWER
MANAGEMENT
V
IN
16
6
GND
7
GND
SHDN A
11
SHDN B
18
SHDN C
10
N DRV C
17
I
SENSE
3
V
FB
12
21
PWR GND C
C
C
15
V
BIAS
CIRCUITS
SHUTDOWN
LOGIC
REG
GATE
CLAMP
FLYBACK REGULATOR C
24
CLAMP
BUCK REGULATOR ABUCK REGULATOR B
CLAMP
GATE
CLAMP
CLAMP A
P DRV A
N DRV A I
SENSE
PWR GND A
VFB A
CLAMP B
P DRV B
N DRV B I
SENSE
PWR GND B
VFB B
2
13
14
A
4
23
9
1
19
20
B
5
22
8
V
IN
+
V
A
OUT
2.5 – 3.5V
+
V
B
OUT
4.5 – 5.0V
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ML4880
PIN CONFIGURATION
ML4880
24-Pin SOIC (S24)
CLAMP B CLAMP A
I
SENSE
I
SENSE
I
SENSE
GND GND
V
FB
V
FB
SHDN C SHDN A
V
FB
1 2
C A B
B A
C
3 4 5 6 7 8 9 10 11 12
TOP VIEW
24 23 22 21 20 19 18 17 16 15 14 13
CLAMP PWR GND A PWR GND B PWR GND C NDRV B PDRV B SHDN B NDRV C V
IN
V
REG
NDRV A PDRV A
PIN DESCRIPTION
PIN# NAME FUNCTION PIN# NAME FUNCTION
1 CLAMP B Gate clamp, regulator B 2 CLAMP A Gate clamp, regulator A 3I 4I 5I
C Current sense, regulator C
SENSE
A Current sense, regulator A
SENSE
B Current sense, regulator B
SENSE
6 GND Ground 7 GND Ground 8VFB B Feedback node, buck regulator B
9VFB A Feedback node, buck regulator A 10 SHDN C Shutdown input, regulator C 11 SHDN A Shutdown input, regulator A 12 VFB C Feedback node, regulator C
13 PDRV A P-channel drive, regulator A 14 NDRV A N-channel drive, regulator A 15 V 16 V
REG
IN
Linear regulator output
Power supply input voltage 17 NDRV C N-channel drive, regulator C 18 SHDN B Shutdown input, regulator B 19 PDRV B P-channel drive, regulator B 20 NDRV B N-channel drive, regulator B 21 PWR GND C Power Ground, regulator C 22 PWR GND B Power Ground, regulator B 23 PWR GND A Power Ground, regulator A 24 CLAMP Charge pump capacitor input
2
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ML4880
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
V
............................................................................................... 20V
IN
OPERATING CONDITIONS
VIN Range ..................................................... 5.5V to 18V
Temperature Range
ML4880CS ................................................ 0°C to 70°C
ML4880ES ............................................. –20°C to 70°C
Peak Driver Output Current ........................................ 2A
VFB Voltage .........................................GND – 0.3V to 6V
I
Voltage..................................................... ±500mV
SENSE
All Other Analog Inputs ......... GND – 0.3V to VIN + 0.3V
All Digital Inputs .................. GND – 0.3V to V
REG
+ 0.3V
Junction Temperature ............................................. 150°C
Storage Temperature Range .................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ..................... 150°C
Thermal Resistance (θJA)...................................... 80°C/W
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, V
PARAMETER CONDITIONS MIN TYP MAX UNITS
Shutdown Inputs
Input Low Voltage 0.8 V
Input High Voltage 2.0 V Input Bias Current –1 1 µA
Buck Regulator A
Duty Cycle Ratio VIN = 5.5V, I VFB A Threshold Voltage 1.21 1.25 1.29 V I
A Threshold Voltage –140 –200 –250 mV
SENSE
Transition Time CL = 1000pF, 0 to V
Buck Regulator B
Duty Cycle Ratio VIN = 5.5V, I VFB B Threshold Voltage 1.21 1.25 1.29 V I
B Threshold Voltage –140 –200 –250 mV
SENSE
Transition Time CL = 1000pF, 0 to V
Flyback Regulator C
Duty Cycle Ratio VIN = 5.5V, I
VFB C Threshold Voltage 1.21 1.25 1.29 V
I
C Threshold Voltage –140 –200 –250 mV
SENSE
Transition Time CL = 1000pF, 0 to V
Supply
Linear Regulator Output Voltage 7V VIN 18V 6.25 6.99 V Linear Regulator Load Regulation I(V VIN Current SHDN A/B/C = 5V 300 350 µA
= 14V, C(V
IN
) = 10µF, T
REG
VIN = 18V, I
) = 0 to 10mA 6.10 6.99 V
REG
SHDN A/B/C = 0V 350 400 µA
= Operating Temperature Range (Note 1)
A
A = VFB A = 0V 86 96 %
SENSE
REG
B = VFB B = 0V 92 98 %
SENSE
REG
C = VFBC = 0V 86 94 %
SENSE
C = VFBC = 0V 61 77 %
SENSE
REG
80 100 ns
80 100 ns
80 100 ns
Note 1: Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions.
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ML4880
FUNCTIONAL DESCRIPTION
The ML4880 converts a 5.5V to 18V input to three outputs via two synchronous buck controllers and a flyback controller. The two buck controllers utilize a unique current mode PFM control architecture that generate output voltages in the range of 2.5V to 3.5V (output A), and 4.5V to 5V (output B). The output current is set by external components, and can exceed 2A on each supply. The flyback controller also uses a current mode PFM control scheme and can be used to generate a 6V to 15V output. Again, the output current of the flyback is dependent on external components, and output currents of 500mA are obtainable. Even at light loads, the PFM architecture maintains high conversion efficiencies over a wide range of input voltages. If it is necessary to further extend battery life, the user can shutdown and fully disconnect each load from the input independently.
BIAS CIRCUITS
The bias circuits are comprised of a linear regulator and a precision voltage reference. The linear regulator produces a supply voltage (V V
pin should be bypassed to GND with a 4.7µF to
REG
10µF capacitor. The precision voltage reference is used by the feedback circuit of each controller to maintain an accurate output voltage.
) used by the control circuits. The
REG
GATE CLAMP
The gate clamp circuit provides a method of preventing the buck regulator P-channel MOSFET switches from accidentally turning on when the input is suddenly switched to a higher voltage. This condition can occur during start-up or when an adapter voltage is applied. As shown in the block diagram, the P DRV drivers are capacitively coupled to the gates.
Assume that P DRV is in the OFF state, or at V
REG
, and the gate voltage is held at VIN through the resistor. The gate­source voltage of the MOSFET is 0V and the switch stays off. If a higher input voltage (VIN + 5V for example) is suddenly applied with P DRV still in the OFF state, the source voltage of the MOSFET would jump up to VIN + 5V, but the gate would still be at VIN. The gate-source voltage becomes –5V and the P-channel MOSFET would turn on even though P DRV is still in the OFF state. In order to prevent the MOSFET from turning on, the gate clamp circuit senses the increase in the input voltage and pumps charge into the gate side of the coupling capacitor, quickly charging the capacitor to the new input voltage level.
The CLAMP pin requires a capacitor to GND in order for the gate clamp circuit to function properly. The capacitor value should be 1.5 to 2 times the value used for the coupling capacitor.
SHUTDOWN LOGIC
Each controller has a separate shutdown pin. By applying a logic high to the appropriate pin, the transconductance amplifier and current comparator of each controller (shown in Figures 1 and 3) can be disabled. This prevents switching from occurring and disconnects the load from the input. All other circuitry within the ML4880 remains active during shutdown.
T
OSCILLATOR/
ONE SHOT
V
CURRENT
COMPARATOR
ON
SHOOT THRU PROTECTION
SYNCHRONOUS
RECTIFIER
COMPARATOR
V
SR
Rgm
C
+
TRANSCONDUCTANCE
AMPLIFIER
BUCK CONTROLLERS
A block diagram of the buck controllers is shown in Figure
1. The circuit utilizes a constant ON-time PFM control architecture. The circuit determines the OFF-time by waiting for the inductor current to drop to a level set by the feedback voltage (VFB).
V
IN
C
R
SENSE
IN
L
V
OUT
C
OUT
R1
I
L
P DRV
N DRV
–18mV
+
I
SENSE
V
FB
+
1.25V
R2
Figure 1. Buck Controller Functional Diagram
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ML4880
The oscillator/one shot block generates a constant ON­time and a minimum OFF-time. The OFF-time is extended for as long as the output of the current comparator stays low. Note that the inductor current flows in the current sense resistor during the OFF-time. Therefore, a minimum OFF-time is required to allow for the finite circuit delays in sensing the inductor current. The ON-time is triggered when the current comparator’s output goes high. However, unlike conventional fixed ON-time controllers, the ML4880’s one shot has an inverse relationship with the input voltage as shown in Figure 4. Figure 5 plots the inductor voltage-ON-time product. Note that the volt­second product is nearly constant at voltages above 7V input. This results in an inductor current ripple of:
TVV
×−()
ON IN OUT
I
=
L
L
(1)
It is important to note that the ripple current does not vary in proportion with VIN, but remains nearly constant over a wide input voltage range.
The transconductance amplifier generates a current from the voltage difference between the reference and the feedback voltage, VFB. This current produces a voltage across Rgm that adds to the negative voltage that is developed across the current sense resistor. When the current level in the inductor drops low enough (a less negative sense voltage) to cause the voltage at the non­inverting input of the current comparator to go positive, the comparator trips and starts a new ON cycle. In other words, the current programming comparator controls the length of the OFF-time by waiting until the inductor current decreases to a value determined by the transconductance amplifier.
This technique allows the feedback transconductance amplifier’s output current to steer the current level in the inductor. The higher the transconductance amplifier’s output current, the higher the inductor current. For example, when the output voltage drops due to a load increase, the transconductance amplifier will increase its output current and generate a larger voltage across Rgm,
which in turn raises the inductor current trip level, shortening the OFF-time. At some level of increasing the output load, the transconductance amplifier can no longer continue to increase its output current. When this occurs, the voltage across Rgm reaches a maximum and the inductor current cannot increase. If the inductor current tries to increase, the voltage developed across the current sense resistor would become more negative, causing the non-inverting input of the current comparator to be negative, which extends the OFF-time and reduces the inductor current.
When the output voltage is too high, the transconductance amplifier’s output current will eventually become negative. However, since the inductor current flows in only one direction (assuming no shoot through current) the non-inverting input of the current comparator will also stay negative. This extends the OFF­time allowing the inductor current to decrease to zero and causing the converter to stop operation until the output voltage drops enough to increase the output current of the transconductance amp above zero.
In summary, the three operation modes can be defined by the voltage at the I
V
0V Discontinuous
SENSE
pin at the end of the OFF-time:
SENSE
current mode
0V > V
> –140mV Continuous
SENSE
current mode
–140mV > V
> –250mV Current limit
SENSE
The synchronous rectifier comparator and the two NOR gates make up the synchronous rectifier control circuit. The synchronous control does not influence the operation of the main control loop, and operation with a Schottky diode in place of the synchronous rectifier is possible, but at a lower conversion efficiency. The synchronous rectifier (N DRV) is turned on during the minimum OFF-time or whenever the I
pin goes below –18mV. N DRV will
SENSE
remain on until a new ON-time is started or until the I
pin goes above –18mV. When the ISENSE pin goes
SENSE
above –18mV, the current in the inductor has gone to zero
T
OFF(MIN)
V
C
T
ON
V
SR
I
L
Figure 2. One Shot and Synchronous Rectifier Timing Diagram
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ML4880
or the buck regulator is operating in a discontinuous current mode (DCM). Therefore, the synchronous rectifier comparator is used only for DCM operation. A timing diagram is shown in Figure 2.
FLYBACK CONTROLLER
A block diagram of the flyback regulator is shown in Figure 3. The circuit also utilizes a constant ON-time PFM control architecture. As with the buck controllers, the flyback controller determines the OFF-time by waiting for the inductor current to drop to a level set by the feedback voltage VFB. As a result of the control scheme, the valley of the inductor current ripple is programmed instead of the peak, and features an automatic transition into and out of burst mode which does not require additional control circuitry.
The flyback controller’s oscillator/one shot block has a constant ON-time and a minimum OFF-time similar to that of the buck controllers. The OFF-time is extended for as long as the current comparator’s output stays low. Again, since the inductor current flows in the current sense resistor during the OFF-time, a minimum OFF-time is required to allow for the finite circuit delays in sensing the inductor current. The ON-time is triggered when the current comparator’s output goes high. However, unlike conventional fixed ON-time controllers, the ML4880’s one shot has an inverse relationship with the input voltage as shown in Figure 4. Figure 5 plots the inductor voltage­ON-time product. Note that the volt-second product is nearly constant over the input voltage range. This results in an inductor current ripple of:
TV
×
ON IN
I
=
L
L
(2)
It is important to note that the ripple current does not vary in proportion with VIN, but remains nearly constant over a wide input voltage range.
The transconductance amplifier and current comparator operate in the same manner as the buck regulator. The current programming comparator controls the length of the OFF-time by waiting until the inductor current decreases to a value determined by the transconductance amplifier before starting a new ON-time.
Like the buck controllers, when the flyback’s output voltage drops due to a load increase, the transconductance amplifier will increase its output current and generate a larger voltage across Rgm, which in turn causes the current comparator’s output to go positive earlier or shortens the OFF-time. Conversely, when the output voltage is too high, the transconductance amplifier’s output current will eventually become negative. This holds the current comparator’s output low and extends the OFF-time causing the converter to stop operation until the output voltage drops enough to increase the output current of the transconductance amp above zero.
In summary, the flyback has three operation modes that can be defined by the voltage at the SENSE pin at the end of the OFF-time:
V
0V Discontinuous
SENSE
current mode
0V > V
> –140mV Continuous
SENSE
current mode
–140mV > VSENSE > –250mV Current limit
OSCILLATOR/
ONE SHOT
V
CURRENT
COMPARATOR
V
IN
T
ON
Rgm
C
+
TRANSCONDUCTANCE
AMPLIFIER
+
1.25V
N DRV
I
SENSE
V
FB
Figure 3. Flyback Controller Functional Diagram
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ML4880
DESIGN CONSIDERATIONS
A typical design can be implemented by using the following design procedure. Note that this procedure is not intended to give final values, but to give a good starting point, and provide the relationships necessary to make trade-off decisions. Some experimentation will be necessary to optimize values and to verify that the design operates over worst case conditions.
DESIGN SPECIFICATIONS
It is important to start with a clear definition of the design specifications. Make sure the specifications reflect worst case conditions. Key specifications include the minimum and maximum input voltage and the output voltage and load current for each output.
BUCK REGULATORS - INDUCTOR AND SENSE RESISTOR SELECTION
Figure 6 shows the inductor current of the step down regulators. The inductor current is made up of two components: the DC current level set by the transconductance amplifier, I current, I summation of I
II I
OUT SENSE L
. The figure also shows that I
L
SENSE
=+= +
1
22
and
V
R
1
/2 I
SENSE SENSE
, and the inductor ripple
SENSE
:
L
TVV
×−
ON IN OUT
is the
OUT
()
L
×
(3)
Inductor ripple currents in the range of 30% to 70% of the maximum output current are typical. As a good starting point set the inductor ripple current to 50% of the maximum output current:
TVV
×−
()
ON IN OUT
where F
I
=
L
= ratio of inductor ripple current to the
IRC
L
FI
IRC OUT MAX
()
(4)
maximum output current, or:
TVV
×−
()
ON IN OUT
L
=
05
I
×
.
OUT MAX
()
(5)
Calculate the inductance using the volt-seconds value given in Figure 5 at the maximum input voltage. Choose the nearest standard value, realizing the trade-offs mentioned before. Then, using the inductance value chosen, determine the actual inductor ripple current at the maximum and minimum input voltage using Equation 4 and Figure 5.
The sense resistor value can be determined using the inductor ripple current value calculated above and Equation 3 rearranged as follows:
R
SENSE
V
SENSE MIN
=
IIII
OUT MAX L MIN OUT MAX L MIN
()
1
() () () ()
∆∆
2
=
.
014
1
(6)
2
Therefore, the selection of the inductance value determines how much of the output current is made up of the ripple current. Higher inductor ripple current allows smaller inductor values, but results in higher peak currents, lower efficiency, and higher output voltage ripple.
(µs) T
ON
18
16
14
12
10
3.3V BUCK
8
12V FLYBACK
6
4
5V BUCK
45
40
35
30
25
20
VOLT-SECONDS (V-µs)
15
10
12V FLYBACK
3.3V BUCK
5V BUCK
2
0 5 10 15 20
VIN (V)
Figure 4. TON vs. V
IN
5
0510
V
(V)
IN
Figure 5. Volt-seconds vs V
15 20
IN
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ML4880
Having determined the values for the inductor and sense resistor, we can now specify the inductor peak current rating. This value is calculated at current limit and at the maximum input voltage, and is given by:
II I
L PK MAX SENSE MAX L MAX
(@ ) ( ) ( )
V
SENSE MAX
R
=+=
()
+=+
∆∆
I
L MAX
SENSE
() ()
025
V
.
R
SENSE
I
L MAX
(7)
For reliable operation, the inductor current rating should exceed the value calculated by 10%-20%.
For future reference, determine the peak inductor current at the minimum input voltage:
II I
L PK MIN SENSE MAX L MIN
(@ ) ( ) ( )
V
SENSE MAX
R
=+=
()
SENSE
I
+=+
∆∆
L MIN
() ()
V
.
025
R
SENSE
I
L MIN
(8)
Now the sense resistor’s power rating can be determined. The sense resistor must be able to carry the peak current in the inductor during the OFF-time:
PI R
R RMS OFF SENSE
SENSE
where
2
I
RMS OFF
2
()
,
()()()()
IIII
V
OUT
V
IN MAX
()
SENSE MAX
 
1
=−
()
 
22
++
()
SENSE MAX L PK MAX
(9)
()(@)
3
L PK MAX
(@ )
One final parameter should be specified: the winding resistance of the inductor. In general the winding resistance should be as low as possible, preferably in the low m range. Since the inductor is in series with the load at all times, the copper losses can be approximated by:
BUCK REGULATORS — MOSFET SELECTION
The switching MOSFETs must be logic level types with the ON resistance specified at VGS = 4.5V. In general, the ON resistance - gate charge product provides a good figure of merit by which to compare various MOSFETs, the lower the figure the better. The internal gate drivers of the ML4880 can drive over 100nC of total gate charge, but 60nC to 70nC is a more practical limit to ensure good switching times.
The drain-source breakdown voltage rating is determined by the input voltage. For input voltages up to 12V, a drain to source rating of 20V is acceptable. For input voltages up to 18V, a drain to source rating of 30V is recommended. For a more reliable design, look for MOSFETs that are avalanche rated.
In high current applications, the MOSFET’s power dissipation often becomes a major design factor. The I2R losses generate the largest portion of heat in the MOSFET package. Make sure that the MOSFETs are within their rated junction temperature at the maximum ambient temperature by calculating the temperature rise using the thermal resistance specifications.
The worst case power dissipation for the P-MOS switch occurs at the minimum input voltage and is determined as follows:
PIR
P MOS RMS ON DS ON( ) () ()
 
where
2
I
RMS ON
()
2
()()()()
IIII
SENSE MAX SENSE MAX L PK MIN L PK MIN
V
OUT
=
V
IN MIN
()
22
++
() ()(@) (@)
3
The worst case power dissipation for the N-MOS switch occurs at the maximum input voltage and is determined using:
(11)
 
2
PI R
CU OUT L
A good rule of thumb is to allow 2m of winding resistance per µH of inductance.
I
L
V
IN – VOUT
L
T
ON
V
T
OFF
Figure 6. Buck Regulator Inductor Current
8
OUT
L
(10)
I
I
LPK
L
I
SENSE
PIR
N MOS RMS OFF DS ON()()()
I
= I
OUT
SENSE
V
SENSE
=
R
SENSE
2
+ 1/2 I
L
t
(12)
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ML4880
BUCK REGULATORS — INPUT CAPACITOR SELECTION
The choice of the input capacitor is based on it’s ripple current and voltage ratings rather than its capacitance value. The input capacitor should be a low ESR type and located as close to the source of the P-MOS switch as possible. The input capacitor’s ripple current is determined by the load current and the input voltage, with the worst case condition occurring at V
II I
RMS C SENSE MAX L MAX
≈+
() () ()
IN
1
2
 
= 2 × V
IN
()
VVV
OUT IN OUT
V
OUT
IN
:
 
(13)
The capacitor’s voltage rating is based on the maximum input voltage, V
. Capacitor manufacturers typically
IN(MAX)
recommend derating the capacitor voltage rating by 20% to 50% for aluminum electrolytic types and 50% to 70% for tantalum types.
In high current applications it may necessary to add a 10µF bulk capacitor and a small 0.1µF ceramic capacitor to bypass VIN (pin 16) right at the ML4880.
BUCK REGULATORS — OUTPUT CAPACITOR SELECTION
The output capacitors determine the loop stability and the output ripple voltage. Use only low ESR capacitors intended for switching power supply applications, such as AVX TPS, Sprague 593D Sanyo OS-CON, or Nichicon PL series. To ensure stability, the minimum capacitance value is given by:
C
OUT
V
43.
OUT
 
T
ON MAX
R
()
SENSE
 
(14)
The maximum ESR value can be estimated using:
V
OUT
I
L MAX
()
(15)
ESR
The selected capacitor must meet both the capacitance and ESR requirements. As a final check, make sure the output capacitor can handle the ripple current, I
RMS(C
OUT
:
)
I
L MAX
I
RMS C
()
OUT
()
12
(16)
BUCK REGULATORS - OUTPUT VOLTAGE
The output of buck regulator A is adjustable and can be set to any voltage between 2.5V and 3.5V by connecting a resistor divider to the feedback pin as shown in Figure 1. Similarly, the output voltage of buck regulator B is adjustable and has a usable range of 4.5V to 5.0V. The resistor values R1 and R2 can be calculated using the following equation:
.
VV
125
OUT
RR
12
+
2
R
(17)
The value of R2 should be 125k or less to minimize bias current errors.
It is important to note that the accuracy of these resistors directly affects the accuracy of the output. Use precision resistors and set the nominal voltage approximately 1% to 2% high with no load in order to make up for the drops that normally occur when supplying heavy loads. This offset results in the best overall output accuracy over line and load.
FLYBACK REGULATOR — INDUCTOR AND SENSE RESISTOR SELECTION
Figure 7 shows the inductor current of the flyback regulator. The inductor current is made up of two components: the DC current level set by the transconductance amplifier, I current, I
. Therefore, the selection of the inductance
L
, and the inductor ripple
SENSE
value determines how much of the output current is made up of the inductor ripple current. Higher inductor ripple current allows smaller inductor values, but results in higher peak currents, lower efficiency, and higher output voltage ripple.
I
L
V
IN
L
T
ON
V
OUT
L
T
OFF
I
OUT
I
IL =
I
SENSE
= (I
L(PEAK)
VIN T
SENSE
L
V
=
R
ON
SENSE
SENSE
+ 1/2 IL)
V
VIN + V
t
IN
OUT
Figure 7. Flyback Regulator Inductor Current
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ML4880
The relationship of the inductor current to the output current is given by the following equation:
+
IN OUT
(18)
II I
=+
OUT SENSE L
1
22
VVVR
V
IN
+
IN OUT
=+
TVLV
SENSE
ON IN IN
SENSE
×
×
VV
The inductance value can be determined by setting the ripple current portion of Equation 18 to some percentage of the output current. Inductor ripple currents in the range of 50% to 80% of the maximum output current are typical. As a good starting point set the inductor ripple current to 65% of the maximum output current:
IN
 
(19)
TV
I
=
L
where F
×
ON IN
L
= ratio of inductor ripple current to the
IRC
FI
×
IRC OUT MAX
()
VV
IN OUT
+
V
maximum output current, or:
TV
ON IN MIN
L
=
.065
×
()
I
×+
OUT MAX
()
V
IN MIN
 
()
VV
IN MIN OUT
()
(20)
 
Calculate the inductance using the volt-seconds value given in Figure 5 at the minimum input voltage. Choose the nearest standard value, and determine the actual inductor ripple current at the maximum and minimum input voltage using Equation 19 and Figure 5.
Next, determine the sense resistor value using the inductor ripple current value calculated above using:
The winding resistance and the turns ratio of the coupled inductor need to be specified. In general the winding resistance should be as low as possible, preferably in the low milliohm range. A good rule of thumb is to allow 2 mW of winding resistance per mH of inductance. The turns ratio is specified at 1:1 for simplicity and availability.
FLYBACK REGULATOR - MOSFET SELECTION
The internal gate drive of the ML4880 limits the selection of the switching FET to logic level types with the ON resistance specified at VGS = 4.5V. Also, look for a FET with a maximum total gate charge of around 70nC.
The drain to source breakdown voltage rating is determined as follows:
VV V F
=+×()
DS IN MAX OUT DS
()
(24)
A safety derating factor, FDS, in the range of 1.5 to 2.0 is recommended due to the voltage spikes caused by the leakage inductance of a transformer. For a more reliable design, look for MOSFETs that are avalanche rated.
The maximum ON resistance of the MOSFET can be determined using the worst case power dissipation for the package type chosen. This assumes that the major portion of heat generated in the package is due to I2R losses.
P
R
DS ON
()
=
2
I
RMS ON
PKG
(25)
()
V
()
R
SENSE
=
I
OUT MAX
=
I
()
OUT MAX
VV
()
IN MIN OUT
()
 
SENSE MIN
VV
+
()
IN MIN OUT
V
V
IN MIN
014
.
+
()
()
IN MIN
 
1
I
2
1
2
()
L MIN
I
()
L MIN
(21)
Having determined the values for the inductor and sense resistor, the inductor peak current rating can now be specified. This value is calculated at current limit and at the maximum input voltage, and is given by:
II I
L PK MAX SENSE MAX L MAX
(@ ) ( ) ( )
V
=+=+
=+
SENSE MAX
()
R
SENSE
∆∆
025
V
I
L MAX
() ()
.
R
SENSE
I
L MAX
(22)
For reliable operation, the inductor current rating should exceed the value calculated by 10%-20%.
Now the sense resistor’s power rating can be determined. The sense resistor must be able to carry the peak current in the inductor, but only during the OFF-time:
PI R
R RMS OFF SENSE
2
SENSE
()
(23)
where,
()()()()
IIII
2
I
()
RMS OFF
V
IN MAX
=
VV
()
IN MAX OUT
SENSE MAX
()
+
22
++
()(@) (@)
SENSE MAX L PK MAX L PK MAX
()
3
where,
2
I
RMS ON
()
V
OUT
=
+
VV
IN MIN OUT
()
()()()()
IIII
SENSE MAX
 
2
++
SENSE MAX L PK MAX
()
()(@)
3
FLYBACK REGULATOR — RECTIFIER SELECTION
The output diode must be able to carry the worst case output current as well as withstand the worst case reverse voltage. The worst case output current occurs at current limit and at the maximum input voltage. Therefore, the average forward current rating of the output diode can be determined by the following:
I
I
D AVG
OUT MAX
==+
()
FR
025
() () ()
ID SENSE
.
TV
×
ON IN MAX IN MAX
2
L
×
VVF
IN MAX OUT ID
()
where,
F derating factor
=
ID
The derating factor is typically in the range of 0.5 to 0.9 depending on reliability goals. Typically a value of 0.8 is used for most applications.
The reverse voltage rating is determined by the sum of the output voltage and the maximum input voltage:
 
V
+
L PK MAX
(@ )
 
(26)
2
 
1
10
Page 11
ML4880
VV
+
()
F
VR
(27)
where,
OUT IN MAX
V
=
R
F derating factor
=
VR
Again a derating factor of 0.8 is typical for most applications.
FLYBACK REGULATOR - INPUT CAPACITOR SELECTION
The input capacitor should be a low ESR type and located as close to the primary winding of the transformer as possible. The capacitor’s ability to handle ripple current is the selection criteria used. The input capacitor’s ripple current is determined by the load current and the input voltage, with the worst case condition occurring at VIN = V
II I
RMS C SENSE MAX L MAX
() () ()
.
OUT
≈+
IN
1
2
 
×
VV
OUT IN
+
VV
OUT IN
 
(28)
The capacitor must also be able to handle the maximum input voltage. For reliable operation derate the capacitor voltage rating by 20% to 50% for aluminum electrolytic types and 50% to 70% for tantalum types.
FLYBACK REGULATOR - OUTPUT CAPACITOR SELECTION
The output capacitors determine the flyback regulator’s loop stability and the output ripple voltage. Use only low ESR capacitors intended for switching power supply applications. To ensure stability, the minimum capacitance value is given by:
L MIN
()
(29)
 
C
OUT
V
86.
OUT
 
T
ON MAX
R
SENSE
I
() ()
OUT MAX
I
The maximum ESR value can be estimated using:
V
OUT
I
L MAX
()
(30)
ESR
The selected capacitor must meet both the capacitance and ESR requirements. As a final check, make sure the output capacitor can handle the ripple current, I
RMS(C
OUT
.
)
II
RMS C RMS C
() ()
OUT IN
(31)
FLYBACK REGULATOR - OUTPUT VOLTAGE
The output of the flyback regulator is adjustable and can be set to any voltage between 6.0V and 15.0V by connecting a resistor divider to the feedback pin as shown in Figure 3. The resistor values R1 and R2 can be calculated using the following equation:
125
VV
OUT
.
RR
12
+
2
R
(32)
The value of R2 should be 125k or less to minimize bias current errors.
It is important to note that the accuracy of these resistors directly affects the accuracy of the output. Use precision resistors and set the nominal voltage approximately 1% to 2% high in order to make up for the ML4880’s load regulation. This offset results in the best overall output accuracy over line and load.
LAYOUT
Proximity of passive devices and adequate power and ground planes are critical for reliable operation of the circuit. In general, use the top layer for the high current connections and the bottom layer for the quiet connections such as GND, feedback and current sense. Some more specific guidelines follow.
1. The connection from the current sense resistor to the I
pin should be made by a separate trace and
SENSE
located as close to the lead of the resistor as possible. The trace length from the sense resistor to the ML4880 should be kept as short as possible and away from switching components and their traces.
2. The trace lengths from the buck regulator’s input capacitor to the switching MOSFET, from the MOSFETs to the inductor, from the synchronous rectifier MOSFET to the SENSE resistor, and from the inductor to the output capacitor should all be as short as possible. The flyback regulator’s trace length from the input capacitor to the inductor, from the inductor to the MOSFET, from the sense resistor to the inductor, and from the diode to the output capacitor should also be kept short to minimize noise and ground bounce.
3. The high current ground paths need to be kept separate from the signal ground paths. The GND connection should be made at a single-point star ground. It is very important that the ground for the ML4880 ground pins (pins 6 and 7) be made using a separate trace.
4. Note: Concentrating on keeping the current sense and high current connections short as well as keeping the switching components and traces away from the sensitive analog components and traces during layout will eliminate the majority of problems created by a poor layout.
5. The VIN and V located close to the ML4880 for adequate filtering of the IC’s internal bias voltage.
6. Remote sensing the output for improved load regulation can be implemented with the ML4880. Any output can be remote sensed by using the top of the external resistor divider as the remote sense point.
bypass capacitors need to be
REG
11
Page 12
ML4880
ML4480
16
V
IN
11
SHDN A
18
SHDN B
10
SHDN C
17
N DRV C
3
I
SENSE
C
21
PWR GND C
12
V
FB
C
GND
GND
V
REG
CLAMP
5.5V to 18V
C1
33µF
25V
C2
33µF
25V
C3
33µF
25V
C4
10µF
35V
C5
0.1µF
C8
68µF
20V
C9
68µF
20V
C10
10nF
R4
887k
1%
R5
100k
1%
D1
MBRS340T3
T1
39µH
V
IN
Q1 A&B
Si9955
R6
0.12
C6
0.1µF
C7
10µF
35V
15 24
67
R12
80m
R14
124k
1%
D5*
L2
33µH
C17
10nF
R13
383k
1%
C18
100µF
10V
C19
100µF
10V
*Optional
Q5
IRF7403
Q4
IRF7406
R11
100k
D4
IN4148
C16
47nF
R8
80m
C12
47nF
Q3
IRF7403
Q2
IRF7406
R7
100k
D2
IN4148
C11
68nF
D3*
C13
10nF
R9
205k
1%
R10
124k
1%
L1
33µH
C14
100µF
10V
C15
100µF
10V
3.3V, 2A
5.0V, 2A
12V, 0.5A
3.3 SHDN
5.0 SHDN
12 SHDN
V
IN
V
IN
V
IN
CLAMP A
P DRV A
N DRV A
I
SENSE
A
PWR GND A
V
FB
A
CLAMP B
P DRV B
N DRV B
I
SENSE
B
PWR GND B
V
FB
B
21314423
9
11920522
8
12
Figure 8. Typical Application Circuit
Page 13
SUGGESTED VENDORS
See Table 1 for a list of suggested component manufacturers.
TABLE 1: COMPONENT SUPPLIERS
COMPONENT MANUFACTURER PART NUMBER PHONE
SENSE RESISTORS Dale WSL Series (402) 563-6506
IRC LRC Series (512) 992-7900
INDUCTORS Coilcraft DO/DT Series (708) 639-6400
Coiltronics OCTA-PAC Series (305) 781-8900 Dale LPE-6562 Series (605) 665-9301
LPT-4545 Series Premier Magnetics VTK & HTK Series (714) 362-4211 Pulse Engineering LCI & HCI Series (619) 674-8100 Sumida CD & CDR Series (708) 956-0666 XFMRS, Inc. Surface Mt Series (317) 834-1066
CAPACITORS AVX TPS Series (207) 282-5111
Sprague 593D Series (708) 956-0667 Sanyo SC & SA Series (619) 661-6835 Nichicon PL Series (708) 843-7500 Panasonic HFQ Series (201) 348-5227
ML4880
SEMICONDUCTORS Diodes, Inc. SK Series (805) 446-4800
International Rectifier IRF7XXX Series (310) 322-3331 Motorola MMSF Series (602) 302-8056
MMDF Series National Semiconductor NDS94XX (800) 272-9959
NDS99XX Siliconix Littlefoot Series (408) 970-5700
Litefoot Series
13
Page 14
ML4880
PHYSICAL DIMENSIONS
0.600 - 0.614
(15.24 - 15.60)
0.050 BSC (1.27 BSC)
0.024 - 0.034 (0.61 - 0.86)
(4 PLACES)
24
PIN 1 ID
1
inches (millimeters)
Package: S24
24-Pin SOIC
0.291 - 0.301 (7.39 - 7.65)
0.095 - 0.107 (2.41 - 2.72)
0.398 - 0.412
(10.11 - 10.47)
0º - 8º
0.090 - 0.094 (2.28 - 2.39)
0.012 - 0.020 (0.30 - 0.51)
SEATING PLANE
0.005 - 0.013 (0.13 - 0.33)
0.022 - 0.042 (0.56 - 1.07)
0.009 - 0.013 (0.22 - 0.33)
14
Page 15
ML4880
ORDERING INFORMATION
PART NUMBER TEMPERATURE RANGE PACKAGE
ML4880CS0°C to 70°C24-PIN SOIC (S24) (End Of Life)
ML4880ES–20°C to 70°C24-PIN SOIC (S24) (Obsolete)
© Micro Linear 1997 is a registered trademark of Micro Linear Corporation Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946; 2619299. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel before deciding on a particular application. DS4880-01
16
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
04/28/97 Printed in U.S.A.
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