The ML4865 is a high voltage, continuous conduction
boost regulator designed for DC to DC conversion in
multiple cell battery powered systems. Continuous
conduction allows the regulator to maximize output
current for a given inductor. The maximum switching
frequency can exceed 200kHz, allowing the use of small,
low cost inductors. The ML4865 is capable of start-up with
input voltages as low as 1.8V and generates a 12V output
with output voltage accuracy of ±4%.
Unlike most boost regulators, the ML4865 isolates the
load from the battery when the SHDN pin is high. An
integrated synchronous rectifier eliminates the need for an
external Schottky diode and provides a lower forward
voltage drop, resulting in higher conversion efficiency. In
addition, low quiescent battery current and variable
frequency operation result in high efficiency even at light
loads. The ML4865 requires only one inductor and two
capacitors to build a very small regulator circuit capable
of achieving conversion efficiencies approaching 90%.
FEATURES
■ Guaranteed full load start-up and operation at 1.8V
input
■ Continuous conduction mode for high output current
■ Very low quiescent current
■ Pulse frequency modulation and internal synchronous
rectification for high efficiency
■ Maximum switching frequency > 200kHz
■ Minimum external components
■ Low ON resistance internal switching FETs
■ Fixed 12V output can be adjusted to lower output
voltages
BLOCK DIAGRAM
V
IN
3
+
–
V
L1
SHDN
4
START-UP
CONTROL
BOOST
PWR GND
6
V
L2
SYNCHRONOUS
RECTIFIER
CONTROL
+
–
5
FEEDBACK
CONTROL
2.42V
GND
SHUTDOWN
CONTROL
+
–
2
SHDN
V
OUT
SENSE
7
8
1
1
Page 2
ML4865
PIN CONFIGURATION
8-Pin SOIC (S08)
SENSE
GND
V
IN
V
L1
TOP VIEW
ML4865
1
2
3
4
8
7
6
5
V
OUT
SHDN
V
L2
PWR GND
PIN DESCRIPTION
PINNAMEFUNCTION
1SENSEProgramming pin for setting the
output to any value lower than the
normal fixed voltage
2GNDGround
3V
4V
IN
L1
Battery input voltage
Boost inductor connection
PINNAMEFUNCTION
5PWR GNDReturn for the internal power
transistors
6V
L2
Boost inductor connection
7SHDNPulling this pin to VIN through an
external resistor shuts down the
regulator, isolating the load from
the input.
8V
OUT
Boost regulator output
2
Page 3
ML4865
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
OPERATING CONDITIONS
Temperature Range
ML4865CS-2 .............................................. 0ºC to 70ºC
ML4865ES-2 ............................................–20ºC to 70ºC
VIN Voltage Range
Without external rectifier ............................ 1.8V to 6V
Voltage on any Pin ......................... GND – 0.3V to 16.5V
Peak Switch Current (I
Average Switch Current (I
) ......................................... 2A
PEAK
)..................................... 1A
AVG
With external rectifier................................ 1.8V to 10V
Junction Temperature .............................................. 150ºC
Storage Temperature Range ...................... –65ºC to 150ºC
Lead Temperature (Soldering, 10 sec) ..................... 150ºC
Unless otherwise specified, VIN = Operating Voltage Range, TA = Operating Temperature Range (Note 1)
SYMBOLPARAMETERCONDITIONSMINTYPMAXUNITS
SUPPLY
I
PFM REGULATOR
VIN CurrentSHDN = 0 or V
IN
V
Quiescent CurrentV
OUT
VL Quiescent Current0V < VL2 < V
OUT
= V
IN
OUT(MAX)
OUT
1025µA
+ 5%2030µA
–11µA
I
L(PEAK)IL
V
OUT
FEEDBACK
SHUTDOWN
Note 1:
Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Peak CurrentVIN = 5V0.81.21.6A
Output VoltageSee Figure 1
VIN = 5V, SENSE = open, I
Load RegulationSee Figure 1
V
= 2.4V, I
IN
VIN = 5V, I
Threshold Voltage2.382.422.48V
Input Bias Current–150150nA
Threshold VoltageV
Input Bias Current–150150nA
SHDN
OUT
= high to low0.40.81.6V
= 011.7212.112.48V
OUT
= 40mA11.5212.0V
OUT
= 160mA11.5212.0V
3
Page 4
ML4865
V
IN
100µF
ML4865
SENSE
GND
V
IN
V
L1
(Sumida CD75)
V
SHDN
PWR GND
27µH
OUT
V
L2
I
OUT
100µF
Figure 1. Application Test Circuit
V
L1
A1
+
–
BOOST
L1
6
Q1
V
L2
Q3
Q2
A2
SHUTDOWN
CONTROL
+
–
FEEDBACK
CONTROL
SHDN
V
OUT
SENSE
7
C1
V
+
OUT
–
8
R1
1
V
IN
3
V
IN
150mΩ
4
CONTROL
+
–
I
SET
A3
2.42V
Figure 2. PFM Regulator Detailed Block Diagram
I
L
0
V
OUT
V
L
0
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
Figure 3. Inductor Current and Voltage Waveforms
I
L(MAX)
I
SET
R2
4
Page 5
FUNCTIONAL DESCRIPTION
ML4865
The ML4865 combines a unique form of current mode
control with a synchronous rectifier to create a boost
converter that can deliver high currents while maintaining
high efficiency. Current mode control allows the use of a
very small, high frequency inductor and output capacitor.
Synchronous rectification replaces the conventional
external Schottky diode with an on-chip PMOS FET to
reduce losses, eliminate an external component, and
allows for load disconnect. Also included on-chip are an
NMOS switch and current sense resistor, further reducing
the number of external components, which makes the
ML4865 very easy to use.
REGULATOR OPERATION
The ML4865 is a variable frequency, current mode
switching regulator. Its unique control scheme converts
efficiently over more than three decades of load current.
A detailed block diagram of the boost converter is shown
in Figure 2.
Error amplifier A3 converts deviations in the desired
output voltage to a small current, I
current is measured through a 150mW resistor which is
amplified by A1. The boost control block matches the
average inductor current to a multiple of the I
by switching Q1 on and off. The peak inductor current is
limited by the controller to about 1.2A.
At light loads, I
inductor discharge cycle causing Q1 to stop switching.
Depending on the load, this idle time can extend to
tenths of seconds. While the circuit is not switching, only
25µA of supply current is drawn from the output. This
allows the part to remain efficient even when the load
current drops below 250µA.
will momentarily reach zero after an
SET
. The inductor
SET
current
SET
Amplifier A2 and the PMOS transistor Q2 work together
to form a low drop diode. When transistor Q1 turns off,
the current flowing in the inductor causes pin 6 to go
high. As the voltage on VL2 rises above V
A2 allows the PMOS transistor Q2 to turn on. In
discontinuous operation, (where IL always returns to zero),
A2 uses the resistive drop across the PMOS switch Q2 to
sense zero inductor current and turns the PMOS switch
off. In continuous operation, the PMOS turn off is
independent of A2 and is determined by the boost control
circuitry.
Typical inductor current and voltage waveforms are
shown in Figure 3.
, amplifier
OUT
SHUTDOWN
The SHDN pin should be held low for normal operation.
Raising the shutdown voltage above the threshold level
will disable the synchronous rectifier, Q2 and Q3, and
force I
and disconnects the body diode of Q2 from the output. As
a result, the output voltage is allowed to drop below the
input voltage and current is prevented from flowing from
the input to the output.
to zero. This prevents switching from occurring
SET
FEEDBACK
The SENSE pin should be left open or bypassed to ground
for normal operation. The addition of the resistor divider
R1 and R2 causes the input of error amplifier A3 to reach
the threshold voltage before the internal resistors do. This
allows the ML4865 to provide output voltages lower than
the preset 12V if desired.
5
Page 6
ML4865
DESIGN CONSIDERATIONS
INPUT VOLTAGE RANGE
The input voltage range determines whether an external
Schottky diode is necessary or optional. If the input
voltage is 6V or lower, the ML4865 can be operated as a
stand alone boost regulator with a shutdown that fully
isolates the input from the output. Adding an optional
Schottky diode extends the input voltage range up to 10V,
and improves the efficiency and the output current
capability. However, the external diode now provides a
leakage path from the input to the output during
shutdown.
OUTPUT CURRENT CAPABILITY
The maximum current available at the output of the
regulator is related to the maximum inductor current by
the ratio of the input to output voltage and the full load
efficiency. The maximum inductor current is dependent on
the input voltage. The full load efficiency may be as low
as 65% when the ML4865 is used without a Schottky
diode and can exhibit an input voltage dependence when
an external diode is used. The maximum output current
can be determined by using the typical performance
curves shown in Figures 4 and 5, or by calculation using
the following empirical equation:
V
I
OUT MAX
IN
OUT
I
h
IN()
(A)(1)
@
V
Where, for applications using the internal synchronous
rectifier:
V
IN
I
OUT MAX
IV
ININ
h
=
@´´+´
V
OUT
=´+
00504..
16
27
V
...
00504065
IN()
065.
900
700
500
(mA)
OUT
I
300
100
0
04810
26
WITHOUT
EXTERNAL
SCHOTTKY
VIN (V)
WITH
EXTERNAL
SCHOTTKY
Figure 4. Output Current vs. Input Voltage
100
VIN = 10V
90
80
VIN = 5V
70
VIN = 2V
EFFICIENCY (%)
60
50
1101001000
I
(mA)
OUT
V
= 12V
OUT
with Schottky
without Schottky
Figure 5. Efficiency vs. Output Current
And for applications using an external Schottky:
V
IN
I
OUT MAX
IV
ININ
h
@++
=´+
00704..
=´+
0 0250 65..V
27
V
OUT
IN
VV
... .
0 070 40 0250 65
16
ININ()
16
27
The curves and the equations are based on the operating
circuit shown in Figure 7. It is recommended to verify the
current capability and efficiency for the components
selected.
6
300
250
200
150
(mA)
IN
I
100
50
WITHOUT
EXTERNAL
SCHOTTKY
0
0461082
VIN (V)
WITH
EXTERNAL
SCHOTTKY
Figure 6. No Load Input Current vs. Input Voltage for the
Circuit of Figure 7
Page 7
ML4865
DESIGN CONSIDERATIONS
(Continued)
INDUCTOR SELECTION
The ML4865 is able to operate over a wide range of
inductor values. A value of 22µH or 33µH is a good
choice, but any value between 15µH and 50µH is
acceptable. As the inductor value is changed the control
circuitry will automatically adjust to keep the inductor
current under control. Choosing an inductance value of
less than 15µH will reduce the component’s footprint, but
the efficiency and maximum output current may drop.
It is important to use an inductor that is rated to handle
1.5A peak currents without saturating. Also look for an
inductor with low winding resistance. A good rule of
thumb is to allow 5 to 10mW of resistance for each µH of
inductance.
The final selection of the inductor will be based on tradeoffs between size, cost and efficiency. Inductor tolerance,
core and copper loss will vary with the type of inductor
selected and should be evaluated with a ML4865 under
worst case conditions to determine its suitability.
Several manufacturers supply standard inductance values
in surface mount packages:
L
C
OUT
10
=
(F)(2)
V
OUT
The output capacitor’s Equivalent Series Resistance (ESR)
and Equivalent Series Inductance (ESL), also contribute to
the ripple. Just after the NMOS transistor, Q1, turns off,
the current in the output capacitor ramps quickly to
between 0.5A and 1.5A. This fast change in current
through the capacitor’s ESL causes a high frequency (5ns)
spike to appear on the output. After the ESL spike settles,
the output still has a ripple component equal to the
inductor discharge current times the ESR. To minimize
these effects, choose an output capacitor with less than
10nH of ESL and 200mW of ESR.
Suitable tantalum capacitors can be obtained from the
following vendors:
AVXTPS Series(207) 282-5111
Sprague593D Series(207) 324-4140
KemetT495 Series(864) 963-6300
INPUT CAPACITOR
Coilcraft(847) 639-6400
Coiltronics(561) 241-7876
Dale(605) 665-9301
Sumida(847) 956-0666
OUTPUT CAPACITOR
The output capacitor filters the pulses of current from the
switching regulator. Since the switching frequency will
vary with inductance, the minimum output capacitance
required to reduce the output ripple to an acceptable
level will be a function of the inductor used. Therefore, to
maintain an output voltage with less than 100mV of ripple
(due to capacitance) at full load current, use the
following equation:
ML4865
SENSE
V
IN
C1
47µF
GND
V
IN
V
L1
PWR GND
(Sumida CD75)
V
OUT
SHDN
V
22µH
Due to the high input current drawn at startup and
possibly during operation, it is recommended to decouple
the input with a capacitor with a value of 22µF to 68µF.
This filtering prevents the input ripple from affecting the
ML4865 control circuitry, and also improves the
efficiency by reducing the I squared R losses during the
charge cycle of the inductor. Again, a low ESR capacitor
(such as tantalum) is recommended.
It is also recommended that low source impedance
batteries be used. Otherwise, the voltage drop across the
source impedance during high input current situations will
cause the ML4865 to fail to start-up or to operate
unreliably. In general, for two cell applications the source
impedance should be less than 200mW, which means that
small alkaline cells should be avoided.
D1
MBR0520L
L2
R1
1MΩ
V
47µF
OUT
C2
Figure 7. Typical Application Circuit.
7
Page 8
ML4865
DESIGN CONSIDERATIONS
SHUTDOWN
The SHDN pin is a high impedance input and is noise
sensitive. Either drive the SHDN input from a low
impedance source or bypass the pin to GND with a 10nF
ceramic capacitor.
SENSE
The SENSE pin should be left open or bypassed to ground
for normal operation. The output can be set to voltages
lower than the preset value by adding a resistor divider.
The output voltage can be determined from the following
equation:
RR2
V
=
2421.
OUT
where R1 and R2 are connected as shown in Figure 2. The
value of R2 should be 1MW or less to minimize bias
current errors. Choose an appropriate value of R2 and
calculate the value of R1.
RR2
1
EXTERNAL SCHOTTKY RECTIFIER
Due to excessive power dissipation, an external Schottky
rectifier is required when operating at input voltages
above 6V. Even for applications where the input voltage is
below 6V, the use of an external rectifier may be
necessary to achive efficiency or output current
requirements.
=´-
´
V
OUT
.
242
+
(V)(3)
R2
1
(W)(4)
(Continued)
If an external Schottky is required, look for a device with
a voltage rating of 20V or greater. The average forward
current rating should be at least 500mA, and the forward
voltage should be 600mV or less. Suitable Schottky
rectifiers can be obtained from the following vendors:
Diodes, IncB120(805) 446-4800
Int’l Rectifier 10BQ040(310) 322-3331
MotorolaMBR0520L(602) 897-5056
LAYOUT
Good layout practices will ensure the proper operation of
the ML4865. Some layout guidelines follow:
• Use adequate ground and power traces or planes
• Keep components as close as possible to the ML4865
• Use short trace lengths from the inductor to the VL1 and
VL2 pins and from the output capacitor to the V
• Use a single point ground for the ML4865 ground pin,
and the input and output capacitors
• Separate the ground for the converter circuitry from the
ground of the load circuitry and connect at a single
point
A sample layout is shown in Figure 8.
OUT
pin
Figure 8. Sample ML4865 Layout
8
Page 9
DESIGN EXAMPLE
In order to design a boost converter using the ML4865,
it is necessary to define the values of a few parameters.
For this example, assume the following design
parameters:
VIN = 4.75 to 5.25V
V
= 12V
OUT
ML4865
I
OUT(MAX)
Shutdown required
First, it must be determined whether the ML4865 is
capable of delivering the output current without an
external Schottky rectifier. This is done using Equation 1:
I
OUT MAX
ImA
OUT MAX()
Next, select an inductor. As previously mentioned, the
recommended inductance is 22µH. Make sure that the
peak current rating of the inductor is at least 1.5A, and
that the DC resistance of the inductor is in the range of
110 to 220mW. A Sumida CD75-220 meets these
requirements.
Finally, the value of the output capacitor is determined
using Equation 2:
C
= 150mA
101022
=
OUT
V
OUT
V
IN
16
V
525
27
OUT
.
0 05 5250 4065188
05
27
12
L
=
12
V
...@+00504065
IN()
.. ..@ +=
H
m
V
=
18 3
m
F
.
The closest standard value would be a 22µF capacitor
with an ESR rating of 200mW. An AVX
TPSD226M025R0200 would be a good choice.
As mentioned previously, the use of an input supply
bypass capacitor is highly recommended. Since the
output capacitance meets the minimum input
capacitance recommended it can also be used for the
input.
9
Page 10
ML4865
PHYSICAL DIMENSIONS
0.017 - 0.027
(0.43 - 0.69)
(4 PLACES)
0.055 - 0.061
(1.40 - 1.55)
inches (millimeters)
Package: S08
8-Pin SOIC
0.189 - 0.199
(4.80 - 5.06)
8
PIN 1 ID
1
0.050 BSC
(1.27 BSC)
0.012 - 0.020
(0.30 - 0.51)
SEATING PLANE
0.148 - 0.158
(3.76 - 4.01)
0.059 - 0.069
(1.49 - 1.75)
0.004 - 0.010
(0.10 - 0.26)
0.228 - 0.244
(5.79 - 6.20)
0º - 8º
0.015 - 0.035
(0.38 - 0.89)
0.006 - 0.010
(0.15 - 0.26)
ORDERING INFORMATION
PART NUMBEROUTPUT VOLTAGETEMPERATURE RANGEPACKAGE
ML4865CS-212V0ºC to 70ºC8-Pin SOIC (S08)
ML4865ES-2 (Obsolete)12V–20ºC to 70ºC8-Pin SOIC (S08)
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502;
5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897;
5,717,798; 5,742,151; 5,754,012; 5,757,174. Japan: 2,598,946; 2,619,299; 2,704,176. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability
arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits
contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits
infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult
with appropriate legal counsel before deciding on a particular application.
DS4865-01
1
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
www.microlinear.com
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