Page 1
July 2000
PRELIMINARY
ML4769*
2 Cell, Adjustable Output Boost Regulator
with Load Disconnect
GENERAL DESCRIPTION
The ML4769 is a continuous conduction boost regulator
designed for DC to DC conversion in multiple cell battery
FEATURES
■ Guaranteed full load start-up and operation at
1.8V input
power systems. Continuous conduction allows the
regulator to maximize output current for a given inductor.
■ Continuous conduction mode for high output current
The maximum switching frequency can exceed 200kHz,
allowing the use of small, low cost inductors. The ML4769
is capable of start-up with input voltages as low as 1.8V.
■ Pulse Frequency Modulation and internal synchronous
rectification for high efficiency
The output voltage can be set anywhere between 3.0V
and 5.5V by an external resistor divider connected to the
■ Isolates the load from the input during shutdown
SENSE pin.
■ Minimum external components
An integrated synchronous rectifier eliminates the need
for an external Schottky diode and provides a lower
■ Low ON resistance internal switching FETs
forward voltage drop, resulting in higher conversion
efficiency. In addition, low quiescent current and variable
■ Low supply current
frequency operation result in high efficiency even at light
loads. The ML4769 requires only a few external
■Adjustable output voltage (3V to 5.5V)
components to build a very small regulator capable of
achieving conversion efficiencies approaching 85%.
The SHDN input allows the user to stop the regulator from
switching, and provides complete isolation of the load * Some Packages Are Obsolete
from the battery.
BLOCK DIAGRAM
V
IN
2
+
–
V
L1
SHDN
1
START-UP
CONTROL
BOOST
PWR GND
6
V
L2
SYNCHRONOUS
RECTIFIER
CONTROL
+
–
2.57V
GND
8
SHUTDOWN
CONTROL
+
–
3
SHDN
V
OUT
SENSE
7
5
4
1
Page 2
ML4769
PIN CONFIGURATION
ML4769
8-Pin SOIC (S08)
V
L1
V
IN
GND
SENSE
PIN DESCRIPTION
PIN NAME FUNCTION
1V
2V
L1
IN
3 GND Ground
4 SENSE Programming pin for setting the output
Boost inductor connection
Battery input voltage
voltage
1
2
3
4
TOP VIEW
8
7
6
5
PIN NAME FUNCTION
5V
6V
PWR GND
SHDN
V
L2
V
OUT
OUT
L2
Boost regulator output
Boost inductor connection
7 SHDN Pulling this pin to VIN shuts down the
regulator, isolating the load from the
input
8 PWR GND Return for the NMOS output transistor
2
Page 3
ML4769
ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond
which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and
functional device operation is not implied.
V
............................................................................................... 7V
OUT
Voltage on any other pin ..... GND - 0.3V to V
Peak Switch Current (I
Average Switch Current (I
) ......................................... 2A
PEAK
)..................................... 1A
AVG
OUT
+ 0.3V
OPERATING CONDITIONS
Temperature Range
ML4769CS-X .............................................. 0ºC to 70ºC
ML4769ES-X ........................................... -20ºC to 70ºC
VIN Operating Range .......................1.8V to V
V
Operating Range ................................ 3.0V to 5.5V
OUT
OUT
- 0.2V
Junction Temperature............................................. 150ºC
Storage Temperature Range.................... –65ºC to 150ºC
Lead Temperature (Soldering, 10 sec) ...................260ºC
Thermal Resistance (qJA) .................................. 160ºC/W
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN = Operating Voltage Range, TA = Operating Temperature Range (Note 1)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SUPPLY
I
I
OUT(Q)VOUT
PFM REGULATOR
VIN Current VIN = V
IN
Quiescent Current SHDN = 0V 25 35 µA
- 0.2V, SHDN = 0V 3 6 µA
OUT
VIN = SHDN = 2.4V, V
V
= SHDN = 2.4V, 14 20 µA
IN
V
= V
OUT
OUT(NOM)
= 0V 0.3 1 µA
OUT
I
PEAKIL
V
SENSE
SHUTDOWN
V
IL
V
IH
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst case test conditions.
Peak Current 750 850 950 mA
SENSE Comparator Threshold Voltage 2.52 2.57 2.62 V
Line Regulation I
Load Regulation VIN = 2.4V, I
Input Low Voltage 0.5 V
Input High Voltage VIN - 0.5 V
Input Bias Current -100 100 nA
= 0, See Figure 1 4.95 5.05 5.15 V
OUT
£ 180mA 4.85 4.95 5.15 V
See Figure 1
OUT
3
Page 4
ML4769
27µH
(Sumida CD75)
ML4769
V
PWR GND
L1
V
IN
100µF
V
IN
GND
SENSE
SHDN
V
V
OUT
I
L2
OUT
V
IN
100µF
259kΩ
268kΩ
Figure 1. Application Test Circuit
I
L
Q1
PWR GND
6
V
L2
8
SYNCHRONOUS
RECTIFIER
CONTROL
I
SET
2.57V
GND
+
–
3
SHUTDOWN
CONTROL
Q3
Q2
A2
A3
+
–
SHDN
V
OUT
SENSE
7
V
5
4
OUT
R1
C
OUT
R2
1
V
L1
V
IN
2
R
SENSE
START-UP
+
–
SHDN
A1
BOOST
CONTROL
Figure 2. PFM Regulator Block Diagram
I
L(MAX)
I
I
SET
L
0
V
OUT
V
L2
0
Q1 ON
Q2 OFF
Q1 OFF
Q2 ON
Figure 3. Inductor Current and Voltage Waveforms
4
Page 5
ML4769
FUNCTIONAL DESCRIPTION
The ML4769 combines a unique form of current mode
control with a synchronous rectifier to create a boost
converter that can deliver high currents while maintaining
high efficiency. Current mode control allows the use of a
very small high frequency inductor and output capacitor.
Synchronous rectification replaces the conventional
external Schottky diode with an on-chip P-channel
MOSFET to reduce losses, eliminate an external
component, and provide the means for load disconnect.
Also included on-chip are an N-channel MOSFET main
switch and current sense resistor.
REGULATOR OPERATION
The ML4769 is a variable frequency, current mode
switching regulator. Its unique control scheme converts
efficiently over more than three decades of load current.
A block diagram of the boost converter including the key
external components is shown in Figure 2.
Error amp A3 converts deviations in the desired output
voltage to a small current, I
measured through a current sense resistor (R
is amplified by A1. The boost control block matches the
average inductor current to a multiple of the I
by switching Q1 on and off. The peak inductor current is
limited by the controller to about 900mA.
At light loads, I
inductor discharge cycle, causing Q1 to stop switching.
Depending on the load, this idle time can extend to
tenths of a second. When the circuit is not switching, only
25µA of supply current is drawn from the output. This
allows the part to remain efficient even when the load
current drops below 250µA.
Amplifier A2 and the PMOS transistor Q2 work together
to form a low drop diode. When transistor Q1 turns off,
the current flowing in the inductor causes VL2 to go high.
As the voltage on VL2 rises above V
allows the PMOS transistor Q2 to turn on. In
discontinuous operation, (where IL always returns to zero),
A2 uses the resistive drop across the PMOS switch Q2 to
sense zero inductor current and turns the PMOS switch
off. In continuous operation, the PMOS turn off point is
independent of A2 and is determined by the boost control
circuitry.
Typical inductor current and voltage waveforms are
shown in Figure 3.
SHUTDOWN
The ML4769 output can be shut down by pulling the
SHDN pin high (to VIN). When SHDN is high, the
regulator stops switching, the control circuitry is powered
down, and the body diode of the PMOS synchronous
rectifier is disconnected from the output. By switching
Q1, Q2, and Q3 off, the load is isolated from the input.
This allows the output voltage to be independent of the
input while in shutdown.
will momentarily reach zero after an
SET
. The inductor current is
SET
SENSE
SET
, amplifier A2
OUT
) which
current
DESIGN CONSIDERATIONS
OUTPUT CURRENT CAPABILITY
The maximum current available at the output of the
regulator is related to the maximum inductor current by
the ratio of the input to output voltage and the conversion
efficiency. The maximum inductor current is limited by
the boost controller to about 600mA. The conversion
efficiency is determined mainly by the internal switches
as well as the external components, but can be estimated
at about 80%. The maximum output current can be
determined by using the typical performance curves
shown in Figures 4 and 5, or by calculation using the
following equation:
V
I
OUT MAX
Since the maximum output current is based on when the
inductor current goes into current limit, it is not
recommended to operate the ML4769 at the maximum
output current continuously. Applications that have high
transient load currents should be evaluated under worst
case conditions to determine suitability.
INDUCTOR SELECTION
The ML4769 is able to operate over a wide range of
inductor values. A value of 10µH is a good choice, but
any value between 5µH and 33µH is acceptable. As the
inductor value changes, the control circuitry will
automatically adjust to keep the inductor current under
control. Choosing an inductance value of less than 10µH
will reduce the component’s footprint, but the efficiency
and maximum output current may drop.
It is important to use an inductor that is rated to handle
1.0A peak currents without saturating. Also look for an
inductor with low winding resistance. A good rule of
thumb is to allow 5 to 10mW of resistance for each 1µH of
inductance.
The final selection of the inductor will be based on tradeoffs between size, cost and efficiency. Inductor tolerance,
core and copper loss will vary with the type of inductor
selected and should be evaluated with a ML4769 under
worst case conditions to determine its suitability.
Several manufacturers supply standard inductance values
in surface mount packages:
Coilcraft (847) 639-6400
Coiltronics (561) 241-7876
Dale (605) 665-9301
Sumida (847) 956-0666
=
!
IN MIN
()
+
0 0392 0 488 0144
16
27
V
OUT
VA
...
OUT()
"
-
#
#
$
(1)
5
Page 6
ML4769
DESIGN CONSIDERATIONS (Continued)
OUTPUT CAPACITOR
The output capacitor filters the pulses of current from the
switching regulator. Since the switching frequency will
vary with inductance, the minimum output capacitance
required to reduce the output ripple to an acceptable
level will be a function of the inductor used. Therefore, to
maintain an output voltage with less than 100mV of ripple
at full load current, use the following equation:
L
C
OUT
44
=
V
OUT
(2)
The output capacitor’s Equivalent Series Resistance (ESR)
and Equivalent Series Inductance (ESL), also contribute to
the ripple. Just after the Q1 turns off, the current in the
output capacitor ramps quickly to between 0.3A and
600
500
V
= 3V
400
OUT
0.9A. This fast change in current through the capacitor’s
ESL causes a high frequency (5ns) spike to appear on the
output. After the ESL spike settles, the output still has a
ripple component equal to the inductor discharge current
times the ESR. To minimize these effects, choose an
output capacitor with less than 10nH of ESL and less than
100mW of ESR.
Suitable tantalum capacitors can be obtained from the
following vendors:
AVX (207) 282-5111
Kemet (846) 963-6300
Sprague (207) 324-4140
90
V
= 3V
OUT
V
= 5.5V
80
OUT
(mA)
300
OUT
I
200
100
0
Figure 4. I
350
300
250
200
(nA)
IN
150
I
100
50
V
= 5.5V
OUT
1.5
VIN (V)
vs. VIN Using the Circuit of Figure 8
OUT
4.53.5 5.52.5
EFFICIENCY (%)
70
VIN = 2.4V
60
1 10 100 1000
Figure 5. Efficiency vs. I
160
120
80
(µA)
IN
I
V
= 3V
OUT
40
I
(mA)
OUT
Using the Circuit of Figure 8
OUT
V
= 5.5V
OUT
0
1.0 3.0 5.0
VIN (V)
7.0
0
1.0 2.0 3.0 5.0
VIN (V)
Figure 6. Input Leakage vs. VIN in Shutdown Figure 7. No Load Input Current vs. V
6
4.0
IN
Page 7
ML4769
DESIGN CONSIDERATIONS (Continued)
In applications where the ML4769 is operated at or near
the maximum output current, it is recommended to add a
10nF to 100nF ceramic capacitor from V
optimum value of the high frequency bypass capacitor is
dependent on the layout and the value of the bulk output
capacitor selected.
INPUT CAPACITOR
Due to the high input current drawn at startup and
possibly during operation, it is recommended to decouple
the input with a capacitor with a value of 47µF to 100µF.
This filtering prevents the input ripple from affecting the
ML4769 control circuitry, and also improves the
efficiency by reducing the I2R losses during the charge
cycle of the inductor. Again, a low ESR capacitor (such as
tantalum) is recommended.
It is also recommended that low source impedance
batteries be used. Otherwise, the voltage drop across the
source impedance during high input current situations will
cause the ML4769 to fail to start up or to operate
unreliably. In general, for two cell applications the source
impedance should be less than 400mW, which means that
small alkaline cells should be avoided.
SHUTDOWN
The input levels of the SHDN pin are CMOS compatible.
To guarantee proper operation, SHDN must be pulled to
within 0.5V of GND or VIN to prevent excessive power
dissipation and possible oscillations.
SETTING THE OUTPUT VOLTAGE
The adjustable output of the ML4769 requires an external
feedback resistor divider to set V
can be determined from the following equation:
. The output voltage
OUT
to GND. The
OUT
LAYOUT (Continued)
• Use a single point ground for the ML4769 PWR GND
pin and the input and output capacitors, and connect
the GND pin to PWR GND using a separate trace
• Separate the ground for the converter circuitry from the
ground of the load circuitry and connect at a single
point
• Route the feedback trace away from the VL2 trace to
avoid noise pickup
• Route the high frequency bypass capacitor from a
V
location near the output voltage setting resistor
OUT
to the GND pin
DESIGN EXAMPLE
In order to design a boost converter using the ML4769,
it is necessary to define the values of a few parameters.
For this example, assume that VIN = 3.0V to 3.6V,
V
= 5.0V, and I
OUT
First, it must be determined whether the ML4769 is
capable of delivering the output current. This is done
using Equation 1:
IAmA
OUT MAX()
The next step is to select an inductor. As previously
mentioned, the recommended inductance is 10µH. Make
sure that the peak current rating of the inductor is at least
1.0A, and that the DC resistance of the inductor is
between 50mW and 100mW.
Finally, the value of the output capacitor is determined
using Equation 2:
OUT(MAX)
3
+
27
5
!
= 250mA.
...=
0 0392 5 0 488 0144 266
05
"
-=
#
$
RR2
+
V
=
OUT
where R1 and R2 are connected as shown in Figure 2. The
value of R2 should be 250kW or less to minimize bias
current errors. Choose an appropriate value for R2 and
calculate R1.
()
2571.
R2
(3)
LAYOUT
Good layout practices will ensure proper operation of the
ML4769. Some layout guidelines follow:
• Use adequate ground and power traces or planes
• Keep components as close as possible to the ML4769
• Use short trace lengths from the inductor to the V
VL2 pins and from the output capacitor to the V
L1
OUT
and
pin
C
The closest standard value would be a 100µF capacitor
with an ESR rating of 100mW. If such a low ESR value
cannot be found, two 47µF capacitors in parallel could
also be used. Since the 250mA output current requirement
is close to the 266mA maximum, a 10nF capacitor from
V
to GND is recommended.
OUT
Finally, the values of R1 and R2 are calculated using
equation 3. Assuming R2 = 250kW:
R
The complete circuit is shown in Figure 8. As mentioned
previously, the use of an input supply bypass capacitor is
strongly recommended.
44 10
=
OUT
V
50
.
257
.
V
50
.
250 250 236=
m
kkk1
m
F
=
88
-=
WWW
H
7
Page 8
ML4769
(Sumida CD54)
V
L1
R2
250kΩ
V
IN
GND
SENSE
Package: S08
8-Pin SOIC
V
IN
C
IN
100µF
Figure 8. Design Example Schematic Diagram
PHYSICAL DIMENSIONS inches (millimeters)
0.189 - 0.199
(4.80 - 5.06)
8
10µH
ML4769
PWR GND
R1
236kΩ
SHDN
V
V
OUT
SHUTDOWN
L2
V
OUT
C
OUT
100µF
10nF
0.017 - 0.027
(0.43 - 0.69)
(4 PLACES)
0.055 - 0.061
(1.40 - 1.55)
1
0.012 - 0.020
(0.30 - 0.51)
SEATING PLANE
ORDERING INFORMATION
PART NUMBER TEMPERATURE RANGE PACKAGE
ML4769CS (Obsolete) 0°C to 70°C 8-Pin SOIC (S08)
ML4769ES -20°C to 70°C 8-Pin SOIC (S08)
PIN 1 ID
0.050 BSC
(1.27 BSC)
0.148 - 0.158
(3.76 - 4.01)
0.059 - 0.069
(1.49 - 1.75)
0.228 - 0.244
(5.79 - 6.20)
0.004 - 0.010
(0.10 - 0.26)
0º - 8º
0.015 - 0.035
(0.38 - 0.89)
0.006 - 0.010
(0.15 - 0.26)
© Micro Linear 1998. is a registered trademark of Micro Linear Corporation. All other trademarks are the property of their respective owners.
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502;
5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897;
5,717,798. Japan: 2,598,946; 2,619,299; 2,704,176. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design. Micro Linear does not assume any liability
arising out of the application or use of any product described herein, neither does it convey any license under its patent right nor the rights of others. The circuits
contained in this data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to whether the illustrated circuits
infringe any intellectual property rights of others, and will accept no responsibility or liability for use of any application herein. The customer is urged to consult
with appropriate legal counsel before deciding on a particular application.
8
DS4769-01
2092 Concourse Drive
San Jose, CA 95131
Tel: (408) 433-5200
Fax: (408) 432-0295
www.microlinear.com
3/26/98 Printed in U.S.A.
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