Page 1
March 1997
ML4667
Low Power 10BASE-FL Transceiver
GENERAL DESCRIPTION
The ML4667 is a low power high output current pin
compatible version of the industry standard ML4662. The
ML4667 10Base-FL transceiver combined with either the
ML4622 or ML4624 fiber optic quantizer provide all
functionality required to implement both an internal and
external IEEE 802.3 10Base-FL MAU interface that allows
it to be directly connected to industry standard
manchester encoder/decoder chips or and AUI cable.
The ML4667 provides a highly integrated solution that
requires a minimal number of external components. The
ML4667 is compliant to the IEEE 802.3 10Base-FL
standard. The transmitter offers a 100mA maximum
current driven output that directly drives a fiber optic LED
transmitter. Jabber, a 1MHz idle signal, and SQE Test are
fully integrated onto the chip.
The receiver accepts and ECL level input from the
ML4622 or ML4624 fiber optic quantizer. The 1MHz idle
signal is removed and the AUI output is activated when
the receive squelch criteria is exceeded. A Link Monitor
function is also provided for low light detection.
BLOCK DIAGRAM
FEATURES
■ Combined with the ML4622 or ML4624, offers a
complete implementation of an 10Base-FL Medium
Attachment Unit (MAU)
■ Pin compatible with the ML4662 Transceiver
■ Incorporates an AU interface for use in an external
MAU or an internal MAU
■ 100mA max LED output current drive
■ Single +5 volt supply ±10%
■ No crystal or clock required
■ On-chip Jabber, 1MHz idle, and SQE Test with enable/
disable option
■ Five network status LED outputs
+5V
SQEN/JABD V
Tx+
10
Tx–
11
COL+
2
COL–
3
Rx+
6
Rx–
7
21 8 13 23 1 28 16 15 24
AUI
RECEIVER
Tx
SQUELCH
AUI
DRIVER
AUI
DRIVER
V
CC
(+5V)GND
1MHz
IDLE
SIGNAL
SQE
10MHz GATED
OSCILLATOR
LOOPBACK
MUX
Tx
Rx
Tx
CC
(+5V)
FIBER OPTIC
LED DRIVER
JABBER
DRIVERS
RTSET NC/PEAK
RECEIVE SQUELCH
FREQUENCY
RECEIVER
LED
19174 12
LINE
TxOUT
18
LMON
IN
22
RxIN+
26
RxIN–
25
27
LMONXMTRCVJABCLSNLBDISRRSET
BIAS
+5V
1
Page 2
ML4667
PIN CONNECTION
NC/GND
Rx+
Rx–
V
CC
V
CC
Tx+
Tx–
ML4667
28-Pin PLCC (Q28)
SQEN/JABD
COL–
COL+
CLSN
JAB
4 3 2 1 28 27 26
5
6
7
8
9
10
11
12 13 14 15 16 17 18
BIAS
RxIN+
25
24
23
22
21
20
19
RxIN–
LMON
LBDIS
LMON
IN
GND
GND
NC/PEAK
RTSET
RRSET
NC
XMT
RCV
Tx
CC
V
TxOUT
2
Page 3
PIN DESCRIPTION
ML4667
PIN NAME FUNCTION
1 CLSN Indicates that a collision is taking
place. Active low LED driver, open
collector. Event is extended with
internal timer for visibility.
2 COL+ Gated 10MHz oscillation used to
3 COL– indicate a collision, SQE test, or
jabber. Balanced differential line
driver outputs that meet AUI
specifications.
4 SQEN/JABD SQE Test Enable, Jabber Disable.
When tied low, SQE test is disabled,
when tied high SQE test is enabled.
When tied to BIAS both SQE test and
Jabber are disabled.
5 NC/GND No connection. This pin may be
grounded.
6 Rx+ Manchester encoded receive data
7 Rx– output to the local device. Balanced
differential line driver outputs that
meet AUI specifications.
8VCC+5 volt power input.
9V
10 Tx+ Balanced differential line receiver
11 Tx– inputs that meet AUI specifications.
12 RTSET Sets the current driven output of the
13 RRSET A 1% 61.9kΩ resistor tied from this
14 NC No Connection
15 XMT Indicates that transmission is taking
CC
These inputs may be transformer, AC
or DC coupled. When transformer or
AC coupled, the BIAS pin is used to
set the common mode voltage
transmitter.
pin to VCC sets the biasing currents
for internal nodes.
place. Active low LED driver, open
collector. Event is extended with
internal timer for visibility.
PIN NAME FUNCTION
19 NC/PEAK Normally this pin can be left
floating. (tying it to GND or VCC is
OK too.) Some fiber optic LEDs may
need an additional peaking circuit
to speed-up the rise and fall times.
For this case, tie pin 19 (NC/PEAK)
to pin 18 (TxOUT). When using the
HP HFBR 1414, let pin 19 float.
Using the peaking circuit may
deteriorate optical overshoot and
undershoot.
20 GND Ground reference.
21 GND Ground reference.
22 LMON
23 LBDIS Loopback Disable. When this pin is
24 LMON Link Monitor LED status output.
25 RxIN– Fiber optic receive pair. This ECL
26 RXIN+ level signal is received from the
IN
Link Monitor Input from the
ML4622 or ML4624. This input
must be low (active) for the receiver
to unsquelch.
tied to VCC, the AUI transmit pair
data is not looped back to the AUI
receive pair, and collision is
disabled. When this pin is tied to
GND (normal operation), the AUI
transmit pair data is looped back to
the AUI receiver pair.
This pin is pulled low when
LMON
transitions on RxIN± indicating and
idle signal or active data. If either
LMONIN goes high or transitions
cease on RxIN±, LMON will go
high, Active low LED driver, open
collector.
ML6422 or ML4624 fiber optic
quantizer. When this signal exceeds
the receive squelch requirements,
and the LMONIN input is low, the
receive data is buffered and sent to
the AUI receive outputs.
is low and there are
IN
16 RCV Indicates that the transceiver is
receiving a frame from the optical
input. Active low LED driver, open
collector. Event is extended with
internal timer for visibility.
17 VCCTx +5 volt supply for LED driver.
18 TxOUT Fiber optic LED driver output.
27 BIAS BIAS output voltage for the AUI
Tx+, Tx– inputs when they are AC
coupled.
28 JAB Jabber network status LED. When in
the Jabber state, this pin will be low
and the transmitter will be disabled.
In the Jabber “OK” state this pin will
be high. Open collector TTL output.
3
Page 4
ML4667
ABSOLUTE MAXIMUM RATINGS
Output Current
TxOUT .............................................................. 120mA
Absolute maximum ratings are those values beyond which
the device could be permanently damaged. Absolute
maximum ratings are stress ratings only and functional
device operation is not implied.
Power Supply Voltage Range
VCC..................................................... GND –0.3 to 6V
Junction Temperature .............................................. 150°C
Storage Temperature Range .................... –65°C to +150°C
Lead Temperature (Soldering) .................................. 260°C
Thermal Resistance (θJA)...................................... 68°C /W
OPERATING CONDITIONS
Input Voltage Range
Digital Inputs (SQEN, LMONIN, LBDIS)
.................................................. GND –0.3 to V
Tx+, Tx–, RxIN+, RxIN– ............ GND –0.3 to V
CC
CC
Input Current
RRSET, RTSET, JAB, CLSN, XMT, RCV, LMON ...... 60mA
+0.3
+0.3
Supply Voltage (V
) ........................................... 5V ± 5%
CC
LED on Current ....................................................... 10mA
RRSET .......................................................... 61.9kΩ ± 1%
RTSET ............................................................. 162Ω ± 1%
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, TA = Operating Temperature Range, V
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
CC
V
I
OUT
V
OL
SQ
Power Supply Current ICC:V
While Transmitting
LED Drivers IOL = 10mA (Note 3) 0.8 V
Transmit Peak Output Current RTSET = 162Ω, 475260mA
Transmit Squelch Voltage Level –300 –250 –200 mV
(Tx+, Tx–)
= 5V, RTSET = 162Ω (Note 2) 120 mA
CC
V
= V
CC
Tx = 5V ±5% (Note 4)
CC
= 5V ± 10% (Note 1)
CC
V
V
V
V
V
V
V
INCM
DO
CM
DOO
BIAS
SQE
LBTH
Common mode Input Voltage 2 VCC – 0.5 V
(Tx±, RxIN±)
Differential Output Voltage ±550 ±1200 mV
(Rx±, COL±)
Common Mode 4.0 V
Output Voltage (Rx±, COL±)
Differential Output ±40 mV
Voltage Imbalance (Rx±, COL±)
BIAS Voltage 3.2 V
SQE/JABD SQE Test Disable 0.3 V
Both Disabled 1.5 V
Both Enabled VCC – 0.5
LBDIS Threshold Disabled VCC – 0.10 V
Enabled 1 V
CC
– 2
4
Page 5
ML4667
AC ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER MIN TYP MAX UNITS
TRANSMIT
F
TXIDF
P
TXDC
t
TXNPW
t
TXODY
t
TXLP
t
TXFPW
t
TXSOI
t
TXSDY
t
TXJ
RECEIVE
F
RXSFT
t
RXODY
t
RXFX
t
RXSDY
t
RXJ
t
AR
t
AF
COLLISION
Transmit Idle Frequency 0.85 1.25 MHz
Transmit Idle Duty Cycle 45 55 %
Transmit Turn-On Pulse Width 20 ns
Transmit Turn-On Delay 200 ns
Transmit loopback Start up Delay 500 ns
Transmit Turn Off Pulse Width 180 ns
Transmit Start of Idle 400 2100 ns
Transmit Steady State Propagation Delay 15 50 ns
Transmit Jitter into 31Ω Load ±1.5 ns
Receive Squelch Frequency Threshold 2.51 4.5 MHz
Receive Turn-On Delay 270 ns
Last Bit Received to Slow Decay Output 230 300 ns
Receive Steady State Propagation Delay 15 50 ns
Receive Jitter ±1.5 ns
Differential Output Rise Time 20% to 80% (Rx±, COL±)4ns
Differential Output Fall Time 20% to 80% (Rx±, COL±)4ns
t
CPSQE
t
SQEXR
F
CLF
P
CLPDC
t
SQEDY
t
SQETD
Collision Present to SQE Assert 0 350 ns
Time for SQE to Deactivate After Collision 0 700 ns
Collision Frequency 8.5 11.5 MHz
Collision Pulse Duty Cycle 40 50 60 %
SQE Test Delay (Tx Inactive to SQE) 0.6 1.6 µs
SQE Test Duration 0.5 1.0 1.5 µs
JABBER AND LED TIMING
t
JAD
t
JRT
t
JSQE
t
LED
t
LLPH
t
LLCL
Note 1: Limits are guaranteed by 100% testing, sampling, or correlation with worst-case test conditions.
Note 2: This does not include the current from the AUI pull-down resistors, or LED status outputs.
Note 3: LED drivers can sink up to 20mA, but V
Note 4: Does not include prebias current for fiber optic LED which would typically be 3mA.
Jabber Activation Delay 20 70 150 ms
Jabber Reset Unjab Time 250 450 750 ms
Delay from Outputs Disabled to Collision Oscillator On 100 ns
RCV, CLSN, XMT On Time 8 16 32 ms
Low Light Present to LMON High 3 5 10 µs
Low Light Present to LMON Low 250 750 ms
will be higher.
OL
5
Page 6
FIBER OPTIC RCVR
FIBER OPTIC CABLE
FIBER OPTIC CABLE
FIBER OPTIC
TRANSMITTER
ML4667
ML4622
GND
AUL.CP–
AUL.CP+
AUL.TX–
AUL.TX+
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
CHASSIS REF
AUL.RX–
AUL.RX+
AULPWR+
AULPWR–
CI
D0
D1
8
7
5
4
2
1
16
15
13
12
10
9
360Ω
360Ω
7
10
27
39Ω
11
2
360Ω
360Ω
COL–
COL+
Tx–
BIAS
Tx+
Rx+
Rx–
XMT RCV CLSN JAB LMON
RRSET
RTSET
Tx
OUT
15 16 1 28
24
ALL
510Ω
RP1
LBDIS
RxIN+
RxIN–
V
CC
V
CC
18
12
23
13
26
25
22
2
18
91758
0.1
510Ω
RP1
D1
VR1
0.1µ33µ
+
4.7µ
+
+
0.1µ
4.7µH
4.7µH
4.7
0.1
+VRF
–VRF
IN OUT
Q1
LM340
–V
RF
–V
RF
–V
RF
+V
RF
+V
RF
+V
RF
2
1
4
5
8
73
R17
10Ω
0.1
0.01
0.01
–V
RF
6
3
2,6,7
+5V
0.1µF
6
39Ω
0.1µF
3
C17
R1
R3
C16
R4
R5
R6
R2
GND
LMON
IN
BIAS
(27)
C2 C3 C4 C5
C10
C11
L1
L2
C13
C7
C8
C15
V
CC
ECL–
C
F1
C
F2
V
IN
–
V
IN
+
V
DC
CTIMER
V
REF
V
THADJ
CMPEN
TTL
OUT
GND
TTL
TTL
LINK
MON
ECL+
GND
11
16
15 14
13
5
4
3
6
7
12
9
10
+5V NC
C6
.05
C9
R16
1kΩ
5pF
C12
0.1µF
162Ω ±1%
61.9KΩ ±1%
+5V
+5V
+5V
R8
R7
P1
C1
SQEN/JABD
19
NOTE: IF TTLOUT IS USED, TIE GNDTTL TO
UNFILTERED GROUND AND REMOVE L1.
IF TTLOUT AND ECL OUTPUTS ARE BOTH
USED, ADD 3K PULLDOWN RESISTORS AT
ECL OUTPUTS.
HP HFBR1414
OR
OPTEK
OPC1414
HP HFBR2416
OR
OPTEK
OPC2416
ML4667
6
Figure 1. ML4667 Schematic Diagram
Page 7
ML4667
VCCTx
TxOUT
I
OUT
SYSTEM DESCRIPTION
Figure 1 shows a schematic diagram of the ML4667 in an
internal or external 10Base-FL MAU. On one side of the
transceiver is the AU interface and on the other is the fiber
optic interface. The AU interface is AC coupled when
used in an external transceiver or can be AC or DC
coupled when used in an internal transceiver. The AU
interface for an external transceiver includes isolation
transformers, some biasing resistors, and a voltage
regulator for power.
The fiber optic side of the transceiver requires an external
fiber optic transmitter, fiber optic receiver, and the
ML4622 or ML4624 fiber optic quantizers. The transmitter
uses a current driven output that directly drives the fiber
optic transmitter. The receive side of the transceiver
accepts the data after passing through the fiber optic
receiver and the ML4622/ML4624 fiber optic quantizer.
AU INTERFACE
The AUI interface consists of 3 pairs of signals: DO, CI
and DI (Figure 1). The DO pair contains transmit data
from the DTE which is received by the transceiver and
sent out onto the fiber optic cable. The DI pair contains
valid data that has been either received from the fiber
optic cable or looped back from the DO, and output
through the DI pair to the DTE. The CI pair indicates
whether a collision has occurred. It is an output that
oscillates at 10MHz if a collision Jabber or SQE Test has
taken place, otherwise it remains idle.
When the transceiver is external, these three pair are AC
coupled through isolation transformers, while an internal
transceiver may be AC or DC coupled. For the AC
coupled interface, DO (which is an input) must be DC
biased (shifted up in voltage) for the proper common
mode input voltage. The BIAS pin serves this purpose.
When DC coupled, the transmit pair coming from the
serial interface provides this common mode voltage, and
the BIAS pin is not connected.
The two 39Ω 1% resistors tied to the Tx+ and Tx– pins
provide a point to connect the common mode bias voltage
as discussed above, and they provide the proper matching
termination for the AUI cable. The CI and DI pair, which
are output from the transceiver to the AUI cable, require
360Ω pull down resistors when terminated with a 78Ω
load. However on a DTE card, CI and DI do not need 78Ω
terminating resistors. This also means that the pull down
resistors on CI and DI can be 1kΩ or greater depending
upon the particular Manchester encoder/decoder chip
used. Using higher value pull down resistors as in a DTE
card will save power.
TRANSMISSION
The transmit function consists of detecting the presence of
data from the AUI DO input (Tx+, Tx–) and driving that data
onto the fiber optic LED transmitter. A positive signal on the
Tx+ lead relative to the Tx– lead of the DO circuit will result
in no current, hence the fiber optic LED is in a low light
condition. When Tx+ is more negative than Tx–, the ML4667
will sink current into the chip and the LED will light up.
Before data will be transmitted onto the fiber optic cable
from the AUI interface, it must exceed the squelch
requirements for the DO pair. The Tx squelch circuit serves
the function of preventing any noise from being transmitted
onto the fiber. This circuit rejects signals with pulse widths
less than typically 20ns (negative going), or with levels less
than –250mV. Once Tx squelch circuit has unsquelched, it
looks for the start of idle signal to turn on the squelch circuit
again. The transmitter turns on the squelch again when it
receives an input signal at TxIN± that is more positive than
–250mV for more than approximately 180ns.
At the start of a packet transmission, no more than 2 bits are
received from the DO circuit and are not transmitted onto
the fiber optic cable. The difference between start-up delays
(bit loss plus steady-state propagation delay) for any two
packets that are separated by 9.6µs or less will not exceed
200ns.
FIBER OPTIC LED DRIVER
The output stage of the transmitter is a current mode switch
which develops the output light by sinking current through
the LED into the TxOUT pin. Once the current requirement
for the LED is determined, the RTSET resistor is selected.
The following equation is used to select the correct RTSET
resistor:
RTSET
=
52mA
I
OUT
162Ω
(1)
The ML4667 transmitter provides a 100mA maximum
current output which requires the RTSET resistor to equal
60Ω. The transmitter enters the idle state when it detects
start of idle on Tx+ and Tx– input pins. After detection, the
transmitter switches to a 1MHz output idle signal.
The output current is switched through the TxOUT pin
during the on cycle, and through the V
Tx pin during the
CC
off cycle (Figure 2). Since the sum of the current in these
two pins is constant, VCCTx should be connected as close
as possible to the VCC connection for the LED (Figure 2).
The AUI drivers are capable of driving the full 50 meters
of cable length and have a rise and fall time of typically
4ns. In the idle state, the outputs go to the same voltage to
prevent DC standing current in the isolation transformers.
Figure 2. Fiber Optic LED Driver Structure.
7
Page 8
ML4667
V
CC
VCCTx
51Ω
51Ω
51Ω
TxOUT
RTSET = 560Ω
I
= 15.9mA
OUT
ECL
Figure 3. Converting Optical LED Driver Output to
Differential ECL.
If not driving an optical LED directly, a differential output
can be generated by tying resistors from VCCTx and TxOUT
to VCC as shown in figure 3. The minimum voltage on
these two pins should not be less than VCC – 2V.
RECEPTION
The input to the transceiver comes from the ECL outputs
of the ML4622 or ML4624. At this point it is a clean
digital ECL signal. At the start of packet reception no more
than 2.5 bits are received from the fiber cable and not
transmitted onto the DI circuit. The receive squelch will
reject frequencies lower than 2.51MHz and will also
reject any receive input if the LMONIN pin is high.
While in the unsquelch state, the receive squelch circuit
looks for the start of idle signal at the end of the packet.
Start of idle occurs when the input signal remains idle for
more than 160ns. When start of idle is detected, the
receive squelch circuit returns to the squelch state and the
start of idle signal is output on the DI circuit (Rx+, Rx–).
COLLISION
Whenever the receiver and the transmitter are active at
the same time the chip will activate the collision output,
except when loopback is disabled (LBDIS = VCC). The
collision output is a differential square wave matching the
AUI specifications and capable of driving a 78Ω load. The
frequency of the square wave is 10MHz ± 15% with a 60/
40 to 40/60 duty cycle. The collision oscillator also is
activated during SQE Test and Jabber.
LOOPBACK
The loopback function emulates a 10Base-T transceiver
whereby the transmit data sent by the DTE is looped back
over the AUI receive pair. Some LAN controllers use this
loopback information to determine whether a MAU is
connected by monitoring the carrier sense while
transmitting. The software can use this loopback
information to determine whether a MAU is connected to
the DTE by checking the status of carrier sense after each
packet transmission.
When data is received by the chip while transmitting, a
collision condition exits. This will cause the collision
oscillator to turn on and the data on the DI pair will
follow RxIN±. After a collision is detected, the collision
oscillator will remain on until either DO or RxIN go idle.
Loopback can be disabled by strapping LBDIS to VCC. In
this mode the chip operates as a full duplex transmitter
and receiver, and collision detection is disabled. A
loopback through the transceiver can be accomplished by
tying the fiber transmitter to the receiver.
SQE TEST FUNCTION (SIGNAL QUALITY ERROR)
The SQE test function allows the DTE to determine
whether the collision detect circuitry is functional. After
each transmission, during the inter-packet gap time, the
collision oscillator will be activated for (typically) 1µs. The
SQE test will not be activated if the chip is in the low light
state, or the jabber on state.
For SQE to operate, the SQEN pin must be tied to VCC.
This allows the MAU to be interfaced to a DTE. The SQE
test can be disabled by tying the SQEN pin to ground, for
a repeater interface.
JABBER FUNCTION REQUIREMENTS
The Jabber function prevents a babbling transmitter from
bringing down the network. Within the transceiver is a
Jabber timer that starts at the beginning of each
transmission and resets at the end of each transmission. If
the transmission last longer than 20ms the jabber logic
disables the transmitter, and turns on the collision signal
COL+, COL–. When Tx+ and Tx– finally go idle, a second
timer measures 0.5 seconds of idle time before the
transmitter is enabled and collision is turned off. Even
though the transmitter is disabled during jabber, the 1MHz
idle signal is still transmitted.
LED DRIVERS
The ML4667 has five LED drivers. The LED driver pins are
active low, and the LEDs are normally off. The LEDs are
tied to their respective pins through a 500Ω resistor to 5
Volts.
The XMT, RCV and CLSN pins have pulse stretchers on
them which enables the LEDs to be visible. When
transmission or reception occurs, the LED XMT, RCV or
CLSN status pins will activate low for several
milliseconds. If another transmit, receive or collision
conditions occurs before the timer expires, the LED timer
will reset and restart the timing. Therefore rapid events
will leave the LEDs continuously on. The JAB and LMON
LEDs do not have pulse stretchers on them since their
conditions occur long enough for the eye to see.
LOW LIGHT CONDITION
The LMON LED output is used to indicate a low light
condition. LMON is activated low when both LMONIN is
low and there are transitions on RxIN± less than 3µs apart.
If either one of these conditions do not exist, LMON will
go high.
8
Page 9
TIMING DIAGRAMS
Tx+
Tx–
t
TXODY
TxOUT
t
TXLP
t
TXNPW
VALID DATA
t
TXSDY
VALIDIDLE IDLEDATA
t
TXFPW
t
TXSOI
F
TXIDF
ML4667
1
Rx+
Rx–
Tx+
Tx–
RxIN+
RxIN–
COL+
COL–
RxIN+
RxIN–
Rx+
Rx–
VALID DATA
Figure 4. Transmit and Loopback Timing
VALID DATA
t
RXODY
t
RXSDY
t
VALID DATA
t
AR
AF
Figure 5. Receive Timing
VALID DATA
VALID DATA
t
CPSQE
CS0
t
RXFX
Rx+
Rx–
RxIN+
RxIN–
Tx+
Tx–
COL+
COL–
Tx Tx Rx RxRx
Figure 6. Collision Timing
VALID DATA
VALID DATA
t
CPSQE
CS0
Figure 7. Collision Timing
9
Page 10
ML4667
TIMING DIAGRAMS
RxIN+
RxIN–
Tx+
Tx–
COL+
COL–
Rx+
Rx–
VALID DATA
t
SQEXR
CS0
Rx Rx Rx Tx Tx Tx
Figure 8. Collision Timing
Tx+
Tx–
RxIN+
RxIN–
COL+
COL–
VALID DATA
t
SQEXR
CS0
Rx+
Rx–
COL+
COL–
TxOUT
COL+
COL–
RxIN RxIN RxIN RxIN RxIN
Figure 9. Collision Timing
1
F
CLF
Figure 10. Collision Timing
VALID DATA
t
SQEDY
t
SQETD
CS0
10
Figure 11. SQE Timing
Page 11
TIMING DIAGRAMS
ML4667
Tx+
Tx –
TxOUT
COL+
COL–
XMT
Tx+
Tx–
Typ. 150ns
VALID DATA
t
JAD
VALID
DATA
Figure 12. Jabber Timing
t
LED
t
JSQE
CS0
t
JRT
RxIN+
RxIN–
RxIN+
RxIN–
LMON
LMON
RCV
Figure 13. LED Timing
t
LED
Figure 14. LED Timing
IN
t
LLPH
t
LLCL
Figure 15. LED Timing
11
Page 12
ML4667
PHYSICAL DIMENSIONS inches (millimeters)
Package: Q28
28-Pin PLCC
0.485 - 0.495
(12.32 - 12.57)
0.450 - 0.456
(11.43 - 11.58)
1
0.042 - 0.056
(1.07 - 1.42)
0.025 - 0.045
(0.63 - 1.14)
(RADIUS)
0.042 - 0.048
(1.07 - 1.22)
PIN 1 ID
8
0.050 BSC
(1.27 BSC)
0.026 - 0.032
(0.66 - 0.81)
0.013 - 0.021
(0.33 - 0.53)
15
SEATING PLANE
0.450 - 0.456
22
(11.43 - 11.58)
0.165 - 0.180
(4.06 - 4.57)
0.485 - 0.495
(12.32 - 12.57)
0.148 - 0.156
(3.76 - 3.96)
0.009 - 0.011
(0.23 - 0.28)
0.099 - 0.110
(2.51 - 2.79)
0.300 BSC
(7.62 BSC)
0.390 - 0.430
(9.90 - 10.92)
ORDERING INFORMATION
PART NUMBER TEMPERATURE PACKAGE
ML4667CQ 0°C to 70°C 28-Pin PLCC (Q28)
© Micro Linear 1997 is a registered trademark of Micro Linear Corporation
Products described in this document may be covered by one or more of the following patents, U.S.: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940;
5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; Japan: 2598946. Other patents are pending.
Micro Linear reserves the right to make changes to any product herein to improve reliability, function or design.
Micro Linear does not assume any liability arising out of the application or use of any product described herein,
neither does it convey any license under its patent right nor the rights of others. The circuits contained in this
data sheet are offered as possible applications only. Micro Linear makes no warranties or representations as to
whether the illustrated circuits infringe any intellectual property rights of others, and will accept no responsibility
or liability for use of any application herein. The customer is urged to consult with appropriate legal counsel
before deciding on a particular application.
12
2092 Concourse Drive
San Jose, CA 95131
Tel: 408/433-5200
Fax: 408/432-0295
DS4667-01
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