(V+ = +12 Vdc, TA = +25°C, unless otherwise noted.)
SymbolMinTypMaxUnit
A
p
V
O
8
S
D
+
= +12 Vdc, TA = +25°C, unless otherwise noted.)
11
b
11
∆g
∆b
22
b
22
∆g
∆b
|y21|
< y
< y
11
11
22
22
21
21
in
O
0.31
0.022
–
–
4.0
3.0
–
–
160
–5.0
–3.0
7.27.27.47.6pF
1.21.21.31.6pF
–
46
–
–
–
–
–5.6–mA
–1417mAdc
–168204mW
Frequency
0.36
0.50
–
–
4.4
110
–
–
160
–20
–18
0.39
2.30
60
0
30
390
4.0
90
200
–80
–69
48
50
58
62
20
8.0
–
–
–
–
–
–
0.5
2.75
–
–
60
510
–
–
180
–105
–90
mmho
µmho
µmho
µmho
mmho
Degrees
Degrees
dB
V
pp
Figure 2. Typical Gain ReductionFigure 3. Noise Figure versus Gain Reduction
0
I
= 0.1 mA
20
40
60
GAIN REDUCTION (dB)
80
4.05.06.07.0
AGC
(Figures 6 and 7)
V
, SUPPLY VOLTAGE (V)
AGC
I
AGC
= 0.2 mA
22
20
18
16
14
12
10
NOISE FIGURE (dB)
8.0
6.0
0 10203040
58 MHz
45 MHz
(Figure 6)
GAIN REDUCTION (dB)
www.lansdale.comPage 2 of 6Issue A
Page 3
ML1350
LANSDALE Semiconductor, Inc.
GENERAL OPERATING INFORMATION
The input amplifiers (Q1 and Q2) operate at constant emitter
currents so that input impedance remains independent of AGC
action. Input signals may be applied single–ended or differentially (for AC) with identical results. Terminals 4 and 6 may be
driven from a transformer, but a DC path from either terminal
to ground is not permitted.
AGC action occurs as a result of an increasing voltage on the
base of Q4 and Q5 causing these transistors to conduct more
heavily thereby shunting signal current from the interstage
amplifiers Q3 and Q6. The output amplifiers are supplied from
an active current source to maintain constant quiescent bias
thereby holding output admittance nearly constant. Collector
voltage for the output amplifier must be supplied through a
center–tapped tuning coil to Pins 1 and 8. The 12 V supply
(V+) at Pin 2 may be used for this purpose, but output admittance remains more nearly constant if a separate 15 V supply
(V+ +) is used, because the base voltage on the output amplifier varies with AGC bias.
Figure 5. Frequency Response Curve
(45 MHz and 58 MHz)
Scale: 1.0 MHz/cm
Figure 6. Power Gain, AGC and Noise Figure Test Circuits
(a) 45 MHz and 58 MHz
0.001
µ
Input
RS = 50
V
AGC
F
Ω
C2
0.001
µ
F
L1
C1
*
43 21
ML1350
56 785.1k
µ
F0.001µF
0.001
0.001µF
L
1.5–20pF
*Connect to ground for maximum power gain test.
All power supply chokes (Lp), are self–resonant at input frequency. LP
See Figure 5 for Frequency Response Curve.
"
L1 @ 45 MHz = 7 1/4 Turns on a 1/4
L1 @ 58 MHz = 6 Turns on a 1/4
T1 Primary Winding
Secondary Winding
= 18 Turns on a 1/4" coil form, center–tapped, #25 AWG
= 2 Turns centered over Primary Winding @ 45 MHz
coil form
"
coil form
= 1 Turn @ 58 MHz
Slug
= Carbonyl E or J
L10.4 µHQ ≥ 1000.3 µHQ ≥ 100
T11.3 µH to 3.4 µHQ ≥ 100 @ 2.0 µH1.2 µH to 3.8 µHQ ≥ 100 @ 2.0 µH
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
Lansdale Semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Lansdale does not assume any liability arising out of the application or use of any product or circuit
described herein; neither does it convey any license under its patent rights nor the rights of others. “Typical” parameters which
may be provided in Lansdale data sheets and/or specifications can vary in different applications, and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by the customer’s
technical experts. Lansdale Semiconductor is a registered trademark of Lansdale Semiconductor, Inc.
www.lansdale.comPage 6 of 6Issue A
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