Datasheet MJ16110, MJW16110 Datasheet (Motorola)

1

Motorola Bipolar Power Transistor Device Data

  

   

SWITCHMODE Bridge Series

. . . specifically designed for use in half bridge and full bridge off line converters.

• Excellent Dynamic Saturation Characteristics

• Rugged RBSOA Capability

• Collector–Emitter Sustaining Voltage — V

CEO(sus)

— 400 V

• Collector–Emitter Breakdown — V

(BR)CES

— 650 V

• State–of–Art Bipolar Power Transistor Design

• Fast Inductive Switching:

tfi = 25 ns (Typ) @ 100_C
tc = 50 ns (Typ) @ 100_C
tsv = 1 µs (Typ) @ 100_C

• Ultrafast FBSOA Specified

• 100_C Performance Specified for:

RBSOA
Inductive Load Switching
Saturation Voltages
Leakages

MAXIMUM RATINGS

Rating

Symbol

MJ16110

MJW16110

Unit

Collector–Emitter Sustaining Voltage

V

CEO(sus)

400

Vdc

Collector–Emitter Breakdown Voltage

V

CES

650

Vdc

Emitter–Base Voltage

V

EBO

6

Vdc

Collector Current — Continuous

— Pulsed (1)

I

C

I

CM

15
20

Adc

Base Current — Continuous

— Pulsed (1)

I

B

I

BM

10
15

Adc

Total Power Dissipation

@ TC = 25_C
@ TC = 100_C
Derated above 25_C

P

D

175
100

1

135

54

1.09

Watts

W/_C

Operating and Storage Temperature

TJ, T

stg

–65 to 200

–55 to 150

_

C

THERMAL CHARACTERISTICS

Thermal Resistance —

Junction to Case

R

θJC

1

0.92

_

C/W

Maximum Lead Temperature for

Soldering Purposes 1/8″ from Case
for 5 Seconds

T

L

275

_

C

(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle v 10%.

Designer’s Data for “Worst Case” Conditions —The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves —representing boundaries on device characteristics —are given to facilitate “worst case” design.

Preferred devices are Motorola recommended choices for future use and best overall value.

Designer’s and SWITCHMODE are trademarks of Motorola Inc.

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SEMICONDUCTOR TECHNICAL DATA

Order this document

by MJ16110/D

 Motorola, Inc. 1995

POWER TRANSISTORS

15 AMPERES

400 VOLTS

175 AND 135 WATTS





*Motorola Preferred Device





CASE 1–07

TO–204AA

(FORMERLY TO–3)

MJ16110

CASE 340F–03

TO–247AE
MJW16110

REV 1

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2

Motorola Bipolar Power Transistor Device Data

ELECTRICAL CHARACTERISTICS (T

C

= 25_C unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

ÎÎÎ

ÎÎÎ

ÎÎÎ

Unit

OFF CHARACTERISTICS (1)

Collector–Emitter Sustaining Voltage (Table 1) (IC = 20 mAdc, IB = 0)

V

CEO(sus)

400

—

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

Vdc

Collector Cutoff Current

(VCE = 650 Vdc, V

BE(off)

= 1.5 V)

(VCE = 650 Vdc, V

BE(off)

= 1.5 V, TC = 100_C)

I

CEV

—
—

—
—

100

1000

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

µAdc

Collector Cutoff Current (VCE = 650 Vdc, RBE = 50 Ω, TC = 100_C)

I

CER

—

—

1000

ÎÎÎ

ÎÎÎ

ÎÎÎ

µAdc

Emitter–Base Leakage (VEB = 6 Vdc, IC = 0)

I

EBO

—

—

10

ÎÎÎ

ÎÎÎ

ÎÎÎ

µAdc

ON CHARACTERISTICS (1)

Collector–Emitter Saturation Voltage

(IC = 5 Adc, IB = 0.5 Adc)
(IC = 10 Adc, IB = 1.2 Adc)
(IC = 10 Adc, IB = 2 Adc)
(IC = 10 Adc, IB = 2 Adc, TC = 100_C)

V

CE(sat)

—
—
—
—

0.3

0.7

0.3

0.4

0.9

2.0

1.0

1.5

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

Vdc

Base–Emitter Saturation Voltage

(IC = 10 Adc, IB = 2 Adc)
(IC = 10 Adc, IB = 2 Adc, TC = 100_C)

V

BE(sat)

—
—

1.2

1.2

1.5

1.5

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

Vdc

DC Current Gain (IC = 15 Adc, VCE = 5 Vdc)

h

FE

6

12

20

ÎÎÎ

ÎÎÎ

ÎÎÎ

—

DYNAMIC CHARACTERISTICS

Dynamic Saturation

V

CE(dsat)

See Figures 11, 12, and 13

ÎÎÎ

ÎÎÎ

ÎÎÎ

V

Output Capacitance (VCE = 10 Vdc, IE = 0, f

test

= 1 kHz)

C

ob

—

—

400

ÎÎÎ

ÎÎÎ

ÎÎÎ

pF

SWITCHING CHARACTERISTICS

Inductive Load (Table 1)

Storage

t

sv

—

700

1500

ÎÎÎ

ÎÎÎ

ÎÎÎ

Crossover

_

C

t

c

—

45

150

ÎÎÎ

ÎÎÎ

ÎÎÎ

Fall Time

_

C

t

fi

—

20

75

ÎÎÎ

ÎÎÎ

ÎÎÎ

Storage

V

BE(off)

= 5 V,

V

CE(pk)

= 250 V

t

sv

—

1000

2000

ÎÎÎ

ÎÎÎ

ÎÎÎ

Crossover

CE(pk)

= 250 V

_

C

t

c

—

50

200

ÎÎÎ

ÎÎÎ

ÎÎÎ

Fall Time

_

C

t

fi

—

25

125

ÎÎÎ

ÎÎÎ

ÎÎÎ

Resistive Load (Table 2)

Delay Time

t

d

—

15

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

Rise Time

B2

= 2 A,

t

r

—

330

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

Storage Time

IC = 10 A, IB1 = 1 A,
VCC = 250 V,

IB2 = 2 A,

RB2 = 4 Ω

t

s

—

800

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

Fall Time

VCC = 250 V,
PW = 30 µs,

t

f

—

110

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

Storage Time

Duty Cycle = vā

2%

t

s

—

500

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

Fall Time

vā2%

V

BE(off)

= 5 V

t

f

—

250

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle v 2%.

IC = 10 A, IB1= 1 A,

TJ = 25

TJ = 100

I

ns

ns

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3

Motorola Bipolar Power Transistor Device Data

V

CE

, COLLECTOR–EMITTER SATURATION

V

BE

, BASE–EMITTER VOLTAGE (VOLTS)

V

CE

, COLLECTOR–EMITTER VOLTAGE (VOLTS)

0.15
IC, COLLECTOR CURRENT (AMPS)

0.2 1

3

1.5

10

IB, BASE CURRENT (AMPS)

5

2

1

0.7

0.2

0.1

0.3

TJ = 100°C
TJ = 25

°

C

0.2

Figure 1. DC Current Gain

IC, COLLECTOR CURRENT (AMPS)

2

0.2 0.3 0.5 1 2 5 10 20

30

10

3

Figure 2. Collector–Emitter Saturation Voltage

0.15
IC, COLLECTOR CURRENT (AMPS)

0.03

0.3 1

2

0.7

0.3

h

FE

, DC CURRENT GAIN

5

VCE = 5 V

3 5 10 15

Figure 3. Collector–Emitter Saturation Region

70.70.1 0.2 0.5 102 50.7

Figure 4. Base–Emitter Saturation Region

Figure 5. Capacitance

3

1

10K

1

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

10

5

2K

100 1K

C, CAPACITANCE (pF)

30

10 A

IC = 3 A

TJ = 25°C

C

ib

5 A

TJ = 100°C

20

23

2

3 15

0.1

0.2

0.1

IC/IB = 10

0.5

1

1

0.5

5K

1K

3K

50

100

200

300

500

0.3 0.5 3 10 30 50 600300

IC/IB = 5

0.7 7

0.5

0.05

0.07

TJ = 25°C

7

0.5

7 0.3 0.5 2 5 10

f

test

= 1 kHz

20

TJ = 25°C

TJ = –55°C

TJ = 100°C
TJ = 25

°

C

TJ = 100°C

TJ = 25°C

IC/IB = 5 & 10

0.7

7 A

15 A

C

ob

VOLTAGE (VOLTS)

TYPICAL STATIC CHARACTERISTICS

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4

Motorola Bipolar Power Transistor Device Data

t

c

, CROSSOVER TIME (ns)

1K

IC, COLLECTOR CURRENT (AMPS)

Figure 6. Storage Time Figure 7. Crossover Time

IC, COLLECTOR CURRENT (AMPS)

2 3 5 7 15

10K

7K
5K

3K
2K

500

, STORAGE TIME (ns)t

sv

1.5

700

Figure 8. Fall Time

Figure 9. Inductive Switching Measurements Figure 10. Peak Reverse Base Current

IC/IB = 10, TC = 100°C, V

CE(pk)

= 250 V

300

1K

100

10 2 3 5 7 15

700
500

300

100

30

1.5

50

200

70

10

10

2

20

V

BE(off)

= 0 V

IB2 = 2 (IB1)

V

BE(off)

= 2 V

1K

IC, COLLECTOR CURRENT (AMPS)

3 5 7 15

700
500

100

30

1.5

50

200

70

10

10

20

I

B2

, REVERSE BASE CURRENT (AMPS)

V

BE(off)

, REVERSE BASE VOLTAGE (VOLTS)

0

10

8

6

4

2

IB1 = 2 A

0 1 2 4 53

IC = 10 A
TC = 25

°

C

1 A

1

9

7

5

3

t

fi

, COLLECTOR CURRENT FALL TIME (ns)

t

fi

t

rv

t, TIME

I

C

90% I

B1

I

C(pk)

V

CE(pk)

90% V

CE(pk)

90% I

C(pk)

10% V

CE(pk)

10%

IC(pk)

2% I

C

I

B

t

sv

t

ti

t

c

V

CE

V

BE(off)

= 5 V

V

BE(off)

= 0 V

IB2 = 2 (IB1)

V

BE(off)

= 2 V

V

BE(off)

= 5 V

V

BE(off)

= 0 V

IB2 = 2 (IB1)

V

BE(off)

= 5 V

V

BE(off)

= 2 V

TYPICAL INDUCTIVE SWITCHING CHARACTERISTICS

 

5

Motorola Bipolar Power Transistor Device Data

+15

150

Ω

100

Ω

100 µF

MTP8P10

MPF930

MPF930

MUR105

MJE210

150

Ω

500 µF

V

off

50

Ω

+10

MTP12N10

MTP8P10

R

B1

R

B2

A

1

µ

F

1

µ

F

Drive Circuit

*Tektronix AM503

*P6302 or Equivalent

Scope — Tektronix
7403 or Equivalent

t1[

L

coil(ICpk

)

V

CC

Note: Adjust V

off

to obtain desired V

BE(off)

at Point A.

T1 adjusted to obtain I

C(pk)

T

1

+V

–V

0 V

A

*I

B

*I

C

L

T.U.T.

1N4246GP

V

clamp

V

CC

I

C(pk)

V

CE(pk)

V

CE

I

B

I

C

I

B1

I

B2

V

CEO(sus)

L = 10 mH
RB2 = ∞
VCC = 20 Volts
I

C(pk)

= 20 mA

Inductive Switching

L = 200 µH
RB2 = 0
VCC = 20 Volts
RB1 selected for desired I

B1

RBSOA

L = 200 µH
RB2 = 0
VCC = 20 Volts
RB1 selected for desired I

B1

Table 1. Inductive Load Switching

td and t

r

ts and t

f

H.P. 214

OR

EQUIV.

P.G.

50

RB = 8.5

Ω

*I

B

*I

C

T.U.T.

R

L

V

CC

V

in

0 V

≈

11 V

tr

≤

15 ns

*Tektronix AM503

*P6302 or Equivalent

V

CC

250 Vdc

R

L

25 Ω

I

C

10 A

I

B

1 A

+15

150

Ω

100

Ω

100 µF

MTP8P10

MPF930

MPF930

MUR105

MJE210

150

Ω

500 µF

V

off

50

Ω

+10 V

MTP12N10

MTP8P10

R

B1

R

B2

A

1

µ

F

1 µF

T.U.T.

*I

C

*I

B

A

R

L

V

CC

V

(off)

adjusted
to give specified
off drive

V

CC

250 V

I

C

10 A

I

B1

1.0 A

I

B2

Per Spec

R

B1

15 Ω

R

B2

Per Spec

R

L

25 Ω

Table 2. Resistive Load Switching

V

CE

, COLLECTOR–EMITTER VOLTAGE (VOLTS)

t, TIME

Figure 11. Definition of Dynamic Saturation

Measurement

Figure 12. Dynamic Saturation Voltage

IB, BASE CURRENT (AMPS)

0

16

I

B1

V

CE

14

10

6

t = 2 µs

0.5 1 2 2.51.5

IC = 10 A

2

12

8

4

V

CE(dsat)

= DYNAMIC SATURATION VOLTAGE AND IS
MEASURED FROM THE 90% POINT OF IB1 (t = 0)
TO A MEASUREMENT POINT ON THE
TIME AXIS (t1, t2 or t3 etc.)

0

0 t

8

t

7

t

6

t

5

t

4

t

3

t

2

t

1

t = 1 µs

MAXIMUM
TYPICAL

90% I

B1

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6

Motorola Bipolar Power Transistor Device Data

DYNAMIC SATURATION VOLTAGE

For bipolar power transistors low DC saturation voltages
are achieved by conductivity modulating the collector region.
Since conductivity modulation takes a finite amount of time,
DC saturation voltages are not achieved instantly at turn–on.
In bridge circuits, two transistor forward converters, and two
transistor flyback converters dynamic saturation characteris­tics are responsible for the bulk of dynamic losses. The
MJ16110 has been designed specifically to minimize these
losses. Performance is roughly four times better than the
original version of MJ16010.

From a measurement point of view, dynamic saturation
voltage is defined as collector–emitter voltage at a specific
point in time after IB1 has been applied, where t = 0 is the
90% point on the IB1 rise time waveform, This definition is il­lustrated in Figure 1 1. Performance data was taken in the cir­cuit that is shown in Figure 13. The 24 volt rail allows a
Tektronix 2445 or equivalent scope to operate at 1 volt per
division without input amplifier saturation.

Dynamic saturation performance is illustrated in Figure 12.
The MJ16110 reaches DC saturation levels in approximately
2 µs, provided that sufficient base drive is provided. The de­pendence of dynamic saturation voltage upon base drive
suggests a spike of IB1 at turn–on to minimize dynamic satu­ration losses, and also avoid overdrive at turn–off. However,
in order to simulate worst case conditions the guaranteed dy­namic saturation limits in this data sheet are specified with a
constant level of IB1.

+ 24

1 k

1 k

10 k

0.1

µ

F

0.01

µ

F

100 pF

U1

MC1455

(OSCILLATOR)

1N5314

Q1

1N4111

MJ11012

100

µ

F

100

Ω

1 W

2.4

Ω

20 W

0.01

µ

F

Q4

IRFD9120

Q5
MTM8P08

2.4 mH

1N5831

10

µ

F

I

C

I

B

V

CE

MUR405

MUR405

47

Ω

1 W

500

Ω

Q2

Q3
IRFD113

0.01

µ

F

0.01

µ

F

IRFD9123

1N914

10 k

1.8 k

Q6
MTP25N06

4 8

7

6

2

1 5

3

4 8

2

3

7
6

1 5

Figure 13. Dynamic Saturation Test Circuit

20

0

200

14

10

16

8

4
2

400 600

12

18

6

I

C

, COLLECTOR CURRENT (AMPS)

50

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

0.01
20

5

1

10

0.5

0.2

0.1

0.02

100 500

REGION II —
EXPANDED FBSOA USING
MUR870 ULTRA-FAST
RECTIFIER, SEE FIGURE 16

TC = 25°C

10µs

1 ms

dc

100

ns

0

VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)

Figure 14. Forward Bias Safe Operating Area

IC/IB1 = 5
TJ

≤

100°C

MJW16110

Figure 15. Reverse Bias Safe Operating Area

V

BE(off)

= 1 to 5 V

V

BE(off)

= 0 V

I

C

, COLLECTOR CURRENT (AMPS)

BONDING WIRE LIMIT
THERMAL LIMIT
SECONDARY BREAKDOWN
LIMIT

2

20

0.3

3

30 200 100010 50 3001 2 3 5 300 500 700100

0.03

0.05

MJ16110

II

GUARANTEED SAFE OPERATING AREA INFORMATION

Figure 16. Switching Safe Operating Area

+15

150

Ω

100 µF

MTP8P10

MPF930

MPF930

MUR105

MJE210

150

Ω

500 µF

V

Off

50

Ω

+10

MTP12N10

R

B1

R

B2

1

µ

F

1

µ

F

100

Ω

MTP8P10

MUR105

MUR1100

T.U.T.

MUR870

VCE (650 V MAX)

10

µ

F

10 mH

Note: Test Circuit for Ultra–fast FBSOA

Note: RB2 = 0 and V

Off

= –5 Volts

 

7

Motorola Bipolar Power Transistor Device Data

Figure 17. Power Derating

t, TIME (ms)

1

0.01

0.01

0.7

0.2

0.1

0.05

0.02

r(t), EFFECTIVE TRANSIENT THERMAL

0.05 1 2 5 10 20 50 100 200 500

R

θ

JC

(t) = r(t) R

θ

JC

R

θ

JC

= 1 or 0.92

°

CW

T

J(pk)

– TC = P

(pk)

R

θ

JC

(t)

P

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

2

D = 0.5

0.2

0.02
SINGLE PULSE

0.1

0.1 0.50.2

RESISTANCE (NORMALIZED)

1000

Figure 18. Thermal Response

0.5

0.3

0.07

0.03

0.03 0.3 3 30 3000.02

POWER DERATING FACTOR (%)

100

0

TC, CASE TEMPERATURE (

°

C)

0

40 200

80

60

40

20

MJ16110
MJW16110

80 120 160

SECOND BREAKDOWN
DERATING

THERMAL
DERATING

0.03

SAFE OPERATING AREA INFORMATION

FORWARD BIAS

There are two limitations on the power handling ability of a
transistor: average junction temperature and second break­down. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipa­tion than the curves indicate.

The data in Figure 14 is based on TC = 25_C; T

J(pk)

is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not der­ate the same as thermal limitations. Allowable current at the
voltages shown on Figure 14 may be found at any case tem­perature by using the appropriate curve on Figure 17.

T

J(pk)

may be calculated from the data in Figure 18. At
high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.

REVERSE BIAS

For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be

accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Biased Safe Operating Area
and represents the voltage–current condition allowable dur­ing reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 15 gives the RBSOA character­istics.

SWITCHMODE DESIGN CONSIDERATIONS

FBSOA

Allowable dc power dissipation in bipolar power transistors
decreases dramatically with increasing collector–emitter
voltage. A transistor which safely dissipates 100 watts at
10 volts will typically dissipate less than 10 watts at its rated
V

(BR)CEO(sus)

. From a power handling point of view, current
and voltage are not interchangeable (see Application Note
AN875).

TURN–ON

Safe turn–on load line excursions are bounded by pulsed
FBSOA curves. The 10 µs curve applies for resistive loads,
most capacitive loads, and inductive loads that are clamped
by standard or fast recovery rectifiers. Similarly, the 100 ns
curve applies to inductive loads which are clamped by ultra–
fast recovery rectifiers, and are valid for turn–on crossover
times less than 100 ns (AN952).

 

8

Motorola Bipolar Power Transistor Device Data

SWITCHMODE DESIGN CONSIDERATIONS (Cont.)

At voltages above 75% of V

(BR)CEO(sus)

, it is essential
to provide the transistor with an adequate amount of base
drive VERY RAPIDLY at turn–on. More specifically, safe op­eration according to the curves is dependent upon base cur­rent rise time being less than collector current rise time. As a
general rule, a base drive compliance voltage in excess of
10 volts is required to meet this condition (see Application
Note AN875).

TURN–OFF

A bipolar transistor’s ability to withstand turn–off stress is
dependent upon its forward base drive. Gross overdrive vio­lates the RBSOA curve and risks transistor failure. For this
reason, circuits which use fixed base drive are more likely to
fail at light loads due to heavy overdrive (see Application
Note AN875).

OPERATION ABOVE V

(BR)CEO(sus)

When bipolars are operated above collector–emitter
breakdown, base drive is crucial. A rapid application of ade­quate forward base current is needed for safe turn–on, as is
a stiff negative bias needed for safe turn–off. Any hiccup in
the base–drive circuitry that even momentarily violates either
of these conditions will likely c ause the transistor to fail.

Therefore, it is important to design the driver so that its out­put is negative in the absence of anything but a clean crisp
input signal (see Application Note AN952).

RBSOA

Reversed Biased Safe Operating Area has a first order
dependency on circuit configuration and drive parameters.
The RBSOA curves in this data sheet are valid only for the
conditions specified. For a comparison of RBSOA results in
several types of circuits (see Application Note AN951).

DESIGN SAMPLES

Transistor parameters tend to vary much more from wafer
lot to wafer lot, over long periods of time, than from one de­vice to the next in the same wafer lot. For design evaluation
it is advisable to use transistors from several different date
codes.

BAKER CLAMPS

Many unanticipated pitfalls can be avoided by using Baker
Clamps. MUR105 and MUR170 diodes are recommended
for base drives less than 1 amp. Similarly, MUR405 and
MUR470 types are well–suited for higher drive requirements
(see Article Reprint AR131).

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9

Motorola Bipolar Power Transistor Device Data

PACKAGE DIMENSIONS

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO–204AA OUTLINE SHALL APPLY.

STYLE 1:

PIN 1. BASE

2. EMITTER

CASE: COLLECTOR

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 1.550 REF 39.37 REF
B ––– 1.050 ––– 26.67
C 0.250 0.335 6.35 8.51
D 0.038 0.043 0.97 1.09
E 0.055 0.070 1.40 1.77

G 0.430 BSC 10.92 BSC

H 0.215 BSC 5.46 BSC
K 0.440 0.480 11.18 12.19
L 0.665 BSC 16.89 BSC
N ––– 0.830 ––– 21.08

Q 0.151 0.165 3.84 4.19

U 1.187 BSC 30.15 BSC
V 0.131 0.188 3.33 4.77

A

N

E

C

K

–T–

SEATING
PLANE

2 PLD

M

Q

M

0.13 (0.005) Y

M

T

M

Y

M

0.13 (0.005) T

–Q–

–Y–

2

1

U

L

G

B

V

H

CASE 1–07

TO–204AA

(FORMERLY TO–3)

ISSUE Z

CASE 340F–03

TO–247AE

ISSUE E

DIMAMIN MAX MIN MAX

INCHES

20.40 20.90 0.803 0.823

MILLIMETERS

B 15.44 15.95 0.608 0.628
C 4.70 5.21 0.185 0.205
D 1.09 1.30 0.043 0.051
E 1.50 1.63 0.059 0.064
F 1.80 2.18 0.071 0.086
G 5.45 BSC 0.215 BSC
H 2.56 2.87 0.101 0.113
J 0.48 0.68 0.019 0.027
K 15.57 16.08 0.613 0.633
L 7.26 7.50 0.286 0.295
P 3.10 3.38 0.122 0.133
Q 3.50 3.70 0.138 0.145
R 3.30 3.80 0.130 0.150
U 5.30 BSC 0.209 BSC
V 3.05 3.40 0.120 0.134

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

STYLE 3:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

R

P

A

K

V

F

D

G

U

L

E

0.25 (0.010)MT B

M

0.25 (0.010)MY Q

S

J

H

C

4

1 2 3

–T–

–B–

–Y–

–Q–

 

10

Motorola Bipolar Power Transistor Device Data

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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
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MJ16110/D

*MJ16110/D*

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