Datasheet MJF6388, MJF6388G, MJF6668, MJF6668G Datasheet (ON Semiconductor)

MJF6388 (NPN), MJF6668 (PNP)
Preferred Device
Complementary Power Darlingtons
For Isolated Package Applications
Designed for generalpurpose amplifiers and switching applications, where the mounting surface of the device is required to be electrically isolated from the heatsink or chassis.
Features
Isolated Overmold Package, TO220 Type
Electrically Similar to the Popular 2N6388, 2N6668, TIP102, and
TIP107
100 V
CEO(sus)
10 A Rated Collector Current
No Isolating Washers Required
Reduced System Cost
High DC Current Gain 1000 (Min) @ I
= 5.0 Adc
C
High Isolation Voltage (up to 4500 VRMS)
Case 221D is UL Recognized at 3500 VRMS: File #E69369
PbFree Packages are Available*
MAXIMUM RATINGS
Rating
CollectorEmitter Voltage
CollectorBase Voltage
EmitterBase Voltage
RMS Isolation Voltage (Note 1)
(t = 0.3 sec, R.H. 30%, TA = 25_C) Per Figure 14
Collector Current Continuous
Base Current Continuous
Total Power Dissipation (Note 3) @ TC = 25_C Derate above 25_C
Total Power Dissipation @ TA = 25_C Derate above 25_C
Operating and Storage Temperature Range
Peak (Note 2)
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction−to−Case (Note 3)
Thermal Resistance, JunctiontoAmbient
Lead Temperature for Soldering Purposes
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. Proper strike and creepage distance must be provided.
2. Pulse Test: Pulse Width = 5.0 ms, Duty Cycle v 10%.
3. Measurement made with thermocouple contacting the bottom insulated
surface (in a location beneath the die), the devices mounted on a heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs.
Symbol
V
CEO
V
CB
V
EB
V
ISOL
I
C
I
B
P
D
P
D
TJ, T
stg
Symbol
R
q
JC
R
q
JA
T
L
Value
100
100
5.0
4500
10 15
1.0
40
0.31
2.0
0.016
–65 to +150
Max
4.0
62.5
260
Unit
Vdc
Vdc
Vdc
V
Adc
Adc
W
W/_C
W
W/_C
_C
Unit
_C/W
_C/W
_C
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COMPLEMENTARY SILICON
POWER DARLINGTONS
10 AMPERES
100 VOLTS, 40 WATTS
NPN PNP
COLLECTOR 2
BASE
1
EMITTER 3
MJF6388 MJF6668
MARKING DIAGRAM
TO220 FULLPACK
CASE 221D
1
2
3
MJF6xy8 = Specific Device Code
G=Pb−Free Package A = Assembly Location Y = Year WW = Work Week
STYLE 2
UL RECOGNIZED
x = 3 or 6 y = 6 or 8
ORDERING INFORMATION
Device Package Shipping
MJF6388 TO220 FULLPACK
MJF6388G TO220 FULLPACK
MJF6668 50 Units/Rail
MJF6668G 50 Units/Rail
*For additional information on our PbFree strategy
and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(PbFree)
TO220 FULLPACK
TO220 FULLPACK
(PbFree)
COLLECTOR 2
BASE
1
EMITTER 3
MJF6xy8G
AYW W
50 Units/Rail
50 Units/Rail
© Semiconductor Components Industries, LLC, 2008
September, 2008 − Rev. 10
1 Publication Order Number:
MJF6388/D
MJF6388 (NPN), MJF6668 (PNP)
ELECTRICAL CHARACTERISTICS (T
= 25_C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
CollectorEmitter Sustaining Voltage (Note 4)
= 30 mAdc, IB = 0)
(I
C
Collector Cutoff Current
(V
= 80 Vdc, IB = 0)
CE
Collector Cutoff Current (VCE = 100 Vdc, V
Collector Cutoff Current (V
= 100 Vdc, V
CE
EB(off)
EB(off)
= 1.5 Vdc) = 1.5 Vdc, T
= 125_C)
C
Collector Cutoff Current
(V
= 100 Vdc, IE = 0)
CB
Emitter Cutoff Current
(V
= 5.0 Vdc, IC = 0)
BE
ON CHARACTERISTICS (Note 4)
DC Current Gain (IC = 3.0 Adc, VCE = 4.0 Vdc)
DC Current Gain (I DC Current Gain (I DC Current Gain (I
= 5.0 Adc, VCE = 3.0 Vdc)
C
= 8.0 Adc, VCE = 4.0 Vdc)
C
= 10 Adc, VCE = 3.0 Vdc)
C
CollectorEmitter Saturation Voltage (IC = 3.0 Adc, IB = 6.0 mAdc)
CollectorEmitter Saturation Voltage (I CollectorEmitter Saturation Voltage (I CollectorEmitter Saturation Voltage (I
= 5.0 Adc, IB = 0.01 Adc)
C
= 8.0 Adc, IB = 80 mAdc)
C
= 10 Adc, IB = 0.1 Adc)
C
BaseEmitter Saturation Voltage (IC = 5.0 Adc, IB = 0.01 Adc)
BaseEmitter Saturation Voltage (I
= 10 Adc, IB = 0.1 Adc)
C
BaseEmitter On Voltage
(I
= 8.0 Adc, VCE = 4.0 Vdc)
C
DYNAMIC CHARACTERISTICS
SmallSignal Current Gain
(I
= 1.0 Adc, VCE = 5.0 Vdc, f
C
= 1.0 MHz)
test
Output Capacitance (VCB = 10 Vdc, IE = 0, f = 1.0 MHz) MJF6388
MJF6668
Insulation Capacitance
(CollectortoExternal Heatsink)
SmallSignal Current Gain
(I
= 1.0 Adc, VCE = 5.0 Vdc, f = 1.0 kHz)
C
4. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
Symbol
V
CEO(sus)
I
CEO
I
CEX
I
CBO
I
EBO
h
FE
V
CE(sat)
V
BE(sat)
V
BE(on)
|hfe|
C
ob
C
chs
h
fe
Min
100
3000 1000
200 100
20
1000
Max
10
10
3.0
10
2.0
15000
2.0
2.0
2.5
3.0
2.8
4.5
2.5
200 300
3.0 Typ
Unit
Vdc
mAdc
mAdc
mAdc
mAdc
mAdc
Vdc
Vdc
Vdc
pF
pF
BASE
NPN MJF6388
8 k 120
COLLECTOR
EMITTER
PNP MJF6668
COLLECTOR
BASE
8 k 120
EMITTER
Figure 1. Darlington Schematic
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2
MJF6388 (NPN), MJF6668 (PNP)
& RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
R
B
D
, MUST BE FAST RECOVERY TYPES, e.g.,
1
MUR110 USED ABOVE I MSD6100 USED BELOW I
V
1
APPROX.
+12 V
V
2
APPROX.
-8 V
100 mA
B
100 mA
B
25 ms
R
B
D
51
1
-4 V
V
CC
+ 30 V
R
C
TUT
120≈8 k
SCOPE
tr, tf 10 ns DUTY CYCLE = 1%
NPN MJF6388
7 5
3
1
0.7
t, TIME (s)μ
0.3
0.2
0.1
0.07
0.1 100.5 2 5
t
VCC = 30 V I
= 250
C/IB
= I
I
B1
B2
TJ = 25°C
0.2
s
t
f
t
1
I
, COLLECTOR CURRENT (AMPS)
C
r
FOR td AND tr, D1 IS DISCONNECTED AND V
= 0
2
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
Figure 2. Switching Times Test Circuit
PNP MJF6668
10
7 5
t
r
3
2
1
0.7
t, TIME (s)μ
0.5
t
d
0.3 t
0.2
f
0.3
0.2
0.1
0.1 0.7 100.5
Figure 3. Typical Switching Times
VCC = 30 V I
= 250
C/IB
= I
I
B1
B2
TJ = 25°C
t
s
t
d
1
25
IC, COLLECTOR CURRENT (AMPS)
37
20
10
5 3
2
1
0.5
0.3
0.2
0.1
, COLLECTOR CURRENT (AMPS)
C
I
0.05
0.03
0.02
TJ = 150°C
dc
5 ms
CURRENT LIMIT SECONDARY BREAKDOWN LIMIT THERMAL LIMIT @ TC = 25°C (SINGLE PULSE)
23 50
1
5 10020
10
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 4. Maximum Forward Bias
Safe Operating Area
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3
100 ms
1ms
30
1
D = 0.5
0.5
0.3
0.2
0.1
0.05
r(t), TRANSIENT THERMAL
0.03
RESISTANCE (NORMALIZED)
0.02
0.01
0.2
0.1
0.05
SINGLE PULSE
0.01 0.05 1 2 5 10 20 50 500 100K0.1 0.50.2
0.02
MJF6388 (NPN), MJF6668 (PNP)
R
(t) = r(t) R
q
JC
R
q
JC
D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T
J(pk)
t, TIME (ms)
Figure 5. Thermal Response
q
= °C/W MAX
- TC = P
JC
1
R
q
(pk)
JC(t)
100 2003300.3 300 1K 2K 5K 10K 20K 50K3K 30K
P
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
2
1
SECOND BREAKDOWN
0.8
0.6
THERMAL
DERATING
60 100 14080
TC, CASE TEMPERATURE (°C)
POWER DERATING FACTOR
0.4
0.2
0
20
40 120 160
Figure 6. Maximum Power Derating
NPN MJF6388
10,000
5000 3000
2000
1000
500 300
200
100
50
, SMALL-SIGNAL CURRENT GAIN
30
fe
h
20
10
1 100050105 100 5002 20 200
TC = 25°C V
= 4 Vdc
CE
= 3 Adc
I
C
f, FREQUENCY (kHz)
DERATING
There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I
V
C
limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 4 is based on T
= l50_C; TC is
J(pk)
variable depending on conditions. Secondary breakdown pulse limits are valid for duty cycles to 10% provided T < 150_C. T
may be calculated from the data in Figure 5.
J(pk)
J(pk)
At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by secondary breakdown.
PNP MJF6668
10,000
5000
2000
1000
500
200
100
50
, SMALL-SIGNAL CURRENT GAIN
FE
h
20
10
1 100050105 100 5002 20 200
3 30 300707
TC = 25°C V
= 4 VOLTS
CE
= 3 AMPS
I
C
f, FREQUENCY (kHz)
CE
Figure 7. Typical Small−Signal Current Gain
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MJF6388 (NPN), MJF6668 (PNP)
NPN MJF6388
300
200
100
70
C, CAPACITANCE (pF)
50
30
0.1 100510.5 10 500.2 2 20
V
, REVERSE VOLTAGE (VOLTS)
R
20,000
10,000
5000
3000 2000
1000
, DC CURRENT GAIN
FE
h
500
TJ = 150°C
25°C
-55°C
C
ib
300
TJ = 25°C
200
C
ob
100
70
C, CAPACITANCE (pF)
50
30
0.1 100510.5 10 500.2 2 20
Figure 8. Typical Capacitance
20,000
VCE = 4 V
10,000
7000 5000
3000
2000
1000
, DC CURRENT GAIN
FE
700
h
500
PNP MJF6668
TJ = 150°C
25°C
-55°C
C
ib
, REVERSE VOLTAGE (VOLTS)
V
R
TJ = 25°C
C
ob
VCE = 4 V
300 200
0.1
3
2.6
2.2
1.8
1.4
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
1
V
0.3 0.5 0.7 523
0.3 1
0.2 0.5
I
, COLLECTOR CURRENT (AMP)
C
IC = 2 A
1
4 A
IB, BASE CURRENT (mA)
0.7 3
2 7 0.1 0.2 0.50.3 10.7 3 5 1027
6 A
72030
Figure 10. Typical Collector Saturation Region
300
510
200
Figure 9. Typical DC Current Gain
3
TJ = 25°C
2.6
2.2
1.8
1.4
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
1
10
V
0.3 0.5 0.7 5231 7 20 3010
IC = 2 A 4 A 6 A
IC, COLLECTOR CURRENT (AMP)
, BASE CURRENT (mA)
I
B
TJ = 25°C
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MJF6388 (NPN), MJF6668 (PNP)
V, VOLTAGE (VOLTS)
, TEMPERATURE COEFFICIENT (mV/ C)°θ
V
NPN MJF6388
3
2.5
2
1.5
1
0.5
0.1
+5
+4
+3
+2
+1
0
-1
-2
-3
-4
-5
0.1
TJ = 25°C
V
@ IC/IB = 250
BE(sat)
VBE @ VCE = 4 V
V
@ IC/IB = 250
CE(sat)
0.2 0.5 50.3 10.7 3 10
I
, COLLECTOR CURRENT (AMP)
C
Figure 11. Typical “On” Voltages
*IC/IB h
FE/3
25°C to 150°C
-55°C to 25°C
*qVC for V
CE(sat)
qVB for V
0.2 0.5 50.3 10.7 3 1072
25°C to 150°C
BE
, COLLECTOR CURRENT (AMP)
I
C
-55°C to 25°C
PNP MJF6668
3
TJ = 25°C
2.5
2
1.5
VBE @ VCE = 4 V
V, VOLTAGE (VOLTS)
1
0.5
72 0.1 0.2 0.5 50.3 10.7 3 1072
+5
*IC/IB h
+4
+3
+2
+1
0
-1 *qVC for V
-2
-3
qVB for V
, TEMPERATURE COEFFICIENT (mV/ C)°θ
-4
V
-5
0.1 0.2 0.5 50.3 1 3 1072
V
@ IC/IB = 250
BE(sat)
I
, COLLECTOR CURRENT (AMP)
C
FE/3
-55°C to 25°C
CE(sat)
25°C to 150°C
BE
0.7
, COLLECTOR CURRENT (AMP)
I
C
V
CE(sat)
@ IC/IB = 250
25°C to 150°C
-55°C to 25°C
Figure 12. Typical Temperature Coefficients
5
10
REVERSE FORWARD
4
10
μ
10
10
VCE = 30 V
3
2
TJ = 150°C
1
10
, COLLECTOR CURRENT (A)
0
C
I
10
-1
10
-0.6 -0.2 +0.8 +1 +1.2 +1.4
100°C
25°C
0- 0.4
+0.2 +0.4 +0.6
VBE, BASE-EMITTER VOLTAGE (VOLTS)
Figure 13. Typical Collector Cut−Off Region
5
10
4
10
3
10
2
10
1
10
, COLLECTOR CURRENT (A)μI
0
C
10
-1
10
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REVERSE FORWARD
VCE = 30 V
TJ = 150°C
100°C
25°C
0+0.4 -0.2 -0.4 -0.6+0.6 +0.2 -0.8 -1 -1.2 -1.4
VBE, BASE-EMITTER VOLTAGE (VOLTS)
MJF6388 (NPN), MJF6668 (PNP)
TEST CONDITION FOR ISOLATION TEST*
FULLY ISOLATED PACKAGE
LEADS
HEATSINK
0.110, MIN
Figure 14. Mounting Position
*Measurement made between leads and heatsink with all leads shorted together.
MOUNTING INFORMATION
4-40 SCREW
CLIP
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
NUT
HEATSINK
Figure 15. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw torque of 6 to 8 in stant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 440 screw, without washers, and applying a torque in excess of 20 in cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 440 screws indicate that the screw slot fails between 15 to 20 in age. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend exceeding 10 in
.
lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a con-
.
.
lbs without adversely affecting the pack-
.
lbs of mounting torque under any mounting conditions.
lbs will
** For more information about mounting power semiconductors see Application Note AN1040.
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MJF6388 (NPN), MJF6668 (PNP)
PACKAGE DIMENSIONS
TO220 FULLPAK
CASE 221D03
ISSUE J
SEATING
T
PLANE
F
B
Q
C
S
U
A
123
H
G N
Y
J
R
K
L
D
3 PL
M
M
0.25 (0.010) Y
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH
3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03.
INCHES
DIMAMIN MAX MIN MAX
0.617 0.635 15.67 16.12
B 0.392 0.419 9.96 10.63 C 0.177 0.193 4.50 4.90 D 0.024 0.039 0.60 1.00 F 0.116 0.129 2.95 3.28 G 0.100 BSC 2.54 BSC H 0.118 0.135 3.00 3.43
J 0.018 0.025 0.45 0.63 K 0.503 0.541 12.78 13.73 L 0.048 0.058 1.23 1.47 N 0.200 BSC 5.08 BSC Q 0.122 0.138 3.10 3.50 R 0.099 0.117 2.51 2.96 S 0.092 0.113 2.34 2.87 U 0.239 0.271 6.06 6.88
STYLE 2:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
MILLIMETERS
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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