Page 1
MJF122, MJF127
Complementary Power
Darlingtons
For Isolated Package Applications
Designed for general−purpose amplifiers and switching
applications, where the mounting surface of the device is required to
be electrically isolated from the heatsink or chassis.
Features
• Electrically Similar to the Popular TIP122 and TIP127
• 100 V
• 5.0 A Rated Collector Current
• No Isolating Washers Required
• Reduced System Cost
• High DC Current Gain − 2000 (Min) @ I
• UL Recognized, File #E69369, to 3500 V
• Pb−Free Packages are Available*
MAXIMUM RATINGS
Collector−Emitter Voltage
Collector−Base Voltage
Emitter−Base Voltage
RMS Isolation Voltage (Note 1)
Collector Current − Continuous
Base Current
Total Power Dissipation (Note 2)
@ T
Derate above 25_C
Total Power Dissipation @ TA = 25_C
Derate above 25_C
Operating and Storage Junction Temperature Range
THERMAL CHARACTERISTICS
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Case
(Note 2)
Lead Temperature for Soldering Purpose
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Proper strike and creepage distance must be provided.
2. Measurement made with thermocouple contacting the bottom insulated
CEO(sus)
= 3 Adc
C
Isolation
RMS
Rating
(t = 0.3 sec, R.H. ≤ 30%, T
Per Figure 14
Peak
= 25_C
C
Characteristic
mounting surface (in a location beneath the die), the device mounted on a
heatsink with thermal grease and a mounting torque of ≥ 6 in. lbs.
= 25°C)
A
Symbol
V
CEO
V
CB
V
EB
V
ISOL
I
C
I
B
P
D
P
D
TJ, T
stg
Symbol
R
q
JA
R
q
JC
T
L
Value
100
100
5
4500
5
8
0.12
30
0.24
2
0.016
−65 to
+ 150
Max
62.5
4.1
260
Unit
Vdc
Vdc
Vdc
V
RMS
Adc
Adc
W
W/_C
W
W/_C
I
C
Unit
_C/W
_C/W
_C
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COMPLEMENTARY SILICON
POWER DARLINGTONS
5.0 A, 100 V, 30 W
NPN PNP
COLLECTOR 2
BASE
1
EMITTER 3
MJF122 MJF127
MARKING
DIAGRAM
TO−220
CASE 221D−02
STYLE 2
1
2
MJF122 TO−220 50 Units / Rail
MJF122G TO−220
MJF127 TO−220 50 Units / Rail
MJF127G TO−220
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
x = 2 or 7
3
G = Pb−Free Package
A = Assembly Location
Y = Year
WW = Work Week
ORDERING INFORMATION
Device Package Shipping
(Pb−Free)
(Pb−Free)
COLLECTOR 2
BASE
1
EMITTER 3
MJF12xG
AYWW
†
50 Units / Rail
50 Units / Rail
© Semiconductor Components Industries, LLC, 2008
September, 2008 − Rev. 7
1 Publication Order Number:
MJF122/D
Page 2
MJF122, MJF127
ELECTRICAL CHARACTERISTICS (T
= 25_C unless otherwise noted)
C
Characteristic
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3)
(I
= 100 mAdc, IB = 0)
C
Collector Cutoff Current
= 50 Vdc, IB = 0)
(V
CE
Collector Cutoff Current
(V
= 100 Vdc, IE = 0)
CB
Emitter Cutoff Current (VBE = 5 Vdc, IC = 0)
ON CHARACTERISTICS (Note 3)
DC Current Gain (IC = 0.5 Adc, VCE = 3 Vdc)
DC Current Gain (I
= 3 Adc, VCE = 3 Vdc)
C
Collector−Emitter Saturation Voltage (IC = 3 Adc, IB = 12 mAdc)
Collector−Emitter Saturation Voltage (I
= 5 Adc, IB = 20 mAdc)
C
Base−Emitter On Voltage (IC = 3 Adc, VCE = 3 Vdc)
DYNAMIC CHARACTERISTICS
Small−Signal Current Gain (IC = 3 Adc, VCE = 4 Vdc, f = 1 MHz)
Output Capacitance MJF127
(V
= 10 Vdc, IE = 0, f = 0.1 MHz) MJF122
CB
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
Symbol
V
CEO(sus)
I
CEO
I
CBO
I
EBO
h
FE
V
CE(sat)
V
BE(on)
h
fe
C
ob
Min
100
−
−
−
1000
2000
−
−
−
4
−
−
Max
−
10
10
2
−
−
2
3.5
2.5
−
300
200
Unit
Vdc
mAdc
mAdc
mAdc
−
Vdc
Vdc
−
pF
R
& RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
B
D
, MUST BE FAST RECOVERY TYPES, e.g.,
1
1N5825 USED ABOVE I
MSD6100 USED BELOW I
V
2
APPROX.
+8 V
0
V
1
APPROX.
-12 V
tr, tf ≤ 10 ns
DUTY CYCLE = 1%
≈ 100 mA
B
≈ 100 mA
B
R
B
D
51
1
25 ms
FOR td AND tr, D1 IS DISCONNECTED
AND V
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
+4 V
= 0
2
Figure 1. Switching Times Test Circuit
5
t
s
t
f
TUT
V
CC
- 30 V
R
C
SCOPE
3
2
1
0.7
0.5
≈120≈8 k
t, TIME (s)μ
0.3
0.2
VCC = 30 V
I
= 250
C/IB
0.1
= I
I
B1
0.07
0.05
0.1 0.7 100.5
B2
TJ = 25°C
0.2
t
PNP
NPN
0.3
I
, COLLECTOR CURRENT (AMP)
C
1
td @ V
r
25
= 0 V
BE(off)
37
Figure 2. Typical Switching Times
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Page 3
, POWER DISSIPATION (WATTS)
K
D
P
TAT
4
3
2
1
MJF122, MJF127
C
80
60
T
C
40
T
20
A
0
0
40 60 100 120 16080 140
20
T, TEMPERATURE (°C)
Figure 3. Maximum Power Derating
1
0.5
0.3
0.2
0.1
0.05
r(t), TRANSIENT THERMAL
0.03
RESISTANCE (NORMALIZED)
0.02
0.01
0.1 0.5 10 20 50 100 200 500 5K 10
0.2
0.3
SINGLE PULSE
R
q
JC(t)
T
J(pk)
152
= r(t) R
- TC = P
q
(pk)
JC
R
(t)
q
JC
1K 2K30 3003
t, TIME (ms)
Figure 4. Thermal Response
10
5
3
2
1
0.5
0.3
, COLLECTOR CURRENT (AMPS)
C
I
0.2
0.1
TJ = 150°C
d
c
CURRENT LIMIT
SECONDARY BREAKDOWN
LIMIT
THERMAL LIMIT @
T
= 25°C (SINGLE PULSE)
C
1
23 50
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
5 10020
10
5 ms
30
1ms
100 ms
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 5 is based on T
J(pk)
variable depending on conditions. Secondary breakdown
pulse limits are valid for duty cycles to 10% provided T
< 150_C. T
may be calculated from the data in Figure 4.
J(pk)
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by secondary breakdown.
3K
− V
C
CE
= 150_C; TC is
J(pk)
Figure 5. Maximum Forward Bias
Safe Operating Area
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3
Page 4
MJF122, MJF127
10,000
5000
3000
2000
1000
500
300
200
100
50
, SMALL-SIGNAL CURRENT GAIN
30
fe
h
20
10
1 100050105 100 5002 20 200
PNP
NPN
TC = 25°C
V
= 4 Vdc
CE
= 3 Adc
I
C
f, FREQUENCY (kHz)
Figure 6. Typical Small−Signal Current Gain
NPN
MJF122
20,000
10,000
5000
TJ = 150°C
3000
2000
1000
, DC CURRENT GAIN
FE
h
500
25°C
-55°C
VCE = 4 V
300
200
100
70
C, CAPACITANCE (pF)
50
30
0.1
20,000
10,000
7000
5000
3000
2000
1000
, DC CURRENT GAIN
FE
700
h
500
PNP
MJF127
TJ = 150°C
-55°C
C
ob
C
ib
PNP
NPN
10 500.2 2 20
VR, REVERSE VOLTAGE (VOLTS)
Figure 7. Typical Capacitance
25°C
TJ = 25°C
100510.5
VCE = 4 V
300
200
0.1
0.2 0.5
0.3 1
I
C
3
2.6
IC = 2 A
2.2
1.8
1.4
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
V
1
0.3 0.5 0.7 1025
0.7 3
, COLLECTOR CURRENT (AMP)
4 A
1
IB, BASE CURRENT (mA)
6 A
3 7 0.3 0.5 0.7 10251203037
300
2 7 0.1 0.2 0.50.3 10.7 3 5
510
200
27
IC, COLLECTOR CURRENT (AMP)
Figure 8. Typical DC Current Gain
3
TJ = 25°C
2.6
20 30
, COLLECTOR-EMITTER VOLTAGE (VOLTS)
CE
V
2.2
1.8
1.4
IC = 2 A
1
4 A
I
, BASE CURRENT (mA)
B
6 A
Figure 9. Typical Collector Saturation Region
10
TJ = 25°C
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Page 5
MJF122, MJF127
V, VOLTAGE (VOLTS)
, TEMPERATURE COEFFICIENT (mV C)°θ
V
2.5
1.5
0.5
+ 5
+ 4
+ 3
+ 2
+ 1
- 1
- 2
- 3
- 4
- 5
3
2
1
0.1
0
0.1
NPN
MJF122
PNP
MJF127
3
TJ = 25°C
TJ = 25°C
2.5
2
V
@ IC/IB = 250
BE(sat)
VBE @ VCE = 4 V
V
@ IC/IB = 250
CE(sat)
0.2 0.5 50.3 10.7 3 10
I
, COLLECTOR CURRENT (AMP)
C
72 0.1 0.2 0.5 50.3 10.7 3 1072
V, VOLTAGE (VOLTS)
1.5
1
0.5
VBE @ VCE = 4 V
V
BE(sat)
I
C
@ IC/IB = 250
V
CE(sat)
, COLLECTOR CURRENT (AMP)
Figure 10. Typical “On” Voltages
+ 5
*IC/IB ≤ h
FE 3
25°C to 150°C
- 55°C to 25°C
*qVC FOR V
CE(sat)
25°C to 150°C
- 55°C to 25°C
qVB FOR V
BE
0.2 0.5 50.3 10.7 3 1072 0.1 0.2 0.5 50.3 1 3 1072
I
, COLLECTOR CURRENT (AMP)
C
+ 4
*IC/IB ≤ h
FE 3
+ 3
+ 2
+ 1
0
- 1
*qVC FOR V
CE(sat)
- 2
- 3
qVB FOR V
- 4
, TEMPERATURE COEFFICIENTS (mV/ C)°θ
V
- 5
BE
IC, COLLECTOR CURRENT (AMP)
@ IC/IB = 250
- 55°C to 25°C
- 55°C to 25°C
25°C to 150°C
25°C to 150°C
Figure 11. Typical Temperature Coefficients
5
10
REVERSE
4
10
μ
3
10
2
10
FORWARD
VCE = 30 V
TJ = 150°C
1
10
, COLLECTOR CURRENT (A)
0
C
I
10
-1
10
-0.6 -0.2 +0.8 +1 +1.2 +1.4
100°C
25°C
0- 0.4
+0.2 +0.4 +0.6
VBE, BASE-EMITTER VOLTAGE (VOLTS)
Figure 12. Typical Collector Cut−Off Region
5
10
4
10
3
10
2
10
1
10
, COLLECTOR CURRENT (A)μI
C
0
10
-1
10
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5
REVERSE FORWARD
VCE = 30 V
TJ = 150°C
100°C
25°C
0+0.4 -0.2 -0.4 -0.6+0.6 +0.2 -0.8 -1 -1.2 -1.4
VBE, BASE-EMITTER VOLTAGE (VOLTS)
Page 6
MJF122, MJF127
NPN
MJF122
BASE
COLLECTOR
≈ 8 k ≈ 120
EMITTER
PNP
MJF127
BASE
≈ 8 k ≈ 120
Figure 13. Darlington Schematic
TEST CONDITIONS FOR ISOLATION TESTS*
FULLY ISOLATED PACKAGE
LEADS
HEATSINK
0.110, MIN
COLLECTOR
EMITTER
Figure 14. Mounting Position
*Measurement made between leads and heatsink with all leads shorted together.
MOUNTING INFORMATION
4-40 SCREW
PLAIN WASHER
HEATSINK
COMPRESSION WASHER
NUT
Figure 15. Typical Mounting Techniques*
Laboratory tests on a limited number of samples indicate, when using the screw and compression washer mounting technique, a screw
torque of 6 to 8 in
stant pressure on the package over time and during large temperature excursions.
Destructive laboratory tests show that using a hex head 4−40 screw, without washers, and applying a torque in excess of 20 in.lbs will
cause the plastic to crack around the mounting hole, resulting in a loss of isolation capability.
Additional tests on slotted 4−40 screws indicate that the screw slot fails between 15 to 20 in
age. However, in order to positively ensure the package integrity of the fully isolated device, ON Semiconductor does not recommend
exceeding 10 in
** For more information about mounting power semiconductors see Application Note AN1040.
.
lbs is sufficient to provide maximum power dissipation capability. The compression washer helps to maintain a con-
.
lbs without adversely affecting the pack-
.
lbs of mounting torque under any mounting conditions.
CLIP
HEATSINK
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Page 7
MJF122, MJF127
PACKAGE DIMENSIONS
TO−220
CASE 221D−03
ISSUE J
SEATING
−T−
PLANE
F
−B−
Q
C
S
U
A
123
H
G
N
−Y−
J
R
K
L
D
3 PL
M
M
0.25 (0.010) Y
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH
3. 221D-01 THRU 221D-02 OBSOLETE, NEW
STANDARD 221D-03.
INCHES
DIMAMIN MAX MIN MAX
0.617 0.635 15.67 16.12
B 0.392 0.419 9.96 10.63
C 0.177 0.193 4.50 4.90
D 0.024 0.039 0.60 1.00
F 0.116 0.129 2.95 3.28
G 0.100 BSC 2.54 BSC
H 0.118 0.135 3.00 3.43
J 0.018 0.025 0.45 0.63
K 0.503 0.541 12.78 13.73
L 0.048 0.058 1.23 1.47
N 0.200 BSC 5.08 BSC
Q 0.122 0.138 3.10 3.50
R 0.099 0.117 2.51 2.96
S 0.092 0.113 2.34 2.87
U 0.239 0.271 6.06 6.88
STYLE 2:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
MILLIMETERS
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
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Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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For additional information, please contact your local
Sales Representative
MJF122/D
7
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