Datasheet MJE350T4G, MJE340T4G Specification

MJD340,
NJVMJD340T4G(NPN),
MJD350,
NJVMJD350T4G(PNP)

High Voltage Power
Transistors

DPAK for Surface Mount Applications

Designed for line operated audio output amplifier, switchmode

power supply drivers and other switching applications.

Features

• Lead Formed for Surface Mount Applications in Plastic Sleeves

(No Suffix)

• Electrically Similar to Popular MJE340 and MJE350

• Epoxy Meets UL 94 V−0 @ 0.125 in

• NJV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

MAXIMUM RATINGS

Rating Symbol Max Unit

Collector−Emitter Voltage V
Collector−Base Voltage V
Emitter−Base Voltage V
Collector Current − Continuous I
Collector Current − Peak I
Total Power Dissipation

@ T

= 25°C

C

Derate above 25°C

Total Power Dissipation (Note 1)

@ T

= 25°C

A

Derate above 25°C

Operating and Storage Junction
Temperature Range

ESD − Human Body Model HBM 3B V
ESD − Machine Model MM C V

Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.

1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.

CEO

CM

P

P

TJ, T

CB
EB
C

D

D

stg

300 Vdc
300 Vdc

3 Vdc

0.5 Adc

0.75 Adc

15

0.12

1.56

0.012

−65 to +150 °C

W

W/°C

W

W/°C

http://onsemi.com

SILICON

POWER TRANSISTORS

0.5 AMPERE

300 VOLTS, 15 WATTS

COLLECTOR

2, 4

1

BASE

3

EMITTER

BASE

2

1

3

DPAK

CASE 369C

STYLE 1

MARKING DIAGRAM

AYWW

J3x0G

A = Assembly Location
Y = Year
WW = Work Week
J3x0 = Device Code

G = Pb−Free Package

x= 4 or 5

ORDERING INFORMATION

See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.

COLLECTOR

2, 4

1

3

EMITTER

4

© Semiconductor Components Industries, LLC, 2013

August, 2013 − Rev. 11

1 Publication Order Number:

MJD340/D

MJD340, NJVMJD340T4G (NPN), MJD350, NJVMJD350T4G (PNP)

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

Thermal Resistance, Junction−to−Case
Thermal Resistance, Junction−to−Ambient (Note 2)
Leading Temperature for Soldering Purpose T

2. These ratings are applicable when surface mounted on the minimum pad sizes recommended.

R
R

q

JC

q

JA
L

8.33 °C/W
80 °C/W

260 °C

ELECTRICAL CHARACTERISTICS (T

= 25_C unless otherwise noted)

C

Characteristic

OFF CHARACTERISTICS

Collector−Emitter Sustaining Voltage (Note 3)

(IC = 1 mA, IB = 0)

Collector Cutoff Current

(V

= 300 V, IE = 0)

CB

Emitter Cutoff Current

(V

= 3 V, IC = 0)

BE

ON CHARACTERISTICS (Note 3)

DC Current Gain

(I

= 50 mA, VCE = 10 V)

C

Collector−Emitter Saturation Voltage

(I

= 100 mA, IB = 10 mA)

C

Base−Emitter On Voltage

(I

= 1 A, VCE = 10 V)

C

DYNAMIC CHARACTERISTICS

Current Gain − Bandwidth Product

(I

= 50 mA, VCE = 10 V, f = 10 MHz)

C

3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.

Symbol

V

CEO(sus)

I

CEO

I

EBO

h

FE

V

CE(sat)

V

BE(on)

f

T

Min

300

−

−

30

−

−

10

Max

−

0.1

0.1

240

1

1.5

−

Unit

V

mA

mA

−

V

V

MHz

http://onsemi.com

2

300

MJD340

MJD340

200

100

, DC CURRENT GAIN

FE

h

MJD340, NJVMJD340T4G (NPN), MJD350, NJVMJD350T4G (PNP)

TYPICAL CHARACTERISTICS

VCE = 2 V

= 10 V

V

CE

TJ = 150°C

70

50

30

20

10

+100°C

+25°C

-55°C

1

25107

3 20 30 50 70 100 200 300 500

IC, COLLECTOR CURRENT (mAdc)

Figure 1. DC Current Gain

200

100

70

50

TJ = 150°C

25°C

-55°C

1

TJ = 25°C

V, VOLTAGE (VOLTS)

0.8

0.6

0.4

0.2

V

@ IC/IB = 10

CE(sat)

0

10

20 30 50 100 200 500

V

@ IC/IB = 10

BE(sat)

VBE @ VCE = 10 V

IC/IB = 5

IC, COLLECTOR CURRENT (mA)

300

Figure 2. “On” Voltages

MJD350 MJD350

1

0.8

0.6

1

TJ = 25°C

V

BE(sat)

@ IC/IB = 10

VBE @ VCE = 10 V

30

, DC CURRENT GAIN

FE

20

h

10

VCE = 2 V
V

= 10 V

CC

7 10 20 30 100 200

5

IC, COLLECTOR CURRENT (mA)

50 70

Figure 3. DC Current Gain

0.4

V, VOLTAGE (VOLTS)

0.2

300 500

http://onsemi.com

3

IC/IB = 10

V

CE(sat)

507 10 20 30 100 200

IC, COLLECTOR CURRENT (mA)

50 70 300 500

Figure 4. “On” Voltages

IC/IB = 5

1

0

0.7
D = 0.5

0.5

0.3

0.2

0.1

0.07

0.05

0.03

r(t), TRANSIENT THERMAL

RESISTANCE (NORMALIZED)

SINGLE PULSE

0.02

MJD340, NJVMJD340T4G (NPN), MJD350, NJVMJD350T4G (PNP)

0.2

P

0.1

0.05

0.01

R

= r(t) R

q

JC(t)

R

q

JC

D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
T

J(pk)

q

- TC = P

JC

1

(pk) qJC(t)

= 8.33°C/W MAX

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

2

1000

500
300

200

100

, COLLECTOR CURRENT (mA)

C

I

0.01

50
30

20

10

5
3

2

1

10

0.02 0.1 0.50.2

0.01

20 30 50 70 100

VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)

0.05 1 2 5 10 20 50 100 200 1 k500

0.03 0.3 3 30 300

100 ms

1 ms

dc

200 300 500 700 100

Figure 6. Active Region Safe Operating Area

TAT

C

25

2.5

t, TIME (ms)

Figure 5. Thermal Response

a transistor: average junction temperature and second

500 ms

breakdown. Safe operating area curves indicate I
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.

variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided T
≤ 150_C. T
Figure 5. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.

There are two limitations on the power handling ability of

− V

C

CE

The data of Figure 6 is based on T

may be calculated from the data in

J(pk)

= 150_C; TC is

J(pk)

J(pk)

1.5

0.5

, POWER DISSIPATION (WATTS)

D

P

20

2

15

T

A

10

1

5

0

0

25

T

C

50 75 100 125 150

T, TEMPERATURE (°C)

Figure 7. Power Derating

http://onsemi.com

4

MJD340, NJVMJD340T4G (NPN), MJD350, NJVMJD350T4G (PNP)

ORDERING INFORMATION

Device Package Shipping

MJD340G DPAK

(Pb−Free)

MJD340RLG DPAK

(Pb−Free)

MJD340T4G DPAK

(Pb−Free)

NJVMJD340T4G DPAK

(Pb−Free)

MJD350G DPAK

(Pb−Free)

MJD350T4G DPAK

(Pb−Free)

NJVMJD350T4G DPAK

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

75 Units / Rail

1,800 / Tape & Reel

2,500 / Tape & Reel

2,500 / Tape & Reel

75 Units / Rail

2,500 / Tape & Reel

2,500 / Tape & Reel

†

http://onsemi.com

5

L3

P

al

L4

b2

MJD340, NJVMJD340T4G (NPN), MJD350, NJVMJD350T4G (PNP)

PACKAGE DIMENSIONS

DPAK (SINGLE GAUGE)

CASE 369C

ISSUE D

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI­MENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.

5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89
b2 0.030 0.045 0.76 1.14
b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61

c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22

E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC

H 0.370 0.410 9.40 10.41

L 0.055 0.070 1.40 1.78
L1 0.108 REF 2.74 REF
L2 0.020 BSC 0.51 BSC
L3 0.035 0.050 0.89 1.27
L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

e

E

b3

4

12 3

A

B

D

b

0.005 (0.13) C

DETAIL A

M

C

A

c2

H

c

GAUGE

L2

PLANE

L

L1

DETAIL A

ROTATED 90 CW5

SOLDERING FOOTPRINT*

6.20

0.244

2.58

0.102

A1

3.00

0.118

Z

H

SEATING

C

PLANE

MILLIMETERSINCHES

5.80

0.228

1.60

0.063

SCALE 3:1

6.17

0.243

ǒ

inches

mm

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to m ake c hanges w ithout f urt her n otice t o a ny p roducts h erein. S CILLC m akes n o warrant y, representation or guarantee r egarding t he s uitabilit y of its products for an y
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequent ial o r i ncidental d amages. “ Typical” parameters which m ay b e p rovided i n S CILLC d ata s heets a nd/or s pecifications c an a nd do vary in dif ferent a pplications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the r ights of others. SCILLC products are not designed, intended, or authorized for use as component s in syst ems intended for
surgical implant into the b ody, or other a pplications i ntended t o s upport o r s ustain l ife, o r f or a ny o ther a pplication i n w hich t he f ailure o f t he S CILLC pr oduct c ould c reate a s ituation w here
personal injury or death may occur. S hould B uyer p urchase o r u se S CILLC p r oduct s for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, e mployees, s ubsidiaries, a f filiates, a nd d istributors h armless a gainst all claims, costs, d amages, a nd e xpenses, a nd r easonable a ttorney fees arising o ut o f, d irectly o r i ndirect ly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim a lleges t hat SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

UBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [e-mail]

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: [phone]

Japan Customer Focus Center

Phone: 81−3−5817−1050

http://onsemi.com

ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your loc
Sales Representative

MJD340/D

6

Mouser Electronics

Authorized Distributor

Click to View Pricing, Inventory, Delivery & Lifecycle Information:

ON Semiconductor:
MJD340G MJD340RLG MJD340T4G MJD350T4G NJVMJD340T4G NJVMJD350T4G