Datasheet MJE16106 Datasheet (Motorola)

Page 1
1
Motorola Bipolar Power Transistor Device Data
  
   
Switchmode Bridge Series
. . . specifically designed for use in half bridge and full bridge off line converters.
Rugged RBSOA Capability
Collector–Emitter Sustaining Voltage — V
CEO(sus)
— 400 V
Collector–Emitter Breakdown — V
(BR)CES
— 650 V
State–of–Art Bipolar Power Transistor Design
Fast Inductive Switching:
tfi = 30 ns (Typ) @ 100_C tc = 65 ns (Typ) @ 100_C tsv = 1.3 µs (Typ) @ 100_C
Ultrafast FBSOA Specified
100_C Performance Specified for:
RBSOA Inductive Load Switching Saturation Voltages Leakages
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Collector–Emitter Sustaining Voltage
V
CEO(sus)
400
Vdc
Collector–Emitter Breakdown Voltage
V
CES
650
Vdc
Emitter–Base Voltage
V
EBO
6
Vdc
Collector Current — Continuous
— Pulsed (1)
I
C
I
CM
8
16
Adc
Base Current — Continuous
— Pulsed (1)
I
B
I
BM
6
12
Adc
Total Power Dissipation @ TC = 25_C
@ TC = 100_C
Derated above 25_C
P
D
100
40
0.8
Watts
W/_C
Operating and Storage Temperature
TJ, T
stg
–55 to 150
_
C
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case
R
θJC
1.25
_
C/W
Maximum Lead Temperature for
Soldering Purposes 1/8 from Case for 5 Seconds
T
L
275
_
C
(1) Pulse Test: Pulse Width = 5.0 ms, Duty Cycle v 10%.
Designer’s Data for “Worst Case” Conditions —The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves —representing boundaries on device characteristics —are given to facilitate “worst case” design.
Designer’s and SWITCHMODE are trademarks of Motorola Inc.

SEMICONDUCTOR TECHNICAL DATA
Order this document
by MJE16106/D
Motorola, Inc. 1995

POWER TRANSISTORS
8 AMPERES
400 VOLTS
100 AND 125 WATTS
CASE 221A–06
TO–220AB
REV 1
Page 2
MJE16106
2
Motorola Bipolar Power Transistor Device Data
ELECTRICAL CHARACTERISTICS (T
C
= 25_C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
ÎÎÎ
ÎÎÎ
ÎÎÎ
Unit
OFF CHARACTERISTICS (1)
Collector–Emitter Sustaining Voltage (Table 1)
(IC = 20 mAdc, IB = 0)
V
CEO(sus)
400
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vdc
Collector Cutoff Current
(VCE = 650 Vdc, V
BE(off)
= 1.5 V)
(VCE = 650 Vdc, V
BE(off)
= 1.5 V, TC = 100_C)
I
CEV
— —
— —
100
1000
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
µAdc
Collector Cutoff Current
(VCE = 650 Vdc, RBE = 50 , TC = 100_C)
I
CER
1000
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
µAdc
Emitter–Base Leakage
(VEB = 6.0 Vdc, IC = 0)
I
EBO
10
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
µAdc
ON CHARACTERISTICS (1)
Collector–Emitter Saturation Voltage
(IC = 2.5 Adc, IB = 0.25 Adc) (IC = 5.0 Adc, IB = 0.5 Adc) (IC = 5.0 Adc, IB = 1.0 Adc) (IC = 5.0 Adc, IB = 1.0 Adc, TC = 100_C)
V
CE(sat)
— — — —
0.2
0.4
0.2
0.3
0.9
2.0
1.0
1.5
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vdc
Base–Emitter Saturation Voltage
(IC = 5.0 Adc, IB = 1.0 Adc) (IC = 5.0 Adc, IB = 1.0 Adc, TC = 100_C)
V
BE(sat)
— —
0.9
0.8
1.5
1.5
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Vdc
DC Current Gain
(IC = 8.0 Adc, VCE = 5.0 Vdc)
h
FE
6
13
22
ÎÎÎ
ÎÎÎ
ÎÎÎ
DYNAMIC CHARACTERISTICS
Dynamic Saturation
V
CE(dsat)
See Figures 11, 12, and 13
ÎÎÎ
ÎÎÎ
ÎÎÎ
V
Output Capacitance
(VCE = 10 Vdc, IE = 0, f
test
= 1.0 kHz)
C
ob
300
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
pF
SWITCHING CHARACTERISTICS
Inductive Load (Table 1)
Storage
t
sv
950
2000
ÎÎÎ
ÎÎÎ
ÎÎÎ
Crossover
_
C
t
c
45
150
ÎÎÎ
ÎÎÎ
ÎÎÎ
Fall Time
_
C
t
fi
20
75
ÎÎÎ
ÎÎÎ
ÎÎÎ
Storage
V
BE(off)
= 5 V,
V
CE(pk)
= 250 V
t
sv
1300
2600
ÎÎÎ
ÎÎÎ
ÎÎÎ
Crossover
CE(pk)
= 250 V
_
C
t
c
65
200
ÎÎÎ
ÎÎÎ
ÎÎÎ
Fall Time
_
C
t
fi
30
125
ÎÎÎ
ÎÎÎ
ÎÎÎ
Resistive Load (Table 2)
Delay Time
t
d
30
ÎÎÎ
ÎÎÎ
ÎÎÎ
Rise Time
t
r
200
ÎÎÎ
ÎÎÎ
ÎÎÎ
Storage Time
IC = 5.0 A, IB1 = 0.5 A, VCC = 250 V,
IB2 = 1.0 A
t
s
1800
ÎÎÎ
ÎÎÎ
ÎÎÎ
Fall Time
VCC = 250 V, PW = 30 µs,
t
f
100
ÎÎÎ
ÎÎÎ
ÎÎÎ
Storage Time
Duty Cycle = v 2.0%
t
s
1200
ÎÎÎ
ÎÎÎ
ÎÎÎ
Fall Time
v
2.0%
V
BE(off)
= 5 V
t
f
70
ÎÎÎ
ÎÎÎ
ÎÎÎ
(1) Pulse Test: Pulse Width = 300 µs, Duty Cycle v 2.0%.
IC = 5.0 A, IB1 = 0.5 A,
TJ = 25
TJ = 100
ns
ns
Page 3
MJE16106
3
Motorola Bipolar Power Transistor Device Data
C, CAPACITANCE (pF)
V
BE
, BASE–EMITTER VOLTAGE (VOLTS)
V
CE
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
V
CE
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 1. DC Current Gain
IC, COLLECTOR CURRENT (AMPS)
0.05 0.2 2 5
20
h
FE
, DC CURRENT GAIN
0.1 1
2
0.01
0.5
40 30
7
0.02
VCE = 5.0 V
TJ = 100°C
TJ = 25°C
TJ = –55°C
10
IC, COLLECTOR CURRENT (AMPS)
Figure 2. Collector–Emitter Saturation Voltage
0.5
3
0.2
0.03
0.07
1
0.1
0.05
Figure 3. Collector–Emitter Saturation Region
.01
IB, BASE CURRENT (AMPS)
.07.02
1
0.2
0.07 .03 .05 0.1 5
5
0.5
IC = 1 A 3 A
0.2 1 2
5 A
8 A
7 A
3
Figure 4. Base–Emitter Saturation Region
0.1 0.70.2
1.0
0.5
0.2
0.3 0.5 1 10
2.0
0.7
1.5
2 3 5 7
Figure 5. Capacitance
10K
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
C
ib
0.1
5K 2K
1K
500 200
100
50 20
10
0.2 0.5 1 2 5 10 20 50 100 500
300
3K
200
30
1000
TJ = 25°C f = 1.0 kHz
10
5
3
0.3
2
0.7
0.5 32 50.7 1
0.1 0.2
10
IC/IB = 5 IC/IB = 10
IC, COLLECTOR CURRENT (AMPS)
IC/IB = 10 IC/IB = 5
0.3
7
0.7
0.1
0.05
3
0.3
2
0.3
7K
700
70
0.3 0.50.7 7 10
C
ob
TJ = 100°C
TJ = 25°C
TJ = 25°C
TJ = 25°C
TJ = 100°C
TYPICAL STATIC CHARACTERISTICS
Page 4
MJE16106
4
Motorola Bipolar Power Transistor Device Data
t
c
, CROSSOVER TIME (ns)
, STORAGE TIME (ns)t
sv
IC, COLLECTOR CURRENT (AMPS)
Figure 6. Inductive Storage Time
20K
7K 5K
2K
200
500
IB2 = I
B1
1K
3K
2 3 5 71.5 1510
IC, COLLECTOR CURRENT (AMPS)
700
300 200
70 50
10
Figure 7. Crossover Time
30
1K
IC, COLLECTOR CURRENT (AMPS)
Figure 8. Collector Current Fall Time
t
fi
, FALL TIME (ns)
1 K 700 500
100
10
20
50
200
2 3 5 71.5 10
Figure 9. Inductive Switching Measurements
TIME
Figure 10. Peak Reverse Base Current
IC = 5.0 A TJ = 25
°
C
2
0
4 8 10
6
10
8
4
2
6
I
B2
, REVERSE BASE CURRENT (AMPS)
V
BE(off)
, REVERSE BASE VOLTAGE (VOLTS)
300
700
10K
2 3 5 71.5 1510
500
100
20
30
70
300
IB1 = 1.0 A
1
7
5
3
1 3 7 950
9
t, TIME
V
CE
90% I
B1
t
sv
I
C(pk)
V
CE(pk)
90% V
CE(pk)
90% I
C(pk)
t
c
10% V
CE(pk)
10%
I
C(pk)
I
C
I
B
2% I
C
t
rv
t
fi
t
ti
IB2 = 2 (IB1)
V
BE(off)
= 2 V
V
BE(off)
= 5 V
IB2 = I
B1
V
BE(off)
= 2 V
V
BE(off)
= 5 V
IB2 = 2 (IB1)
IB2 = I
B1
V
BE(off)
= 2 V
V
BE(off)
= 5 V
IB2 = 2 (IB1)
IB1 = 1.0 A
TYPICAL INDUCTIVE SWITCHING CHARACTERISTICS
IC/IB = 10, TC = 100°C, V
CE(pk)
= 250 V
Page 5
MJE16106
5
Motorola Bipolar Power Transistor Device Data
+15
150
100
100 µF
MTP8P10
MPF930
MPF930
MUR105
MJE210
150
500 µF
V
off
50
+10
MTP12N10
MTP8P10
R
B1
R
B2
A
1
µ
F
1
µ
F
Drive Circuit
*Tektronix AM503
*P6302 or Equivalent
Scope — Tektronix 7403 or Equivalent
T1[
L
coil(ICpk
)
V
CC
Note: Adjust V
off
to obtain desired V
BE(off)
at Point A.
T1 adjusted to obtain I
C(pk)
T
1
+V
–V
0 V
A
*I
B
*I
C
L
T.U.T.
MR918
V
clamp
V
CC
I
C(pk)
V
CE(pk)
V
CE
I
B
I
C
I
B1
I
B2
V
CEO(sus)
L = 10 mH RB2 = VCC = 20 Volts I
C(pk)
= 20 mA
Inductive Switching
L = 200 µH RB2 = 0 VCC = 20 Volts RB1 selected for desired I
B1
RBSOA
L = 200 µH RB2 = 0 VCC = 20 Volts RB1 selected for desired I
B1
Table 1. Inductive Load Switching
td and t
r
ts and t
f
H.P. 214
OR
EQUIV.
P.G.
50
RB = 8.5
*I
B
*I
C
T.U.T.
R
L
V
CC
V
in
0 V
11 V
tr
15 ns
*Tektronix AM503
*P6302 or Equivalent
V
CC
250 Vdc
R
L
25
I
C
5 A
I
B
0.5 A
+15
150
100
100 µF
MTP8P10
MPF930
MPF930
MUR105
MJE210
150
500 µF
V
off
50
+10 V
MTP12N10
MTP8P10
R
B1
R
B2
A
1 µF
1 µF
T.U.T.
*I
C
*I
B
A
R
L
V
CC
V
(off)
adjusted to give specified off drive
V
CC
250 V
I
C
5 A
I
B1
0.5 A
I
B2
Per Spec
R
B1
30
R
B2
Per Spec
R
L
25
Table 2. Resistive Load Switching
Figure 11. Definition of Dynamic Saturation
Measurement
t, TIME
I
B1
V
CE
90% I
B1
V
CE(dsat)
= DYNAMIC SATURATION VOLTAGE AND IS MEASURED FROM THE 90% POINT OF IB1 (t = 0) TO A MEASUREMENT POINT ON THE TIME AXIS (t1, t2 or t3 etc.)
t1t2t3t
4
0
0
t5t6t7t
8
Figure 12. Dynamic Saturation Voltage
0
IB, BASE CURRENT (AMPS)
1
4
0.5 2.5
V
CE
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
5
t = 1 µs
1 21.5
0
3
2
MAXIMUM TYPICAL
IC = 5 A TJ = 25
°
C
t = 2 µs
Page 6
MJE16106
6
Motorola Bipolar Power Transistor Device Data
DYNAMIC SATURATION VOLTAGE
For bipolar power transistors low DC saturation voltages are achieved by conductivity modulating the collector region. Since conductivity modulation takes a finite amount of time, DC saturation voltages are not achieved instantly at turn–on. In bridge circuits, two transistor forward converters, and two transistor flyback converters dynamic saturation characteris­tics are responsible for the bulk of dynamic losses. The MJE16106 has been designed specifically to minimize these losses. Performance is roughly four times better than the original version of MJ16006.
From a measurement point of view, dynamic saturation voltage is defined as collector–emitter voltage at a specific point in time after IB1 has been applied, where t = 0 is the 90% point on the IB1 rise time waveform. This definition is il­lustrated in Figure 1 1. Performance data was taken in the cir­cuit that is shown in Figure 13. The 24 volt rail allows a Tektronix 2445 or equivalent scope to operate at 1 volt per division without input amplifier saturation.
Dynamic saturation performance is illustrated in Figure 12. The MJE16106 reaches DC saturation levels in approxi­mately 2 µs, provided that sufficient base drive is provided. The dependence of dynamic saturation voltage upon base drive suggests a spike of IB1 at turn–on to minimize dynamic saturation losses, and also avoid overdrive at turn–off. How­ever, in order to simulate worst case conditions the guaran­teed dynamic saturation limits in this data sheet are specified with a constant level of IB1.
+ 24
1 k
1 k
10 k
0.1
µ
F
0.01
µ
F
100 pF
U1
MC1455
(OSCILLATOR)
1N5314
Q1
1N4111
MJ11012
100
µ
F
100
1 W
2.4
20 W
0.01
µ
F
Q4
IRFD9120
Q5 MTM8P08
2.4 mH
1N5831
10
µ
F
I
C
I
B
V
CE
MUR405
MUR405
47
1 W
500
Q2
Q3 IRFD113
0.01
µ
F
0.01
µ
F
IRFD9123
1N914
10 k
1.8 k
Q6 MTP25N06
4 8
7
6
2
1 5
3
4 8
2
3
7
6
1 5
Figure 13. Dynamic Saturation Test Circuit
T.U.T.
U2
MC1455
(25
µ
s)
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 14. Maximum Rated Forward Bias
Safe Operating Area
Figure 15. Maximum Rated Reverse Bias
Safe Operating Area
20 18 16
10
0
2
4
14
100 200 300 5000 400
20
7
10
7
1
0.02 100
WIRE BOND LIMIT THERMAL LIMIT SECONDARY BREAKDOWN LIMIT
I
C
, COLLECTOR CURRENT (AMPS)
0.1
10 20 200 650
3
0.3
50
0.2
0.05
dc
TC = 25°C
1.0 ms 100 ns
8
10 µs
REGION II — EXPANDED FBSOA USING MUR870 ULTRAFAST RECTIFIER (SEE FIGURE 16)
I
C
, COLLECTOR CURRENT (AMPS)
0.7
2
0.03
5
0.5
0.07
30 30070 500
MJE16106
II
12
6
600 700 800 900 1K
IC/IB1 = 5
TJ ≤ 100°C
V
BE(off)
= 1 to 5 V
V
BE(off)
= 0 V
GUARANTEED SAFE OPERATING AREA INFORMATION
Figure 16. Switching Safe Operating Area
+15
150
100 µF
MTP8P10
MPF930
MPF930
MUR105
MJE210
150
500 µF
V
Off
50
+10
MTP12N10
R
B1
R
B2
1
µ
F
1.0
µ
F
100
MTP8P10
MUR105
MUR170
T.U.T.
MUR870
VCE (650 V MAX)
10
µ
F
10 mH
Note: Test Circuit for Ultra–fast FBSOA
Note: RB2 = 0 and V
Off
= –5 Volts
Page 7
MJE16106
7
Motorola Bipolar Power Transistor Device Data
t, TIME (ms)
1
0.01
0.01
0.7
0.2
0.1
0.05
0.02
r(t), TRANSIENT THERMAL RESISTANCE
0.05 1 2 5 10 20 50 100 200 500
Z
θ
JC(t)
= r(t) R
θ
JC
R
θ
JC
= 1.0 OR 1.25
°
C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t
1
T
J(pk)
– TC = P
(pk)
Z
θ
JC
P
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
2
D = 0.5
0.2
0.05
SINGLE PULSE
0.1
0.1 0.50.2
(NORMALIZED)
1.0 k
0.5
0.3
0.07
0.03
0.02
Figure 17. Power Derating
TC, CASE TEMPERATURE (°C)
Figure 18. Typical Thermal Response [Z
θJC
(t)]
100
0
0
120
POWER DERATING FACTOR (%)
40 200
80
80
40
20
THERMAL
DERATING
60
160
SECOND BREAKDOWN DERATING
0.02
0.01
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a transistor: average junction temperature and second break­down. Safe operating area curves indicate IC – VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipa­tion than the curves indicate.
The data in Figure 14 is based on TC = 25_C; T
J(pk)
is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when TC 25_C. Second breakdown limitations do n ot derate the same as thermal limitations. Allowable current at the voltages shown on Figure 14 may be found at any case temperature by using the appropriate curve on Figure 17.
T
J(pk)
may be calculated from the data in Figure 18. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations im­posed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base–to–emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Biased Safe Operating Area and represents the voltage–current condition allowable dur­ing reverse biased turn–off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 15 gives the RBSOA character­istics.
SWITCHMODE III DESIGN CONSIDERATIONS
FBSOA
Allowable dc power dissipation in bipolar power transistors decreases dramatically with increasing collector–emitter voltage. A transistor which safely dissipates 100 watts at 10 volts will typically dissipate less than 10 watts at its rated V
(BR)CEO(sus)
. From a power handling point of view, current and voltage are not interchangeable (see Application Note AN875).
Page 8
MJE16106
8
Motorola Bipolar Power Transistor Device Data
TURN–ON
Safe turn–on load line excursions are bounded by pulsed FBSOA curves. The 10 µs curve applies for resistive loads, most capacitive loads, and inductive loads that are clamped by standard or fast recovery rectifiers. Similarly, the 100 ns curve applies to inductive loads which are clamped by ultra– fast recovery rectifiers, and are valid for turn–on crossover times less than 100 ns (AN952).
At voltages above 75% of V
(BR)CEO(sus)
, it is essential to provide the transistor with an adequate amount of base drive VERY RAPIDLY at turn–on. More specifically, safe op­eration according to the curves is dependent upon base cur­rent rise time being less than collector current rise time. As a general rule, a base drive compliance voltage in excess of 10 volts is required to meet this condition (see Application Note AN875).
TURN–OFF
A bipolar transistor’s ability to withstand turn–off stress is dependent upon its forward base drive. Gross overdrive vio­lates the RBSOA curve and risks transistor failure. For this reason, circuits which use fixed base drive are more likely to fail at light loads due to heavy overdrive (see Application Note AN875).
OPERATION ABOVE V
(BR)CEO(sus)
When bipolars are operated above collector–emitter breakdown, base drive is crucial. A rapid application of ade-
quate forward base current is needed for safe turn–on, as is a stiff negative bias needed for safe turn–off. Any hiccup in the base–drive circuitry that even momentarily violates either of these conditions will likely c ause the transistor to fail. Therefore, it is important to design the driver so that its out­put is negative in the absence of anything but a clean crisp input signal (see Application Note AN952).
RBSOA
Reversed Biased Safe Operating Area has a first order de­pendency on circuit configuration and drive parameters. The RBSOA curves in this data sheet are valid only for the condi­tions specified. For a comparison of RBSOA results in sever­al types of circuits (see Application Note AN951).
DESIGN SAMPLES
Transistor parameters tend to vary much more from wafer lot to wafer lot, over long periods of time, than from one de­vice to the next in the same wafer lot. For design evaluation it is advisable to use transistors from several different date codes.
BAKER CLAMPS
Many unanticipated pitfalls can be avoided by using Baker Clamps. MUR105 and MUR170 diodes are recommended for base drives less than 1 amp. Similarly, MUR405 and MUR470 types are well–suited for higher drive requirements (see Article Reprint AR131).
Page 9
MJE16106
9
Motorola Bipolar Power Transistor Device Data
PACKAGE DIMENSIONS
CASE 221A–06
TO–220AB
ISSUE Y
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED.
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.018 0.025 0.46 0.64 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 ––– 1.15 ––– Z ––– 0.080 ––– 2.04
B
Q
H
Z
L
V
G
N
A
K
F
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4
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SEATING PLANE
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Motorola Bipolar Power Transistor Device Data
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