Datasheet mjd243_mjd253 Datasheet

MJD243 (NPN), MJD253 (PNP)

Complementary Silicon Plastic Power Transistor

DPAK−3 for Surface Mount Applications

Designed for low voltage, low−power, high−gain audio amplifier

applications.

Features

• Collector−Emitter Sustaining Voltage −

V

CEO(sus)

• High DC Current Gain −

h

FE

• Lead Formed for Surface Mount Applications in Plastic Sleeves

(No Suffix)

• Straight Lead Version in Plastic Sleeves (“−1” Suffix)

• Low Collector−Emitter Saturation Voltage −

V

CE(sat)

• High Current−Gain − Bandwidth Product −

f

= 40 MHz (Min) @ I

T

= 100 mAdc

• Annular Construction for Low Leakage −

I

CBO

• Epoxy Meets UL 94 V−0 @ 0.125 in

• ESD Ratings: Human Body Model, 3B u 8000 V

Machine Model, C u 400 V

• These are Pb−Free Packages

= 100 Vdc (Min) @ I = 10 mAdc

= 40 (Min) @ IC = 200 mAdc = 15 (Min) @ I

= 1.0 Adc

C

= 0.3 Vdc (Max) @ IC = 500 mAdc = 0.6 Vdc (Max) @ I

C

= 100 nAdc @ Rated V

C

= 1.0 Adc

C

CB

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4.0 A, 100 V, 12.5 W

POWER TRANSISTOR

4

1

Base

Collector

2

3

Emitter

DPAK−3

CASE 369D

STYLE 1

MARKING DIAGRAMS

AYWW

J253G

A = Assembly Location Y = Year WW = Work Week x = 4 or 5 G = Pb−Free Package

2

1

3

DPAK−3

CASE 369C

STYLE 1

AYWW

J2x3G

4

January, 2011 − Rev. 12

See detailed ordering and shipping information in the package

ORDERING INFORMATION

dimensions section on page 6 of this data sheet.

1 Publication Order Number:

MJD243/D

MJD243 (NPN), MJD253 (PNP)

MAXIMUM RATINGS

Rating Symbol Value Unit

Collector−Base Voltage

Collector−Emitter Voltage

Emitter−Base Voltage

Collector Current −Continuous

−Peak

Base Current

Total Device Dissipation @ TC = 25°C Derate above 25°C

Total Device Dissipation @ TA = 25°C (Note 1) Derate above 25°C

Operating and Storage Junction Temperature Range

THERMAL CHARACTERISTICS

Characteristic Symbol Value Unit

Thermal Resistance, Junction−to−Case

Junction−to−Ambient (Note 2)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. When surface mounted on minimum pad sizes recommended.

V

CEO

V

I

P

TJ, T

R R

q q

CB

EB

C

B

D

JC JA

stg

100

7.0

4.0

8.0

1.0

12.5

0.1

1.4

0.011

−65 to + 150

10

89.3

Vdc

Adc

W

W/°C

W

W/°C

°C

°C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

C

Characteristic

OFF CHARACTERISTICS

Collector−Emitter Sustaining Voltage (Note 3)

(I

= 10 mAdc, IB = 0)

C

Collector Cutoff Current

(V

= 100 Vdc, IE = 0)

CB

(VCB = 100 Vdc, IE = 0, TJ = 125°C)

Emitter Cutoff Current

(VBE = 7.0 Vdc, IC = 0)

DC Current Gain (Note 3)

(I

= 200 mAdc, VCE = 1.0 Vdc)

C

(IC = 1.0 Adc, VCE = 1.0 Vdc)

Collector−Emitter Saturation Voltage (Note 3)

(I

= 500 mAdc, IB = 50 mAdc)

C

= 1.0 Adc, IB = 100 mAdc)

(I

C

Base−Emitter Saturation Voltage (Note 3)

(I

= 2.0 Adc, IB = 200 mAdc)

C

Base−Emitter On Voltage (Note 3)

(I

= 500 mAdc, VCE = 1.0 Vdc)

C

DYNAMIC CHARACTERISTICS

Current−Gain − Bandwidth Product (Note 4)

(I

= 100 mAdc, VCE = 10 Vdc, f

C

= 10 MHz)

test

Output Capacitance

(V

= 10 Vdc, IE = 0, f = 0.1 MHz)

CB

2. When surface mounted on minimum pad sizes recommended.

3. Pulse Test: Pulse Width = 300 ms, Duty Cycle [ 2%.

4. f

= ⎪hFE⎪• f

T

test

.

Symbol

V

CEO(sus)

I

CBO

I

EBO

h

FE

V

CE(sat)

V

BE(sat)

V

BE(on)

f

T

C

ob

Min

100

−

40 15

−

40

−

Max

−

100 100

100

180

−

0.3

0.6

1.8

1.5

−

50

Unit

Vdc

nAdc mAdc

nAdc

−

Vdc

MHz

pF

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2

MJD243 (NPN), MJD253 (PNP)

T

C

A

25

2.5

20

2

15

1.5

TA (SURFACE MOUNT)

10

1

T

C

, POWER DISSIPATION (WATTS)

5

0.5

D

P

0

25

50 75 100 125 150

T, TEMPERATURE (°C)

Figure 1. Power Derating

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown.

Safe operating area curves indicate I

− VCE limits of the transistor that must be observed for reliable operation; i.e., the

C

transistor must not be subjected to greater dissipation than the curves indicate.

The data of Figure 2 is based on T

are valid for duty cycles to 10% provided T

= 150°C; TC is variable depending on conditions. Second breakdown pulse limits

J(pk)

v 150°C. T

J(pk)

temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown.

10

5

2

1

0.5

0.2

0.1

0.05

, COLLECTOR CURRENT (AMPS)

C

I

0.02

0.01

1ms

5ms

BONDING WIRE LIMITED THERMALLY LIMITED @ T (SINGLE PULSE) SECOND BREAKDOWN LIMITED CURVES APPLY BELOW RATED V

CEO

V

, COLLECTOR-EMITTER VOLTAGE (VOLTS)

CE

dc

= 25°C

C

500ms

Figure 2. Active Region Maximum

Safe Operating Area

may be calculated from the data in Figure 3. At high case

J(pk)

100ms

502010521

100

1

0.7

0.5

0.3

0.2

0.1

0.07

0.05

r(t), TRANSIENT THERMAL

0.03

RESISTANCE (NORMALIZED)

0.02

0.01

D = 0.5

0.2

0.1

0.05

0.02

0.01

0 (SINGLE PULSE)

0.02 0.05 1 2 5 10 20 50 100 2000.1 0.50.2

R

(t) = r(t) q

q

JC

R

q

JC

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

J(pk)

t, TIME (ms)

JC

= 10°C/W MAX

- TC = P

1

(pk) qJC

Figure 3. Thermal Response

P

(pk)

t

1

t

(t)

2

DUTY CYCLE, D = t1/t

2

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3

MJD243 (NPN), MJD253 (PNP)

, DC CURRENT GAIN

FE

h

500

300 200

100

70 50

30 20

10

7.0

5.0

1.4

1.2

NPN MJD243

TJ = 150°C

0.06 0.1 0.4 4.00.04

TJ = 25°C

25°C

-55°C

0.2

VCE = 1.0 V V

= 2.0 V

CE

1.0 2.00.6

Figure 4. DC Current Gain

200

100

70 50

30 20

10

, DC CURRENT GAIN

FE

7.0

h

5.0

3.0

2.0

1.4

1.2

PNP MJD253

TJ = 150°C

25°C

-55°C

0.06 0.1 0.4 4.00.04 0.2 1.0 2.00.6

IC, COLLECTOR CURRENT (AMP)IC, COLLECTOR CURRENT (AMP)

TJ = 25°C

VCE = 1.0 V V

= 2.0 V

CE

1.0

V

@ IC/IB = 10

BE(sat)

VBE @ VCE = 1.0 V

V, VOLTAGE (VOLTS)

0.8

0.6

0.4

0.2 V

CE(sat)

0

0.04 0.06 0.1 0.4 4.00.2 1.0 2.00.6

, COLLECTOR CURRENT (AMP)

I

C

-1.0

-1.5

-2.0

-2.5

qVB FOR V

0.04

, TEMPERATURE COEFFICIENTS (mV/ C)°θ

V

BE

0.06 0.1 0.4 4.00.2 1.0 2.00.6 0.04 0.06 0.1 0.4 4.00.2 1.0 2.00.6 , COLLECTOR CURRENT (AMP)

I

C

IC/IB = 10

25°C to 150°C

-55°C to 25°C

1.0

0.8

0.6

V, VOLTAGE (VOLTS)

0.4

5.0

0.2

0

0.04 0.06 0.1 0.4 4.00.2 1.0 2.00.6

Figure 5. “On” Voltages

+2.5

+2.0

+1.5

+1.0

+0.5

0

-0.5

-1.0

-1.5

, TEMPERATURE COEFFICIENTS (mV/ C)°θ

-2.0

V

-2.5

V

@ IC/IB = 10

BE(sat)

VBE @ VCE = 1.0 V

V

CE(sat)

IC, COLLECTOR CURRENT (AMP)

*APPLIES FOR IC/IB ≤ h

*qVC FOR V

qVB FOR V

CE(sat)

BE

IC, COLLECTOR CURRENT (AMP)

IC/IB = 10

5.0

FE/3

25°C to 150°C

-55°C to 25°C

25°C to 150°C

-55°C to 25°C

Figure 6. Temperature Coefficients

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4

25 ms

+11 V

0

-9.0 V

tr, tf ≤ 10 ns

DUTY CYCLE = 1.0%

and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS

R

B

D

MUST BE FAST RECOVERY TYPE, e.g.:

1

1N5825 USED ABOVE I MSD6100 USED BELOW I FOR PNP TEST CIRCUIT, REVERSE ALL POLARITIES

Figure 7. Switching Time Test Circuit

MJD243 (NPN), MJD253 (PNP)

V

CC

+30 V

R

C

R

B

D

51

1

SCOPE

-4 V

≈ 100 mA

B

≈ 100 mA

B

1K

500 300

200

t

r

100

50 30

20

t, TIME (ns)

10

5

NPN MJD243

3

PNP MJD253

2

1

0.02

0.01 0.03 0.05 0.50.20.1 0.3 10

t

d

I

, COLLECTOR CURRENT (AMPS)

C

VCC = 30 V I

= 10

C/IB

= 25°C

T

J

Figure 8. Turn−On Time

5213

10K

5K 3K

2K

1K

500 300

200

t, TIME (ns)

100

50 30

20

10

0.01 0.03 0.05 0.50.2

0.02 I

, COLLECTOR CURRENT (AMPS)

C

Figure 9. Turn−Off Time

VCC = 30 V I

t

s

C/IB

I

B1

= I

= 10

B2

TJ = 25°C

t

f

NPN MJD243 PNP MJD253

0.1 0.3 105213

200

100

70

50

C, CAPACITANCE (pF)

C

ib

200

100

70

50

30

20

10

MJD243 (NPN) MJD253 (PNP)

2.0 VR, REVERSE VOLTAGE (VOLTS)

Figure 10. Capacitance

TJ = 25°C

C

ib

C

ob

5020107.05.03.01.0

100

7030

30

C, CAPACITANCE (pF)

20

10

C

ob

3

V

, REVERSE VOLTAGE (VOLTS)

R

10

20 50752130

Figure 11. Capacitance

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5

100

70

MJD243 (NPN), MJD253 (PNP)

ORDERING INFORMATION

Device Package Type Package Shipping

MJD243G DPAK−3

(Pb−Free)

MJD243T4G DPAK−3

(Pb−Free)

MJD253−1G DPAK−3

(Pb−Free)

MJD253T4G DPAK−3

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

369C 75 Units / Rail

369C 2500 / Tape & Reel

369D 75 Units / Rail

369C 2500 / Tape & Reel

†

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6

L3

L4

b2

e

E

b3

4

12 3

A

B

D

b

0.005 (0.13) C

MJD243 (NPN), MJD253 (PNP)

PACKAGE DIMENSIONS

DPAK−3

CASE 369C−01

ISSUE D

C

A

c2

DETAIL A

c

M

H

GAUGE

L2

PLANE

L

L1

DETAIL A

ROTATED 90 CW5

A1

SOLDERING FOOTPRINT*

6.20

0.244

2.58

0.101

3.0

0.118

H

C

Z

SEATING PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE.

5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61

c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22 E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC

H 0.370 0.410 9.40 10.41

L 0.055 0.070 1.40 1.78 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

MILLIMETERSINCHES

5.80

0.228

1.6

0.063

SCALE 3:1

6.172

0.243

ǒ

inches

mm

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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7

MJD243 (NPN), MJD253 (PNP)

PACKAGE DIMENSIONS

DPAK−3 (SINGLE GAUGE)

CASE 369D−01

ISSUE B

V

S

−T−

SEATING PLANE

F

B

R

4

123

G

A

K

3 PL

D

0.13 (0.005) T

C

E

J

H

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

Z

A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14

0.090 BSC 2.29 BSC

G H 0.034 0.040 0.87 1.01

J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 Z 0.155 −−− 3.93 −−−

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

MILLIMETERSINCHES

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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For additional information, please contact your local Sales Representative

MJD243/D

8