
1
Motorola Bipolar Power Transistor Device Data
DPAK For Surface Mount Applications
Designed for general purpose power and switching such as output or driver stages
in applications such as switching regulators, converters, and power amplifiers.
• Lead Formed for Surface Mount Applications in Plastic Sleeves (No Suffix)
• Straight Lead Version in Plastic Sleeves (“1” Suffix)
• Lead Formed Version in 16 mm Tape and Reel (“T4” Suffix)
• Surface Mount Replacements for TIP110–TIP117 Series
• Monolithic Construction With Built–in Base–Emitter Shunt Resistors
• High DC Current Gain — hFE = 2500 (Typ) @ IC = 2.0 Adc
• Complementary Pairs Simplifies Designs
Collector–Emitter Voltage
Collector Current — Continuous
Peak
Total Power Dissipation @ TC = 25_C
Derate above 25_C
Total Power Dissipation* @ TA = 25_C
Derate above 25_C
Operating and Storage Junction
Temperature Range
Thermal Resistance, Junction to Case
Thermal Resistance, Junction to Ambient*
ELECTRICAL CHARACTERISTICS (T
C
= 25_C unless otherwise noted)
Collector–Emitter Sustaining Voltage (1)
(IC = 30 mAdc, IB = 0)
Collector Cutoff Current
(VCE = 50 Vdc, IB = 0)
Collector Cutoff Current
(VCB = 100 Vdc, IE = 0)
Emitter Cutoff Current
(VBE = 5 Vdc, IC = 0)
mAdc
*These ratings are applicable when surface mounted on the minimum pad sizes recommended.
(1) Pulse Test: Pulse Width v 300 µs, Duty Cycle v 2%. (continued)
Preferred devices are Motorola recommended choices for future use and best overall value.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MJD112/D
CASE 369A–13
SILICON
POWER TRANSISTORS
2 AMPERES
100 VOLTS
20 WATTS
*Motorola Preferred Device
CASE 369–07
MINIMUM PAD SIZES
RECOMMENDED FOR
SURFACE MOUNTED
APPLICATIONS
0.243
6.172
0.063
1.6
0.118
3.0
0.07
1.8
0.165
4.191
0.190
4.826
inches
mm
REV 1

2
Motorola Bipolar Power Transistor Device Data
*ELECTRICAL CHARACTERISTICS — continued (T
C
= 25_C unless otherwise noted)
OFF CHARACTERISTICS – continued
Collector–Cutoff Current
(VCE = 80 Vdc, V
BE(off)
= 1.5 Vdc)
(VCE = 80 Vdc, V
BE(off)
= 1.5 Vdc, TC = 125_C)
Collector–Cutoff Current (VCB = 80 Vdc, IE = 0)
Emitter–Cutoff Current (VBE = 5 Vdc, IC = 0)
DC Current Gain
(IC = 0.5 Adc, VCE = 3 Vdc)
(IC = 2 Adc, VCE = 3 Vdc)
(IC = 4 Adc, VCE = 3 Vdc)
Collector–Emitter Saturation Voltage
(IC = 2 Adc, IB = 8 mAdc)
(IC = 4 Adc, IB = 40 mAdc)
Base–Emitter Saturation Voltage (IC = 4 Adc, IB = 40 mAdc)
Base–Emitter On Voltage (IC = 2 Adc, VCE = 3 Vdc)
Current–Gain — Bandwidth Product
(IC = 0.75 Adc, VCE = 10 Vdc, f = 1 MHz)
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz) MJD117
MJD112
pF
*Pulse Test: Pulse Width v 300 µs, Duty Cycle v 2%.
0.04 0.2 40.1
0.06
0.6 1
4
IC, COLLECTOR CURRENT (AMP)
VCC = 30 V
IC/IB = 250
t, TIME ( s)
µ
2
1
0.8
0.6
0.4
0.2
t
s
t
f
Figure 1. Switching Times Test Circuit Figure 2. Switching Times
V
2
APPROX
+8 V
0
≈
8 k
SCOPE
V
CC
–30 V
R
C
51
FOR td AND tr, D1 IS DISCONNECTED
AND V2 = 0
FOR NPN TEST CIRCUIT REVERSE ALL POLARITIES.
25
µ
s
tr, tf
≤
10 ns
DUTY CYCLE = 1%
+ 4 V
t
r
td @ V
BE(off)
= 0 V
PNP
NPN
RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
D1, MUST BE FAST RECOVERY TYPE, e.g.:
1N5825 USED ABOVE IB
≈
100 mA
MSD6100 USED BELOW IB
≈
100 mA
V
1
APPROX
–12 V
TUT
R
B
D
1
≈
60
0.4 2
IB1 = I
B2
TJ = 25
°
C
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters can and do vary in different
applications. All operating parameters, including “T ypicals” must be validated for each customer application by customer’s technical experts. Motorola does
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Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

3
Motorola Bipolar Power Transistor Device Data
Figure 3. Thermal Response
t, TIME OR PULSE WIDTH (ms)
1
0.01
1000
0.3
0.2
0.07
r(t), EFFECTIVE TRANSIENT
R
θ
JC(t)
= r(t) R
θ
JC
R
θ
JC
= 6.25
°
C/W
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t
1
T
J(pk)
– TC = P
(pk)
θ
JC(t)
P
(pk)
t
1
t
2
DUTY CYCLE, D = t1/t
2
0.01
THERMAL RESISTANCE (NORMALIZED)
0.7
0.5
0.1
0.05
0.03
0.02
0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 20 30 50 100 200 300 500
0.2
SINGLE PULSE
D = 0.5
0.05
0.1
0.01
I
C
, COLLECTOR CURRENT (AMP)
Figure 4. Maximum Rated Forward Biased
Safe Operating Area
Figure 5. Power Derating
2
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
0.3
100
5
2
0.5
0.2
BONDING WIRE LIMITED
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
5 203
TJ = 150°C
CURVES APPLY BELOW RATED V
CEO
100µs
1 ms
dc
0.1
1
3
7
10
107 30
25
25
T, TEMPERATURE (
°
C)
0
50 75 100 125 150
20
15
10
5
P
D
, POWER DISSIPATION (WATTS)
2.5
0
2
1.5
1
0.5
TAT
C
TA
SURFACE
MOUNT
T
C
0.7
5 ms
50 70 200
500µs
ACTIVE–REGION SAFE–OPERATING AREA
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figures 5 and 6 is based on T
J(pk)
= 150_C; T
C
is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided T
J(pk)
< 150_C. T
J(pk)
may be calculated from the data in Figure 4.
At high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations
imposed by second breakdown.
C, CAPACITANCE (pF)
VR, REVERSE VOLTAGE (VOLTS)
C
ib
0.04
30
1 4 10 40
TC = 25°C
200
10
50
70
100
0.1 2 6 20
20
PNP
NPN
0.60.40.20.06
Figure 6. Capacitance
C
ob

4
Motorola Bipolar Power Transistor Device Data
V
CE
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
V
CE
, COLLECTOR–EMITTER VOLTAGE (VOLTS)
IC, COLLECTOR CURRENT (AMP)
NPN MJD112 PNP MJD117
Figure 7. DC Current Gain
Figure 8. Collector Saturation Region
Figure 9. “On Voltages
0.04
IC, COLLECTOR CURRENT (AMP)
300
0.06 0.2
2 k
800
4 k
h
FE
, DC CURRENT GAIN
VCE = 3 V
TJ = 125°C
3 k
0.1 0.6
25°C
–55°C
1 k
0.4 1
6 k
400
600
2 4 0.04
300
0.06 0.2
2 k
800
4 k
h
FE
, DC CURRENT GAIN
3 k
0.1 0.6
25°C
–55°C
1 k
0.4 1
6 k
400
600
2 4
3.4
IB, BASE CURRENT (mA)
2.6
2.2
1.8
1.4
0.6
0.1 0.2 0.5 102 5
IC =
0.5 A
1 A
1
3
1
0.04
IC, COLLECTOR CURRENT (AMP)
1.4
1
V, VOLTAGE (VOLTS)
2.2
1.8
0.6
0.2
TJ = 25°C
V
BE(sat)
@ IC/IB = 250
VBE @ VCE = 3 V
V
CE(sat)
@ IC/IB = 250
0.06 0.2 20.1 0.60.4 1 4 0.04
IC, COLLECTOR CURRENT (AMP)
1.4
1
V, VOLTAGE (VOLTS)
2.2
1.8
0.6
0.2
TJ = 25°C
V
BE(sat)
@ IC/IB = 250
V
CE(sat)
@ IC/IB = 250
0.06 0.2 20.1 0.60.4 1 4
20 50 100
3.4
IB, BASE CURRENT (mA)
2.6
2.2
1.8
1.4
0.6
0.1 0.2 0.5 102 51
3
1
20 50 100
VBE @ VCE = 3 V
TC = 125°C
VCE = 3 V
4 A
TJ = 125°C
2 A
TJ = 125°C
IC =
0.5 A
1 A 4 A2 A
TYPICAL ELECTRICAL CHARACTERISTICS

5
Motorola Bipolar Power Transistor Device Data
NPN MJD112 PNP MJD117
0.04
IC, COLLECTOR CURRENT (AMP)
0.06 0.2
0
*APPLIED FOR IC/IB < hFE/3
0.1 0.6
–55°C TO 25°C
0.4 1
–4.8
2 4
10
4
VBE, BASE–EMITTER VOLTAGE (VOLTS)
10
–1
0–0.4
, COLLECTOR CURRENT ( A)
µ
I
C
10
3
10
2
10
1
10
0
+0.2 +0.4 +0.6
TJ = 150°C
100°C
REVERSE FORWARD
25°C
VCE = 30 V
10
5
–0.6 – 0.2 +0.8 + 1 +1.2 +1.4
10
4
VBE, BASE–EMITTER VOLTAGE (VOLTS)
10
–1
0+0.4
, COLLECTOR CURRENT ( A)
µ
I
C
10
3
10
2
10
1
10
0
–0.2 –0.4 – 0.6
10
5
+0.6 + 0.2 –0.8 –1 –1.2 –1.4
+0.8
–4
–3.2
–2.4
–1.6
–0.8
θ
VC
FOR V
BE
25°C TO 150°C
25°C TO 150°C
*
θ
VC
FOR V
CE(sat)
0.04
IC, COLLECTOR CURRENT (AMP)
0.06 0.20.1 0.60.4 1 2 4
Figure 10. Temperature Coefficients
Figure 11. Collector Cut–Off Region
Figure 12. Darlington Schematic
BASE
EMITTER
COLLECTOR
≈
8 k≈ 120
PNP
BASE
EMITTER
COLLECTOR
≈
8 k≈ 120
NPN
0
–4.8
+0.8
–4
–3.2
–2.4
–1.6
–0.8
V
, TEMPERATURE COEFFICIENTS (mV/ C)
°θ
V
, TEMPERATURE COEFFICIENTS (mV/ C)
°θ
–55°C TO 25°C
*APPLIES FOR IC/IB < hFE/3
*
θ
VC
FOR V
CE(sat)
θ
VB
FOR V
BE
25°C TO 150°C
–55°C TO 25°C
25°C TO 150°C
–55°C TO 25°C
VCE = 30 V
REVERSE FORWARD
TJ = 150°C
100°C
25°C

6
Motorola Bipolar Power Transistor Device Data
PACKAGE DIMENSIONS
CASE 369A–13
ISSUE W
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
1 2 3
4
V
S
A
K
–T–
SEATING
PLANE
R
B
F
G
D
3 PL
M
0.13 (0.005) T
C
E
J
H
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.235 0.250 5.97 6.35
B 0.250 0.265 6.35 6.73
C 0.086 0.094 2.19 2.38
D 0.027 0.035 0.69 0.88
E 0.033 0.040 0.84 1.01
F 0.037 0.047 0.94 1.19
G
0.090 BSC 2.29 BSC
H 0.034 0.040 0.87 1.01
J 0.018 0.023 0.46 0.58
K 0.350 0.380 8.89 9.65
R 0.175 0.215 4.45 5.46
S 0.050 0.090 1.27 2.28
V 0.030 0.050 0.77 1.27
CASE 369–07
ISSUE K
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
D
A
K
B
R
V
S
F
L
G
2 PL
M
0.13 (0.005) T
E
C
U
J
H
–T–
SEATING
PLANE
Z
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.235 0.250 5.97 6.35
B 0.250 0.265 6.35 6.73
C 0.086 0.094 2.19 2.38
D 0.027 0.035 0.69 0.88
E 0.033 0.040 0.84 1.01
F 0.037 0.047 0.94 1.19
G 0.180 BSC 4.58 BSC
H 0.034 0.040 0.87 1.01
J 0.018 0.023 0.46 0.58
K 0.102 0.114 2.60 2.89
L 0.090 BSC 2.29 BSC
R 0.175 0.215 4.45 5.46
S 0.020 0.050 0.51 1.27
U 0.020 ––– 0.51 –––
V 0.030 0.050 0.77 1.27
Z 0.138 ––– 3.51 –––
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
1 2 3
4
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