
1
Motorola Bipolar Power Transistor Device Data
. . . designed for medium to high voltage inverters, converters, regulators and
switching circuits.
• High Collector–Emitter Voltage —
V
CEO
= 200 Volts
• DC Current Gain Specified @ 1.0 and 2.5 Adc
• Low Collector–Emitter Saturation Voltage —
V
CE(sat)
= 0.8 Vdc @ IC = 1.0 Adc
Collector–Emitter Voltage
Collector Current — Continuous
— Peak
Total Device Dissipation @ TC = 75_C
Derate above 75_C
Operating Junction Temperature Range
Storage Temperature Range
Thermal Resistance, Junction to Case
ELECTRICAL CHARACTERISTICS (T
C
= 25_C unless otherwise noted)
Collector–Emitter Sustaining Voltage
(IC = 100 mAdc, IB = 0)
Collector Cutoff Current
(VCE = 200 Vdc, IB = 0)
Collector Cutoff Current
(VCB = 200 Vdc, V
EB(off)
= 1.5 Vdc,
T
C
= 125_C)
Emitter Cutoff Current (VBE = 5.0 Vdc, IC = 0)
DC Current Gain
(IC = 1.0 Adc, VCE = 5.0 Vdc)
(IC = 2.5 Adc, VCE = 5.0 Vdc)
Collector–Emitter Saturation Voltage
(IC = 1.0 Adc, IB = 0.1 Adc)
Base–Emitter Saturation Voltage
(IC = 1.0 Adc, IB = 0.1 Adc)
Current–Gain — Bandwidth Product
(IC = 200 mAdc, VCE = 10 Vdc, f = 1.0 MHz)
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MJ410/D
5 AMPERE
POWER TRANSISTOR
NPN SILICON
200 VOLTS
100 WATTS
CASE 1–07
TO–204AA
(TO–3)

MJ410
2
Motorola Bipolar Power Transistor Device Data
I
C
, COLLECTOR CURRENT (AMP)
5.0
5.0
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
50 200
1.0
0.1
0.02
100
Figure 1. Active Region Safe Operating Area
10
0.5
0.2
0.05
0.01
2.0
10 20 500
TJ = 150°C
500 µs
1.0 ms
dc
SECONDARY BREAKDOWN LIMITED
BONDING WIRE LIMITED
THERMAL LIMITATION AT TC = 75
°
C
CURVES APPLY BELOW RATED V
CEO
5.0 ms
There are two limitations on the power handling ability of a
transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation;
i.e., the t ransistor must not be subjected to greater dissipation then the curves indicate.
The data of Figure 5 is based on T
J(pk)
= 150
_
C; TC is
variable depending on conditions. Pulse curves are valid for
duty cycles of 10% provided T
J(pk)
v 150_C. At high case
temperatures, thermal limitations will reduce the power that
can be handled to values than the limitations imposed by
second breakdown.
h
FE
, DC CURRENT GAIN
2.0
0.05
IC, COLLECTOR CURRENT (AMP)
1.0
1.6
0
1.2
0.8
0.4
TJ = 150°C
100
IC, COLLECTOR CURRENT (AMP)
1.0
70
10
30
7.0
5.0
Figure 2. DC Current Gain
Figure 3. ‘‘On” Voltages
Figure 4. Sustaining Voltage Test Load Line
0.1 0.2 0.3 0.5 2.0 3.0 5.0
V
CE(sat)
@ IC/IB = 10
V
BE(sat)
@ IC/IB = 10
VCE = 5.0 Vdc
TJ = 150°C
25°C
–55°C
TJ = 25°C
V
CE(sat)
@ IC/IB = 5
0.05 0.1 0.2 0.3 0.5 2.0 3.0 5.0
V, VOLTAGE (VOLTS)
0 500
V
CEO(sus)
IS ACCEPTABLE WHEN
VCE
≥
RATED V
CEO
AT IC = 100 mA
400
200
100
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 5. Sustaining Voltage Test Circuit
500
300
0
400300200100
200
Ω
+
–
+
–
6.0 V 50 V
TO SCOPE
X
Y
1.0
Ω
300
Ω
Hg RELAY
50 mH
50
20
, COLLECTOR CURRENT (mA)
C
I

MJ410
3
Motorola Bipolar Power Transistor Device Data
PACKAGE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO–204AA OUTLINE SHALL APPLY.
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 1.550 REF 39.37 REF
B ––– 1.050 ––– 26.67
C 0.250 0.335 6.35 8.51
D 0.038 0.043 0.97 1.09
E 0.055 0.070 1.40 1.77
G 0.430 BSC 10.92 BSC
H 0.215 BSC 5.46 BSC
K 0.440 0.480 11.18 12.19
L 0.665 BSC 16.89 BSC
N ––– 0.830 ––– 21.08
Q 0.151 0.165 3.84 4.19
U 1.187 BSC 30.15 BSC
V 0.131 0.188 3.33 4.77
A
N
E
C
K
–T–
SEATING
PLANE
2 PLD
M
Q
M
0.13 (0.005) Y
M
T
M
Y
M
0.13 (0.005) T
–Q–
–Y–
2
1
U
L
G
B
V
H
CASE 1–07
TO–204AA (TO–3)
ISSUE Z

MJ410
4
Motorola Bipolar Power Transistor Device Data
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MJ410/D
*MJ410/D*
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