Datasheet MH88625 Datasheet (MITEL)



MH88625

DID/OPS SLIC

Preliminary Inf ormat ion

Features

• Programm able gain, ne twork bal anc e and
impedance

• Transforme rless 2-4 wire conve rsion

• Constant cu rren t with co nstan t volta ge fall back
for long loop capability

• Pin compa tible wit h MH8 8632 a nd MH8 86 28

• Unbalan ce detection (Tip, Ring ground sens in g)

• Auto ring trip

• On-Hook tran smissi on (A NI) cap ability

• Compatible with require men ts of CCI TT,
DOC/FCC and CSA /UL

• Excellent power dissipation (SIL vertical
mountin g)

• 12/16kHz meter pulse injection control

• Solid State TIP/RING reversals

Applications

• On/Off Premise PBX Line Cards

• DID (Direct Inward Dial) L ine Car ds

• Central Offic e Line C ard s

ISSUE 6 April 1995

Ordering Information

MH88625 40 Pin SIL Pa ckag e

0°C to 70°C

Descript io n

The Mitel MH88625 SLIC provides all of the
functions required to interface 2-wire off premise
subscriber loops to a serial TDM, PCM, switching
network of a modern PBX. The MH88625 is
manufactured using thick-film hybrid technology
which offers high voltage capability, reliability and
high density resulting in significant printed circuit
board area savings. A complete line card can be
implemented with very few external components.

RING

RF1
RF2

TIP

TF1

TF2

UD

RNGC
RGND

VRLY

LGND

VBat

Matched

Feed

Resistors

Unbalance

Detection

Ring
Relay
Driver

RRD

REVC Z900 Z600 Z1 Z2 GRX1 GRX0 RX GTX1 GTX0 TX

Tip/Ring

Reversal

Driver

Circuitry

And

Speech

Circuit

External

Signal

Input

ESI ESE

LCA

Loop

Current

Set

Impedance

Network

VDD

VEE

Switch-hook

Threshold Set

Switch-hook

Detect

2-4 Wire

Conversion

Gain Adjust

FIgure 1 - Functio nal Blo ck Diag ram

AGND

Ring

Filter

SHK

NS

N1

N2
NATT

2-183

MH88625 Preliminary Information

TIP

RING

TF1

TF2
RF1
RF2

LGND

LCA

VBat

IC

RGND

VRLY

RRD

RNGC

REVC

ESI

ESE

AGND

NATT

N1

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

N2

Z900

Z1
Z2

TX

RX
GTX0
GTX1

GRX0
GRX1

IC

Z600

NS

SHK

UD

IC
IC
IC

VEE

VDD

Figure 2 - Pin Connections

Pin Description

Pin # Name Description

1TIPTip Lead. Connects to the “Tip” lead of subscriber line.

21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

2RINGRing Lead. Connects to the “Ring” lead of the subscriber line.
3TF1Tip Feed 1. Access point for balanced ringing. Norma lly connects to TF2.
4TF2Tip Feed 2. Access point for balanced ringing. Norma lly connects to TF1.
5RF1Ring Feed 1. Access point for balanced ringing. Normally connects to RF2 .
6RF2Ring Feed 2. Access point for balanced ringing. Normally connects to RF1 .
7LGNDBattery Ground. V

return path. Connected to system’s energy dumping ground.

Bat

8LCACurrent Limit Set (Inp ut). The current limit is set by connecting an external resisto r to

ground. For 30mA default cu rren t, this pin is tied to GND

9V

Battery Voltage. Typically -48Vdc is applied to this pin.

Bat

10 IC Internal Connection. This pin is internally connected and must be lef t open.
11 RGND Relay Driver Ground Connection.
12 VRLY Relay Supply Voltage Connection.

13 RRD
14 RNGC

Ring Relay Drive (Outpu t). Connects t o ring relay coil.
Ring Relay control (Inp ut). A logic low enable s the Ring Relay Drive (RRD) out put wh ich

activates the Ring Relay. The internal auto ring trip circuitry de-activates the relay drive

output upon detection of switch-hook.
15 REVC Reversal Control (Input). A logic high reverse the internal Tip and Ring connections.
16 ESI External Signal Input. 12/16kHz me ter pulse inpu t.
17 ESE External Signal Enable. 12/16kHz meter pulse enable .
18 AGND Analog Ground. V

2-184

and VEE return path.

DD

Preliminary Information MH88625

Pin Description (Continued)

Pin # Name Description

19 NATT Network Balance AT+T Node. Connects to N1 for a network balance impedance of AT&T

compromise (350Ω + 1kΩ // 210nF); the device’s input impedance must be set to 600Ω. This
node is active only when NS is at logic high. This node should be left open circuit when not
used.

20 N1 Network Balance Node 1 (Inp ut). 0.1 times the im peda nce betwee n pins N1 and N2 must

match the device’s input impedance, while 0.1 t ime s the impedance bet ween pins N1 and
AGND is the device’s network balance impedance. This node is active only when NS is at

logic high. This node may be terminated when not used (i.e., NS at logic low).
21 N2 Network Balance Node 2 (Outpu t). See N1 for description.
22 Z900 Line Impedance 900Ω Node. Connects to Z1 for a line impedance of 900Ω. This node

should be left open circuit when not used.
23 Z1 Line Im ped ance Node 1 (Input). 0.1 times the times the im pedance between pin s Z1 and

Z2 is the device’s line impedance. This node must always be connected.
24 Z2 Line Impedance Node 2 (Output). 0.1 times the times the impedance between pins Z1 and

Z2 is the device’s line impedance. This node should be left open circuit when not used.
25 TX Transmit (Output). 4-Wire (AGND) referenced audio output .
26 RX Receive (Inpu t). 4-Wire (AGND) referenced audi o input.
27 GTX0 Transmit Gain Node 0. Connects to GTX1 for 0dB transmit gain.
28 GTX1 Transmit Gain Node 1. Connects to a resistor to AGND for transmit gain adjustm ent.
29 G RX 0 Receive Gain Node 0. Connects to GRX1 for 0dB gain.
30 G RX 1 Receive Gain Node 1. Connects to a resistor to AGND to receive gain adjustment.
31 IC Internal Connection . This pin is internally connected and must be left open.
32 Z600 Line Impedanc e 600

Ω Node (Output). Connects to Z1 for a line impedance of 600Ω. This

pin should be left open circuit when not used.
33 NS Network Balance Settin g (Input). The logic level at NS selects the network balance

impedance. A logic 0 enables an internal balance equival ent to the input impedance (Zin).

While a logic 1 enables an external balance 0.1 tim es the impedance bet ween pins N1 and

AGND balanced to 0.1 times the im pedance between pins N1 and N2. Th e impe dance

between N1 and N2 must be equivalent to 10 times the input impedance (Zin).
34 SHK

Off-Hook Indication (Output). A logic low output indicate s when the subscriber equipment

has gone Off-Hook.
35 UD

Unbalance Detect (Output). A log IC low output indicat es when the DC current flow in the

Tip and Ring leads is unbalanced, indicating that the subscriber equipment has grounded

the Ring lead.

36,37,38

39 V
40 V

IC Internal Connection. These pins are internally connected and m ust be left open

Negative Supply Voltage. -5V dc.

EE

Positive Supply Voltage. +5V dc.

DD

2-185

MH88625 Preliminary Information

Absolute Maximum Ratings*

Parameter Sym Min Max Units Comments

1 Supply Voltage V

V

-V

2 Storage Temperature T

* Exceeding these values ma y cause perm anen t dama ge. Functi onal operati on und er these cond ition s is not implied.

Bat
DD

EE

S

+0.3

-0.3

+0.3

65

6
6

-40 +125 °C

V

With respect LG ND
V
V

Recommended Operating Conditions

Parameter Sym Min Typ* Max Units Comments

1 Supply Voltage V

2 Operating Temperature T

* Typical figures are at 25

° C with nominal + 5V supplies for design aid only.

Bat

V

DD

V

EE

OP

-44

4.75

-4.75

-48

+5.0

-5.0

-60

5.25

-5.25

20 0 70 °C

V
V
V

DC Electrical Characteristics

Characteristi cs Sym Min Typ* Max Units Test Conditions

1 Operating Loop Current

Var in loop current from nominal

2 Operating Currents I

3 Power Dissipation PD

4SHK

UD

5ESENSLow Level Input Voltage

6ESENSHigh Level Input Current

‡ DC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
* Typical figures are at 25°C with nominal

Low Level Output Voltage
High Level Output Voltage

High Level Input Voltage

Low Level Input Current

‡

I

Loop

I

Loop

I

Loop

I

Loop

Bat

I

Bat

I

DD

I

EE

PD

V
V

V
V

I

I

OL
OH

IL

IH

IH

IL

16

0
1

3.7

2.4

+5V supplies and are for design aid only.

30

4

+

32

2

25
25

2

300

45 mA

mA
mA

mA
mA

mA
mA

mA

W

mW

0.5 V

0.8 V

20
20

µA
µA

R
2300Ω V

R
GND

R
LCA=GND
R
Hook)
On-Hook or Off-Hook
On-Hook or Off-Hook

Active
Standby/Idle

I

V

I

V

VIH=5.0V
V

=0Ω

Loop

Bat

=0Ω, LCA -

Loop

=0 (Off-Hook),

Loop

= open (On-

Loop

= 400µ A

OL

= 40µA

OH

=0.0V

IL

=-48V

2-186

Preliminary Information MH88625

AC Electrical Characteristics

‡

Characteristics Sym Min Typ* Max Units Test Conditions

1 TX Gain 0 dB ext ernal l y adju st able
2 RX Gain 0 dB externally adjustable
3 Ringing Capability 5 REN
4 On-Hook Transmission

V

Signal Input Level

2.0 V

Gain 6

5 External Signal Output Level 1.75 2.25 V

rms

dB

rms

=-48V

Bat

T-R load = 10kΩ min.
V

= -48V, T-R load=

Bat

200Ω LCA=0V, Zo-600Ω,
Gain=0 dB

6SHK

Rise Time

Fall time

7 2-Wire Termination

Impedance

t

R

t

F

1
1

600/

900

ms
ms

Ω

Dial Pulse De te c ti on

Selectable
8 Off-Hook Detect Threshold 10 mA
9 2-Wire Return Loss 20

20
20

dB
dB
dB

300 to 500Hz

500 to 2500Hz

2500 to 3400Hz

10 Longitudi nal B alance

Longitundinal to Metallic

Metallic to Longit udinal

11 Longitudinal Current

58
53

dB
dB

40 mA 20mA per lead

200-1000Hz

3400Hz

Capability

12 Idle channel Noise

Rx to T-R

T-R to Tx

N

CR

N

CX

8

12 dBrnC

dBrnC
13 Transhybrid Loss THL 22 40 dB 200-3400Hz
14 Unbalanced Detect Threshold I

UB

10 mA

15 Analog Signal Overload Level

at Tip and Ring 4 dBm

T-R=600Ω, VBat=-4 8V

16 Ringing Signal Voltage 90 Vrms

17 Ringing Frequency 17 33 Hz
18 Ring Trip Delay 100 ms
19 Absolute Gain, Variation +
20 Relative Gai n, refere nce to

0.1 dB 0dB at T-R, 1kHz

+

0.05 dB 300-3400Hz

1kHz

21 Power supply Rejection Ratio

V
V

V

‡ AC Electrical Characteristics are over recommended operating conditions unless otherwise stated.
* Typical figure are at 25°C with nominal +
Notes: Impedance set by external network of 600Ω or 90 0Ω default.
External network for test purposes consists of 2200Ω + 820 0Ω // 11.5nF be twe en pins Z1 and Z2, the equivalent Z
the impedance and is equivalent o 220Ω+820Ω // 115nF.
Test condition uses a Z
Test cond ition s use a transmit and receive gain set to 0dB default and a Z
“Ref” indicates reference impedance which is equivalent to the termination impedance.
“Net” indicates ne two rk bala nce impe dance.
Refer to Table 1, 2 for TX, RX gain adjust ment .

value of 600Ω, 900Ω and the above external network.

in

PSRR

Bat
DD

EE

5V supplies and are for desig n aid only.

24
24
24

value of 600Ω unless otherwise stated.

in

dB 1kHz, 100mVpp

has 1/10

in

th

2-187

MH88625 Preliminary Info rm atio n

Functional Desc ription

The SLIC uses a transformerless electronic 2-wire to
4-wire conversion which can be connected to a
Codec to interface the 2 wire subscriber loops to a
time division multiplexed (TDM) pulse code
modulated (PCM) digital switching network. For
analog applications, the Tx and Rx of the 2-4 wire
converter can be connected directly to an analog
crosspoint switch such as the MT8816. Powering of
the line is provided through precision battery feed
resistors. The MH88625 also contains control,
signalling and status circuitry which combines to
provide a complete functional solution which
simplifies the manufacture of line cards. This
circuitry is illustrated in the functional block diagram
in Fig. 1. The MH88625 is designed to be pin
compatible with Mitel’s MH88632 and MH88628.
This allows a common PCB design with common
gain, input impedance and network balance.

Approvals

FCC part 68, CCITT, DOC CS-03, UL 1459,
CAN/CSA 22.2 No.225-M90 and ANSI/EIA/TIA-464­A are system level safety standards and
performance requirements. As a component of a
system, the MH88625 is designed to comply with the
applicable requirements of these specifications.

Loop Current Setting

The MH88625 SLIC provides a constant current with
constant voltage fallback. This design feature
provides for long loop capability regardless of the
constant c u rren t se ttin g . Refer to Gra ph 1 .

The LCA (Loop Current Adjust) pin is an input to an
internal resistor divider network which generates a
bias voltage. The loop current is proportional to this
voltage. The loop current can be set between 20 and
45mA by various connections to the LCA pin as
illustrated in graph 2 and Figure 8. The loop current
during a fault condition will be limited to a safe level.
Primary over-current protection is inherent in the
current limiting feature of the 200Ω battery feed
resistors. Refer to Graph 1.

Receive and Transmit Audio Path

The audio signal of the 2-wire side is sensed
differentially across the external 200 Ω feed res istors
and is passed on to a second differential amplifier
stage in the 2W/4W conversion block. This block
sets the transmit gain on the 4-wire side and cancels
signals originating from the receive input before
outputting the signal.

Programmable Transmit and Receive
Gain

Battery Feed

The loop current for the subscriber equipment is
sourced through a pair of matched 200Ω resistors
connected to the Tip and Ring. The two wire loop is
biased such that the Ring lead is 2V above V
(typically -46V) and the Tip lead is 2V below LPGD
(typically -2V) during constant voltage, constant
current mode.

The SLIC is designed for a nominal battery volt age
of -48Vdc and can provide the maximum loop current
of 45mA under the condition.

The MH88625 is designed to operate down to a
minimum of 16mA dc, with a battery voltage of -44V.
The Tip and Ring output drivers can operate within
2V of V
loop range of 2300Ω.

and LGND rails. This permits a maximum

Bat

Bat

Transmit Gain (Tip-Ring to Tx) and Receive Gain (Rx
to Tip-Ring) are programmed by connecting external
resistors (RRX and RRT) from GRXI to AGND and
from GTX1 to AGND as indicated in Figure 3 and
Tables 1 and 2. The programmable gain range is
from -12dB to +6dB; this wide range will
accommodate any loss plan. Alternatively, the
default Receive Gain of 0dB and Transmit Gain of
0dB can be obtained by connecting GRX0 to GRX1
and GTX0 to GTX1. In addition, a Receive gain of
+6dB and Transmit Gain of +6dB can be obtained by
not connecting resistors RRX and RTX. For correct
gain programming, the MH88625’s Tip-Ring
impedance (Z
impedance.

For optimum performance, resistor RRX should be
physically located as close as possible to the GRX1
input pin, and resistor RTX should be physically
located as close as possible to the GTX1 input pin.

) must match the line termination

in

2-188

Preliminary Information MH88625

70
60

Constant

Voltage

Region

2kΩ

R

Loop

(Ω)

I

Loop

(mA)

50
40

30

20

10

0

Constant

Current Reg ion

1kΩ

Graph 1 - I

Loop/RLoop

Two w ire Port Termination Impedance

The AC termination impedance of 600 or 900Ω, of the
2W port, is set using active feedback paths to give
the desired relationship between the line voltage and
the line current. The loop current is sensed
differentially across the two feed resistors and
converted to a single ended signal. This signal is fed
back to the Tip/Ring driver circuitry such that
impedance in the feedback path gets reflected to the
two wire port. The MH88625’s Tip-Ring impedance

) can be set to 600Ω, 900Ω or to a use r se lec ta b le

(Z

in

value. Thus, Z

can be set to any international

in

requirement. The connection to Z1 determines the
input impedance. With Z1 connected to Z600, the line
impedance is set to 600Ω. With Z1 connected to
Z900, the line impedance is set to 900Ω. A user
defined impedance can be selected which is 0.1
times the impedance between Z1 and Z2. For
example, with 2200Ω in series with 11.5nF in parallel
with 8200Ω, all between Z1 and Z2, the devices line
impedance will be 220Ω in series with 115nF in
parallel with 820Ω. See Table 3 and Figures 4 & 5.

Networ k Balan ce

Transhybrid loss is maximized when the line
termination impedance and SLIC network balance
are matched. The MH88625’s network balance
impedance set can be set to Z
//210nF) or to a user selectable value. Thus, the
network balance impedance can be set to any
international requirement, A logic level control input
NS selects the balance mode. With NS at logic low,
an internal network bala nce impedance is matched to
the line impedance (Z

). With NS at logic high, a user

in

defined network balance impedance is selected
which is 0.1 times the impedance between N1 and

, AT&T (350Ω + 1kΩ

in

Characteristics

AGND. For example, with 2200Ω in series with

11.5nF in parallel with 8200Ω, all between N1 and
AGND, and NS at logic high, the devices network
balance impedance is 220Ω in series with 115nF in
parallel with 820Ω; the impedance between N1 and
N2 must be equivalent to 10 times the input
impedance (Z

). In addition, with NS at logic high, an

in

AT&T network balance impedance can be selected
by connecting NATT to N1; in this case, no additional
network is required between N1 and N2. See Table 4
and Figure 6.

12/16kHz Me ter Pu lse

The MH88625 provides control of an external signal
path to the driver. A 12/16kHz continuous signal can
be applied to the ESI pin. Control of the ESE input
allows the metering signal to be transmitted to the
line.

Unbalanced Det ection

The Unbalanced Detect (UD) pin goes low when the
DC curren t through the two ba ttery feed resisto rs is
unbalanced i.e., when the average DC current into
the Ring lead exceeds the current flow out of the Tip
lead (indicating that the Ring lead has been
grounded).

When the SLIC is interfaced to ground start
subscriber equipment during the idle state, the UD
output is monitored for indication of the subscribers
Ring Ground signal. The maximum loop current
supplied by the feed circuitry under this condition is
limited.

2-189

MH88625 Preliminary Information

Longitudinal Balance

The longitudinal balance specifies the degree of
common mode rejection in the 2 to 4 wire direction.
Precision laser trimming of internal resistors in the
hybrid ensures good overall longitudinal balance.

The interface circuitry can operate in the presence of
induced longitudinal currents of up to 40mA at 60Hz.

Off-Hook and Dial Pulse Detect ion

The SHK pin goes low when the DC-loop current
exceeds a specified level. The threshold level is
internally set by the bias voltage of the switch-hook
detect c ircu itry.

MH88625

Z

Z

10kΩ

-

+

GTX1

GTX0

10kΩ

Dial pulse can be detected by monitoring the
interruption rate at the SHK

pin. These dial pulses

would be debounced by the system’s software.

Ring Trip Detection

The interface permits detection of an Off-Hook
condition during the ringing. If the subscriber set
goes Off-Hook when the ringing signal has been
applied, the DC loop current flow will be detected
within approximately 100msecs and the SHK
will go low. The ring relay is automatically disabled
by the internal hardware.

TX

25

28

27

RTX

TRANSMIT GAIN

(Tip-Ring to Tx)

AV 20 0.5

RTX

Example:

log–=

---------------------------------

=

10

RTX = 38kΩ; AV = +4dB

:

5kΩ



-----------

+



RTX

5kΩ

AV–



---------- -



20

0.5–

output

Z

Z

­26

10kΩ

+

10kΩ

RX

GRX1

GRX0

30

29

RRX

RECEIVE GAIN

(RX to Tip-Ring)

AV 20 0.5

=

RTX

Example:

RRX = 4.6kΩ; AV = -4dB

Figure 3 - Gain Program m ing with E xternal Com pon ents

:

5k Ω



-----------

log–=

---------------------------------




10

+



RRX

5kΩ

AV–

---------- ­20

0.5–

2-190

Preliminary Information MH88625

MH88625

24

Z2

23

Z1

22

Z900

32

Z600

Inpu t impedance (Z

Note: Make connection between Z1 and other points as short as possible

) set to 600Ω

in

NC

NC

Figure 4 - Input Impe dan ce (Zin) Settings with Zin equal to 600 or 900Ω

MH88625

24

Z2

MH88625

Input Impedance (Z

24

Z2

23

Z1

22

Z900

32

Z600

) set to 900Ω

in

NC

NC

RP

10 x Z

23

Z1

22

Z900

32

Z600

Notes:

1) Th e 10xZin network must be set to 10 x the desired input impedance (Zin).

2) The network balance must be set to the desired net work balan ce. See
section on network balance.

3) Make connection between Z1 and component as short as possible.

Figure 5 - Input Impe dan ce (Z

) Settings with Zin not equal to 600 to 900Ω

in

in

Example:
If RS = 2200Ω
The n the input impeda nce (Z
series with 820Ω in para lle l with 115nF.

Z2

Z1

= 0.1 x

Z

in

RP = 8200Ω, CP= 11.5nf

,

CP

RS

(RS + 1)

1/RP + S x CP

where S = j x w
and w = 2 x Π x f

) is 220Ω in

in

2-191

MH88625 Preliminary Information

MH88625

Network balance is set to the input
Impedance (Zin)

Note: Make connection betwee n Z1 and other points as short as possible.

N2

N1

NATT

NS

21

20

19

33

Figure 6 - Network Balance S ettin g with NET BAL eq ual to Zin or AT&T

NS

N2

N1

21

20

19

33

VDD

MH88625

NATT

Network balance is set to the AT&T compromise
network (350Ω + 1000Ω // 210nF) impedance.
The input impedance must be set to 600W.

MH88625

21

N2

20

N1

19

NATT

NS

33

VDD

Notes:

1) The 10xZin network must be set to 10 x the desired input impedance (Zin).

2) The network balance must be set to the desired network balance. See
section on network balance.

3) Make connection between Z1 and component as short as possible.

Figure 7 - Network Balan ce Setti ng with NET BA L not

10 x Z

10 x

NETBAL

RP

in

N2

N1

ZNetbal = 0.1 x

Example:
If RS = 2200Ω
Then the input impedance (Z
series with 820Ω in parallel with 115nF.

CP

RS

where S = j x w
and w = 2 x Π x f

RP = 8200Ω, CP= 11.5nf

,

equal to ZNetbal or AT&T

(RS + 1)

1/RP + S x CP

) is 220Ω in

in

2-192

Preliminary Information MH88625

Tables 1 & 2: Transmit and Receive Gain Programming

Transmit

Gain (dB)

+6.0 No Resistor
+4.0 38.3k Results in 0dB overall gain when used with Mitel A-law codec (i.e.

+3.7 32.4k Results in 0dB overall gain when used with Mitel µ-law codec (i.e.

0.0 GTX0 to GTX1

-3.0 5.49k

-6.0 3.32k

-12.0 1.43k

RTX Resistor

Value (Ω)

Notes

MT8965)

MT8964)

Receive Gain

(dB)

RRX Resistor

Value (Ω)

Notes

+6.0 No Resistor

0.0 GRX0 to GRX1

-3.0 5.49k

-3.7 4.87k Results in 0dB overall gain when used with Mitel A-law codec (i.e.
MT8965)

-4.0 4.64k Results in 0dB overall gain when used with Mite l µ-law codec (i.e.
MT8964)

-6.0 3.32k

-12.0 1.43k

Note 1: See Figures 3 and 4 for additional details.
Note 2: Overall gain refers to the receive path of PCM to 2-wire, an d transmi t pat h of 2-wire to PCM.

Table 3: Input Impedance Settings

Z2 Z1 Z600 Z900 Resultin g inpu t imped anc e (Z

NA Connect Z1 to Z600 NA 600Ω
NA Connect Z1 to

Z900

NA Connect Z1 to

Z900

900Ω

Connect network from Z1 to Z2 NA NA 0.1 x impedance between Z1 & Z2

Note 1: NA indicates high impedance (10kΩ) connection to this pin does not effect the resulting network balance.
Note 2: See Figure 4 & 5 for Applications Circui t s.

)

in

Table 4: Network Balance Settings.

NS (Input) N2 N1 NATT Resultin g inpu t imped anc e (Z

Low NA NA NA Equivalent to Z

High NA

Connect N1 to NATT

AT&T compromise (350Ω + 1kΩ //
210nF)

in

Zin must be 600Ω

High Connect network from N1 to

AGND equivalent to 10 x

NA

0.1 x impedance between N1 & N2
NETBAL. Connect network
from N1 to N2 equivalent to 10
x Z

.

in

Note 1: NA indicates high impedance (10kΩ) connection to this pin does not effect the resulting network balance.
Note 2:Low indicates Logic Low.
Note 3: See Figures 6 and 7 for Application Circuit.

)

in

2-193

MH88625 Preliminary Information

+5V

MH88625

R

LCA

8a

MH88625

LCA

8b

Figure 8 - Loop Current Setting (See Graph 2)

DTMF

DTMF tones may be transmitted and received at the
4-wire p o rt.

DID Operation

For DID operation, the Tip and Ring reversal is
controlled by the REVC pin. A logic level one causes
Tip and Ring to be reversed. This can be controlled
by a Mitel Codec (MT896X) system drive output
(refer to Figure 9b).

MH88625MH88625

LCA LCA

R

-5V

8c

subscribers set decodes the FSK signal and displays
the calling party’s number.

8d

Loop Length

The MH88625 can accommodate loop length of up to
2300Ω minimum (including the subscriber
equipment). This corresponds to approximately 8km
using 26AWG twisted pair or 15km using 24AWG
twisted pair.

OPS Operation

High Voltage capability

Inherent in the thick-film process is the ability of the
substrate to handle high voltage. The standard Mitel
thick-film process provides dielectric strengths of
greater than 1000VAC or 1500VDC. The thick-film
process allows easy integration of surface mount
components such as the high voltage bi-polar power
transistor line drivers. This allows for simplier, less
elaborate and less expensive protection circuitry
required to handle high voltage transients and fault
conditions caused by lightning, induced voltages and
power line crossings.

On-Hook Transmission

The MH88625 provides for on-hook transmission
which supports features such as Automatic Numbers
Identification (ANI). The ANI information is a FSK
signal originating from and sent by the C.O. during
the off period of the ringing voltage being sent to the

2-194

As shown in the application diagram, Figure 9a, the
ringing voltage, typically 90Vrms 20Hz biased at
V

, is applied to the subscriber line through an

Bat

external relay K1. Enabling of the relay is performed
by applying a logic low level to the relay driver
control input, RGNDC. Figure 9c, shows how
balanced ringing can be accommodated if required.

Central Office Operation

The MH88625 can be configured for ground start
C.O. applications with the addition of Q1, D1 and K2,
as shown in Figure 9c. Ground start requires control
of the Tip lead to remove battery ground from
subscriber loop. For loop start applications, control
of the Tip lead is not required.

C.O’s perform Tip/Ring reversals to indicate that a
toll call has been dialled. The Tip/Ring reversal can
indicate a toll diversion signal.

Preliminary Information MH88625

-V

Bat

SYSTEM

GROUND

+5V

-5V

V

DD

V

EE

AGND

TF1

TF2

TIP

LGND

V

Bat

MH88625

RX

GRX0

GRX1

LCA

TX

GTXO

GTX1

SHK

UD

Z1

Z600

RNGC

REVC

VR

VX

CODEC

LINE

CONTROLLER

LOGIC

+5V

RING

K1

RF1

RF2

90VRMS 20Hz

~

-VBat

Figure 9a - OPS SLIC Confi gu ratio n Appli cati on s Circu it - Normal Ring in g

Graph 2 - Loop Current Setting

65mA

50

/mA

40

Loop

I

To -5V

VRLY

RRD

NS RGND

(Ω/10)

K1

O/C LCA

35.3mA

LCA

= 0V

28.48m

30

20

10K

100K

To +5V

(Ω/10 + 10mA)

1M

R(LCA) Ω

2-195

MH88625 Preliminary Information

-V

Bat

SYSTEM

GROUND

+5V

-5V

V

DD

V

EE

AGND

TF1

TF2

TIP

LGND

V

Bat

MH88625

RX

GRX0

GRX1

LCA

TX

GTX0

GTX1

SHK

UD

Z1

Z600

RNGC
REVC

VR

VX

+5V

LOGIC

LOGIC

LOGIC

LINE

CONTROLLER

LOGIC

VRLY

RING

RF1

RF2

NS

RRD

RGND

Figure 9b - DID SLIC Configuration Applications Circuit

2-196

Preliminary Information MH88625

-V

Bat

SYSTEM
GROUND

+5V

-5V

K1A

K2

V

DD

V

EE

AGND

TF2

TF1

TIP

LGND

V

Bat

MH8862 5

RX

GRX0
GRX1

LCA
TX

GTX0

GTX1

SHK

UD

Z1

Z600

RNGC
REVC

VR

VX

CODEC

LINE

CONTROLLER

LOGIC

+5V

D1

K2

+5V

45VRMS

20Hz

~

VRLY

-V

~

Bat

RING

K1B

45VRMS

20H z

RF1

RF2

RRD
RGND

ESE
ES1

12/16kHz

METERING

SOURCE

NS

Figure 9c - LS/GS C.O. SLIC App licati on s Circuit - Balan ced Ri ngin g

Q1

K1

2-197

MH88625 Preliminary Information

F1T

R1

PRO1

LINE

R

SUGGESTED COMPONENTS:

F1, F2 1A, 250VAC, SLO-BLOW LITTLEFUSE 230 2AG
R1, R2, 10Ω, 1000V, 1/2W RESISTOR (FLA ME RATED)

PRO1 SOLID STATE TRANSIENT SUPPRESSOR, EG TISP2300L, P2703AB
F1, R1 AND F2, R2 MAY BE FUSIBLE RESISTORS OR PTCS

F2

R2

Figure 9d - Suggested Protecti on Circui t

T

R

MH88625

Side View

0.002

0.010 +
(0.25 +

Notes:

1) Not to scale

2) Dimensions in inches).

3) (Dimensions in millimetres).
*Dim ension s to cen tre of pi n &

tolerance non accumulative.

0.080 Max
(2.0 Max)

0.05)

0.12 Max
(3.1 Max)

0.02

0.58+

0.5)

(14.7+

0.05 +
(1.3 +

0.01

0.5)

40

*

0.05 +
(1.3 +

0.02

0.05)

Figure 10 - Mechanical Data

*

4.20 + 0.0 20

0.5)

(50.8 +

0.020 +

0.05

(0.51 +

0.13)

*

0.100 +

(2.54 +

2

*

0.10

0.13)

1

0.18 +

(4.6 +

0.02

0.5)

2-198