Datasheet MGA-86563-BLK, MGA-86563-TR1 Datasheet (HP)

Page 1
0.5 – 6 GHz Low Noise GaAs MMIC Amplifier
Technical Data
MGA-86563

Features

• Ultra-Miniature Package
• Internally Biased, Single +5 V Supply (14 mA)
• 1.6 dB Noise Figure at
2.4 GHz
• 21.8 dB Gain at 2.4 GHz
• +3.1 dBm P
at 2.4 GHz
1dB

Applications

• LNA or Gain Stage for ISM, PCS, MMDS, GPS, TVRO, and Other C band Applications

Equivalent Circuit

RF
INPUT
1
GROUND 2, 3, 5, 6

Surface Mount Package SOT-363 (SC-70)

Pin Connections and Package Marking

INPUT
Note:
Package marking provides orientation and identification.
16
86
GND
25
GND
34
4
RF OUTPUT
AND V
GND
GND
OUTPUT and V
d

Description

Hewlett-Packard’s MGA-86563 is an economical, easy-to-use GaAs MMIC amplifier that offers low noise figure and excellent gain for applications from 0.5 to 6 GHz. Packaged in an ultra-miniature SOT-363 package, it requires half the board space of the SOT-143.
The MGA-86563 may be used without impedance matching as a high performance 2 dB NF gain block. Alternatively, with the addition of a simple shunt-series inductor at the input, the device noise figure can be reduced to
1.6␣ dB at 2.4 GHz. For 1.5 GHz
d
applications and above, the
output is well matched to 50 .
Below 1.5 GHz, gain can be increased by using conjugate matching.
The circuit uses state-of-the-art PHEMT technology with self­biasing current sources, a source­follower interstage, resistive feedback, and on-chip impedance matching networks. A patented, on-chip active bias circuit allows operation from a single +5 V power supply. Current consump­tion is only 14 mA, making this part suitable for battery powered applications.
5965-9686E
6-220
Page 2

MGA-86563 Absolute Maximum Ratings

Absolute
Symbol Parameter Units Maximum
V
d
V
in
P
in
T
ch
T
STG
Device Voltage, RF V 9 Output to Ground
RF Input Voltage to V +0.5 Ground –1.0
CW RF Input Power dBm +13
Channel Temperature °C 150 Storage Temperature °C -65 to 150
[1]
Thermal Resistance
θ
= 160°C/ W
ch-c
Notes:
1. Operation of this device above any one of these limits may cause permanent damage.
2. T
= 25°C (T
C
temperature at the package pins where contact is made to the circuit board).
is defined to be the
C
[2]
:
Electrical Specifications, T
= 25°C, ZO = 50 unless noted, V
C
= 5 V
d
Symbol Parameters and Test Conditions Units Min. Typ. Max.
G
NF
NF
test
test
Gain in Test Circuit
Noise Figure in Test Circuit
O
Optimum Noise Figure f = 0.9 GHz dB 2.0
[1]
[1]
f = 2.0 GHz 17 20
f = 2.0 GHz 1.8 2.3
(Tuned for lowest noise figure) f = 2.0 GHz 1.5
f = 2.4 GHz 1.6 f = 4.0 GHz 1.7 f = 6.0 GHz 2.0
G
A
Associated Gain at NF
O
f = 0.9 GHz dB 20.8
(Tuned for lowest noise figure) f = 2.0 GHz 22.7
f = 2.4 GHz 22.5 f = 4.0 GHz 18.0 f = 6.0 GHz 13.7
P
1 dB
Output Power at 1 dB Gain Compression f = 0.9 GHz dBm 3.6
(50 Ω Performance) f = 2.0 GHz 4.1
f = 2.4 GHz 4.2 f = 4.0 GHz 4.3 f = 6.0 GHz 3.3
IP
3
VSWR
VSWR
I
d
Note:
1. Guaranteed specifications are 100% tested in the circuit in Figure 10 in the Applications Information section.
Third Order Intercept Point f = 2.4 GHz dBm +15
Input VSWR f = 2.4 GHz 2.3:1
in
Output VSWR f = 2.4 GHz 1.7:1
out
Device Current mA 14
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Page 3
MGA-86563 Typical Performance, T
P
1 dB
(dBm)
0
0
FREQUENCY (GHz)
10
4
2
6
8
4
123 5
7.0 V
6
5.5 V
5.0 V
4.5 V
5
30
= 25° C, V
C
= 5 V
d
10
4
3
2
NOISE FIGURE (dB)
1
0
0
2
1
FREQUENCY (GHz)
3
+85
+25
-40
45
Figure 1. Minimum Noise Figure (Optimum Tuning) vs. Frequency and Temperature.
5
4
3
2
NOISE FIGURE (dB)
1
25
20
15
10
ASSOCIATED GAIN (dB)
5
0
0
6
1
3
2
FREQUENCY (GHz)
Figure 2. Associated Gain (Optimum Tuning) vs. Frequency and Temperature.
30
25
20
5.5 V
5.0 V
4.5 V
15
10
ASSOCIATED GAIN (dB)
5
45
8
6
-40
(dBm)
+25 +85
6
1 dB
P
-40
4
+25 +50
+85
2
0
0
123 5
FREQUENCY (GHz)
Figure 3. Output Power for 1 dB Gain
Compression (into 50 Ω) vs.
Frequency and Temperature.
5.5 V
5.0 V
4.5 V
4
6
0
0
12 4
FREQUENCY (GHz)
3
5
6
Figure 4. Minimum Noise Figure (Optimum Tuning) vs. Frequency and Voltage.
4.0
3.5
3.0
2.5
VSWR (n:1)
2.0 OUTPUT
1.5
1.0
0
Figure 7. Input and Output VSWR
(into 50 Ω) vs. Frequency.
INPUT
3
2
1
FREQUENCY (GHz)
45
6
0
0
1
3
2
FREQUENCY (GHz)
45
Figure 5. Associated Gain (Optimum Tuning) vs. Frequency and Voltage.
4.0
3.5
3.0
2.5
2.0
1.5
1.0
NOISE FIGURE (dB)
0.5
NF 50
NFopt
GA 50
0
0
4
2
6
FREQUENCY (GHz)
810
Figure 8. 50 Ω Noise Figure and
Associated Gain vs. Frequency.
6
Figure 6. Output Power for 1 dB Gain
Compression (into 50 Ω) vs.
Frequency and Voltage.
32
24
16
8
0
12
16
14 12 10
8 6
CURRENT (mA)
4
ASSOCIATED GAIN (dB)
2 0
0
1
2
3
VOLTAGE (V)
Figure 9. Device Current vs. Voltage.
4
56
-40 +25 +50 +85
7
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Page 4

MGA-86563 Typical Scattering Parameters

Freq. S
11
S
21
[1]
, T
= 25°C, ZO = 50 , V
C
S
12
= 5 V
d
S
22
GHz Mag. Ang. dB Mag. Ang. dB Mag. Ang. Mag. Ang. Factor
0.1 0.84 -17 3.1 1.42 76 -39.8 0.010 15 0.85 -15 3.27
0.5 0.57 -29 14.7 5.41 41 -44.3 0.006 -23 0.59 -39 6.77
1.0 0.55 -41 18.9 8.77 4 -51.2 0.003 -2 0.46 -53 10.49
1.5 0.53 -57 20.8 10.97 -29 -52.1 0.002 70 0.38 -66 14.23
2.0 0.47 -73 21.7 12.14 -62 -45.2 0.005 96 0.32 -78 5.94
2.5 0.38 -89 21.8 12.33 -94 -40.7 0.009 102 0.24 -89 3.78
3.0 0.26 -104 21.3 11.61 -125 -37.4 0.014 100 0.16 -99 2.92
3.5 0.14 -115 20.2 10.23 -152 -34.4 0.018 97 0.09 -102 2.75
4.0 0.04 -106 18.8 8.75 -177 -32.6 0.023 92 0.03 -82 2.58
4.5 0.04 -6 17.4 7.44 162 -30.9 0.027 88 0.03 1 2.58
5.0 0.07 2 16.1 6.41 143 -29.6 0.032 83 0.05 20 2.53
5.5 0.09 -4 14.9 5.57 126 -28.1 0.038 78 0.06 19 2.45
6.0 0.11 -17 13.9 4.93 110 -26.0 0.044 72 0.08 14 2.38
6.5 0.12 -28 12.9 4.40 94 -24.9 0.050 65 0.08 4 2.35
7.0 0.13 -36 12.0 3.96 79 -23.8 0.057 59 0.09 -3 2.29
7.5 0.15 -44 11.1 3.58 65 -22.6 0.065 53 0.11 -12 2.21
8.0 0.17 -53 10.4 3.30 51 -22.6 0.074 44 0.13 -21 2.10
K
opt
[1]
,

MGA-86563 Typical Noise Parameters

T
= 25°C, ZO = 50 , V
C
Frequency NF
= 5 V
d
o
Γ
(GHz) (dB) Mag. Ang. R
5 2.8 0.61 4 1.16
1.0 1.8 0.56 24 0.47
1.5 1.5 0.50 33 0.34
2.0 1.5 0.45 40 0.38
2.5 1.6 0.41 50 0.33
3.0 1.6 0.38 57 0.30
4.0 1.7 0.32 73 0.28
5.0 1.9 0.24 98 0.27
6.0 2.1 0.15 131 0.24
Note:
1. Reference plane per Figure 11 in Applications Information section.
/50
N
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Page 5

MGA-86563 Applications Information

Introduction

The MGA-86563 is a high gain, low noise RF amplifier for use in wireless RF applications within the 0.5 to 6 GHz frequency range. The MGA-86563 is a three-stage, GaAs Microwave Monolithic Integrated Circuit (MMIC) ampli­fier that uses internal feedback to provide wideband gain and impedance matching.
A patented, active bias circuit makes use of current sources to “re-use” the drain current in all three stages of gain, thus minimiz­ing the required supply current and decreasing sensitivity to variations in power supply voltage.

Test Circuit

The circuit shown in Figure 10 is used for 100% RF testing of Noise Figure and Gain. The input of this circuit is fixed tuned for a conju­gate power match (maximum power transfer, or, minimum Input VSWR) at 2 GHz. Tests in this circuit are used to guarantee the NF shown in the Electrical Specifica­tions Table.
The 3.3 nH inductor, L1 (Coilcraft, Cary, IL or equivalent) in series with the input of the amplifier matches the input to
50 at 2 GHz.
test
and G
parameters
test
The parameter test circuit uses a high impedance RF choke to apply Vd to the MMIC while isolating the power supply from the RF Output of the amplifier.

Phase Reference Planes

The positions of the reference planes used to measure S-
Parameters and to specify Γ
opt
for the Noise Parameters are shown in Figure 11. As seen in the illustration, the reference planes are located at the extremities of the package leads.

Biasing

The MGA-86563 is a voltage­biased device and operates from a single +5 volt power supply. With a typical current drain of
only 14 mA, the MGA-86563 is suitable for use in battery powered applications. RF performance is very stable over a wide variation of power supply voltage.
REFERENCE
PLANES
TEST CIRCUIT
Figure 11. Reference Planes.
Since DC bias is applied to the MGA-86563 through the RF Output pin, some method of isolating the RF from the DC must be provided. An RF choke or length of high impedance transmission line is typically used for this purpose.

SOT-363 PCB Layout

A PCB pad layout for the minia­ture SOT-363 (SC-70) package used by the MGA-86563 is shown in Figure 12 (dimensions are in inches). This layout provides ample allowance for package placement by automated assembly equipment without adding parasitics that could impair the high frequency RF performance of the MGA-86563. The layout is shown with a nominal SOT-363 package footprint superimposed on the PCB pads.
0.026
0.075
0.035
0.016
Figure 12. PCB Pad Layout (dimensions in inches).
BOARD MATERIAL = 1/16" FR-4
L1
(50 )
3.3 nH w = 110
I = 110
RF
w = 110
INPUT
Figure 10. Test Circuit for 2 GHz.
w = 15 I = 1000
RFC (28 nH)
w = 110
(50 )
C1
V
d
RF OUTPUT
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Page 6

RF Layout

The RF layout in Figure 13 is suggested as a starting point for amplifier designs using the MGA­86563 MMIC. Adequate grounding is needed to obtain maximum performance and to obviate potential instability. All four ground pins of the MMIC should be connected to RF ground by using plated through holes (vias) near the package terminals.
It is recommended that the PCB pads for the ground pins NOT be connected together underneath the body of the package. PCB traces hidden under the package cannot be adequately inspected for SMT solder quality.

PCB Material

FR-4 or G-10 printed circuit board material is a good choice for most low cost wireless applications. Typical board thickness is 0.020
or 0.031 inches. The width of 50
microstriplines in PC boards of these thicknesses is also convenient for mounting chip components such as the series inductor that is used at the input for impedance matching or for DC blocking capacitors.
For applications requiring the lowest noise figures, the use of
50
RF INPUT
50
86
RF OUTPUT AND V
PTFE/glass dielectric materials may be warranted to minimize transmission line losses at the amplifier input. A 0.5 inch length
of 50 microstripline on FR-4
has approximately 0.3 dB loss at 4␣ GHz which will add directly to the noise figure of the MGA-86563.

Typical Application Circuit

A typical implementation of the MGA-86563 as a low noise ampli­fier is shown in Figure 14.
A 50 microstripline with a
series DC blocking capacitor, C1, is used to feed RF to the MMIC. The input of the MGA-86563 is already partially matched for
noise figure and gain to 50 . The
use of a simple input matching circuit, such as a series inductor, will minimize amplifier noise figure. Since the impedance match for NFO (minimum noise figure) is very close to a conjugate power match, a low noise figure can be realized simultaneously with a low input VSWR.
DC power is applied to the MMIC through the same pin that is
shared with the RF output. A 50
microstripline is used to connect the device to the following stage. A bias decoupling network is used to feed in Vd while simultan­eously providing a DC block to the RF signal. The bias
d
C3
decoupling network shown in Figure 14, consisting of resistor R1, a short length of high impedance microstripline, and bypass capacitor C3, will provide excellent performance over a wide frequency range. Surface mount chip inductors could be used in place of the high impedance transmission line to act as an RF choke. Consideration should be given to potential resonances and signal radiation when using lumped inductors.
For operation at frequencies below approximately 2 GHz, the addition of a simple impedance matching circuit to the output will increase the gain and output power by 0.5 to 1.5 dB. The output matching circuit will not effect the noise figure.
A small value resistor placed in series with the Vdd line may be useful to “de-Q” the bias circuit. Typical values of R1 are in the
10 to 100 range. Depending
on the value of resistance used, the supply voltage may have to be increased to compensate for volt­age drop across R1. The power supply should be capacitively bypassed (C3) to ground to prevent undesirable gain varia­tions and to eliminate unwanted feedback through the bias lines that could cause oscillation.
V
d
Figure 13. RF Layout.
HIGH Z
C1
50
Figure 14. Typical Amplifier Circuit.
50 50
R1
L1
6-225
C2
50
Page 7

Higher Bias Voltages

While the MGA-86563 is designed primarily for use in +5 volt applications, the internal bias regulation circuitry allows it to be operated with any power supply voltage from +5 to +7 volts. The use of +7 volts increases the P
1dB
by approximately 1 dBm. The effect on noise figure, gain, and VSWR with higher Vd is negligible.
For more information call your nearest HP sales office.

Package Dimensions

Outline 63 (SOT-363/SC-70)
1.30 (0.051) REF.

MGA-86563 Part Number Ordering Information

Part Number Devices per Container Container
MGA-86563-TR1 3000 7" reel
MGA-86563-BLK 100 Antistatic bag
2.20 (0.087)
2.00 (0.079)
0.10 (0.004)
0.00 (0.00)
0.25 (0.010)
0.15 (0.006)
1.35 (0.053)
1.15 (0.045)
0.650 BSC (0.025)
2.20 (0.087)
1.80 (0.071)
0.30 REF.
1.00 (0.039)
0.80 (0.031)
DIMENSIONS ARE IN MILLIMETERS (INCHES)
10°
0.30 (0.012)
0.10 (0.004)
0.425 (0.017) TYP.
0.20 (0.008)
0.10 (0.004)
6-226
Page 8

Device Orientation

REEL
CARRIER
8 mm
TAPE
USER FEED DIRECTION
COVER TAPE

Tape Dimensions and Product Orientation

For Outline 63
P
P
0
C
TOP VIEW
4 mm
86 86 86 86
D
END VIEW
P
2
E
F
W
CAVITY
PERFORATION
CARRIER TAPE
COVER TAPE
DISTANCE
(CARRIER TAPE THICKNESS) Tt (COVER TAPE THICKNESS)
t
1
8° MAX.
A
0
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
A
LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER
DIAMETER PITCH POSITION
WIDTH THICKNESS
WIDTH TAPE THICKNESS
CAVITY TO PERFORATION (WIDTH DIRECTION)
CAVITY TO PERFORATION (LENGTH DIRECTION)
B K P D
D P E
W t
1
C T
F
P
0 0 0
1
0
t
2
2.24 ± 0.10
2.34 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.25
1.55 ± 0.05
4.00 ± 0.10
1.75 ± 0.10
8.00 ± 0.30
0.255 ± 0.013
5.4 ± 0.10
0.062 ± 0.001
3.50 ± 0.05
2.00 ± 0.05
K
0
0.088 ± 0.004
0.092 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 + 0.010
0.061 ± 0.002
0.157 ± 0.004
0.069 ± 0.004
0.315 ± 0.012
0.010 ± 0.0005
0.205 ± 0.004
0.0025 ± 0.00004
0.138 ± 0.002
0.079 ± 0.002
6-227
D
1
5° MAX.
B
0
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