Datasheet MCP8025, MCP8026 Datasheet

MCP8025/6

3-Phase Brushless DC (BLDC) Motor Gate Driver with Power Module, Sleep Mode, LIN Transceiver

Features

• AEC-Q100 Grade 0 Qualified

• Quiescent Current:

- Sleep Mode: 5 µA Typical

- Standby Mode: < 200 µA

• LIN Transceiver Interface (MCP8025):

- Compliant with LIN Bus Specifications 1.3,

2.2, and SAE J2602

- Supports baud rates up to 20K baud

- Internal pull-up resistor and diode

- Protected against ground shorts

- Protected against loss of ground

- Automatic thermal shutdown

- LIN Bus dominant timeout

• Three Half-Bridge Drivers Configured to Drive
External High-Side NMOS and Low-Side NMOS
MOSFETs:

- Independent input control for high-side

NMOS and low-side NMOS MOSFETs

- Peak output current: 0.5A @ 12V

- Shoot-through protection

- Overcurrent and short circuit protection

• Adjustable Output Buck Regulator (750 mW)

• Fixed Output Linear Regulators:

- 5V@30mA

-12V@30mA

• Operational Amplifiers:

- one in MCP8025

- three in MCP8026

• Overcurrent Comparator with DAC Reference

• Phase Comparator With Multiplexer (MCP8025)

• Neutral Simulator (MCP8025)

• Level Translators (MCP8026)

• Input Voltage Range: 6V – 40V

• Operational Voltage Range:

-6V–19V (MCP8025)

-6V–28V (MCP8026)

• Buck Regulator Undervoltage Lockout: 4.0V

• Undervoltage Lockout (UVLO): 5.5V (except Buck)

• Overvoltage Lockout (OVLO)

-20V (MCP8025)

-32V (MCP8026)

• Transient (100 ms) Voltage Tolerance: 48V

• Extended Temperature Range (T

• Thermal Shutdown

): -40 to +150°C

A

Applications

• Automotive Fuel, Water, Ventilation Motors

• Home Appliances

• Permanent Magnet Synchronous Motor (PMSM)
Control

• Hobby Aircraft, Boats, Vehicles

Description

The MCP8025/6 devices are 3-phase brushless DC
(BLDC) power modules containing three integrated
half-bridge drivers capable of driving three external
NMOS/NMOS transistor pairs. The three half-bridge
drivers are capable of delivering a peak output current
of 0.5A at 12V for driving high-side and low-side NMOS
MOSFET transistors. The drivers have shoot-through,
overcurrent and short-circuit protection. A Sleep Mode
has been added to achieve a typical “key-off” quiescent
current of 5 µA.

The MCP8025 device integrates a comparator, a buck
voltage regulator, two LDO regulators, power
monitoring comparators, an overtemperature sensor, a
LIN transceiver, a zero-crossing detector, a neutral
simulator and an operational amplifier for motor current
monitoring. The phase comparator and multiplexer
allow for hardware commutation detection. The neutral
simulator allows commutation detection without a
neutral tap in the motor. The buck converter is capable
of delivering 750 mW of power for powering a
companion microcontroller. The buck regulator may be
disabled if not used. The on-board 5V and 12V low­dropout voltage regulators are capable of delivering
30 mA of current.

The MCP8026 replaces the LIN transceiver, neutral
simulator and zero-crossing detector in MCP8025 with
two level shifters and two additional op amps.

The MCP8025/6 operation is specified over a
temperature range of -40°C to +150°C.

Package options include 40-lead 5x5 QFN and 48-lead
7x7 TQFP with Exposed Pad (EP).

 2014 Microchip Technology Inc. DS20005339A-page 1

MCP8025/6

5mm x 5mm QFN-40

7mm x 7mm TQFP-48

+

EP
41

EP
49

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

171819

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

1

2

3

4

5

6

7

8

9

10

11

12

131415

16

171819

20

21

222324

36

35

34

33

32

31

30

29

28

27

26

25

484746

45

444342

41

40

393837

PWM2H

PWM1L

PWM1H

CE

LIN_BUS

RX

TX

FAULTn

/TXE

MUX1

MUX2

+12V
V

BA

V

BB

V

BC

PHA

PHB

PHC
HSA

HSB

HSC

ZC_OUT

COMP_REF

ILIMIT_OUT

I_OUT1

I_SENSE1-

I_SENSE1+

P

GND

LSA

LSB

LSC

PWM2L

PWM3H

PWM3L

DE2

CAP1

CAP2

+5VFBVDDLX

PWM2H

PWM1L

PWM1H

CE

LIN_BUS

RX

TX

FAULTn

/TXE

MUX1

MUX2

NC

NC

P

GND

ZC_OUT

COMP_REF

ILIMIT_OUT

I_OUT1

I_SENSE1-

I_SENSE1+

P

GND

LSA

LSB

LSC

P

GND

P

GND

+12V
V

BA

V

BB

V

BC

PHA

PHB

PHC
HSA

HSB

HSC

P

GND

P

GND

PWM2L

PWM3H

PWM3L

DE2

CAP1

CAP2

+5V

FB

VDDLX

V

DD

Package Types – MCP8025

DS20005339A-page 2  2014 Microchip Technology Inc.

Package Types – MCP8026

5mm x 5mm QFN-40

7mm x 7mm TQFP-48

EP
41

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

171819

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

PWM2H

PWM1L

PWM1H

CE

HV_IN1

LV_O UT1

IOUT3
ISENSE3-

ISENSE3+

IOUT2

+12V
V

BA

V

BB

V

BC

PHA

PHB

PHC
HSA

HSB

HSC

ISENSE2-

ISENSE2+

ILIMIT_OUT

I_OUT1

I_SENSE1-

I_SENSE1+

P

GND

LSA

LSB

LSC

PWM2L

PWM3H

PWM3L

DE2

CAP1

CAP2

+5V

FB

VDDLX

+

EP
49

1

2

3

4

5

6

7

8

9

10

11

12

131415

16

171819

20

21

222324

36

35

34

33

32

31

30

29

28

27

26

25

484746

45

444342

41

40

393837

PWM2H

PWM1L

PWM1H

CE

HV_IN1

LV_OUT1

IOUT3

ISENSE3-

ISENSE3+

IOUT2

LV_OUT2

HV_IN2

P

GND

ISENSE2-

ISENSE2+

ILIMIT_OUT

I_OUT1

I_SENSE1-

I_SENSE1+

P

GND

LSA

LSB

LSC

P

GND

P

GND

+12V
V

BA

V

BB

V

BC

PHA

PHB

PHC
HSA

HSB

HSC

P

GND

P

GND

PWM2L

PWM3H

PWM3L

DE2

CAP1

CAP2

+5V

FB

VDDLX

V

DD

MCP8025/6

 2014 Microchip Technology Inc. DS20005339A-page 3

LIN

XCVR

CE

FAULTn/TXE

RX

TX

PWM1H

PWM1L

PWM2H

PWM2L

PWM3H

PWM3L

LIN_BUS

MUX

+

-

PHA
PHB
PHC

PGND

ZC_OUT

COMP_REF

NEUTRAL_SIM

MUX1
MUX2

MOTOR CONTROL UNIT

COMMUNICATION PORT BIAS GENERATOR

+12V

HSA

HSB

HSC

LSA

LSB

LSC

VBA
VBB
VBC

GATE

CONTROL

LOGIC

I

I

I

I

I

I

I

I

I

O

O

O

O

O

O

O

VDD

I_OUT1

+

-

+

-

ILIMIT_OUT

I_SENSE1+

I_SENSE1-

DRIVER

FAULT

VDD

I

I

I/O

I/O

O

I

I

I

I

IO

PHASE DETECT

ILIMIT_REF

LDO

BUCK SMPS

SUPERVISOR

LDO

CHARGE PUMP

DE2

VDD

+5V

LX
FB

+12V

CAP2

CAP1

SIM Select

MCP8025/6

Functional Block Diagram – MCP8025

DS20005339A-page 4  2014 Microchip Technology Inc.

GATE

CONTROL

LOGIC

CE

PWM1H

PWM1L

PWM2H

PWM2L

PWM3H

PWM3L

HV_IN1

I_OUT1

+

-

+

-

PHA
PHB
PHC

PGND

ILIMIT_OUT

MOTOR CONTROL UNIT

COMMUNICATION PORT BIAS GENERATOR

+12V

HSA

HSB

HSC

I_SENSE1+

LSA

LSB

LSC

I_SENSE1-

VBA
VBB
VBC

LV_OUT1

LEVEL

TRANSLATOR

VDD

+

-

+

-

I_SENSE2+

I_SENSE2-

I_SENSE3+

I_SENSE3-

I_OUT2

I_OUT3

DRIVER

FAULT

I

I

I

I

I

I

I

I

I

I

I

O

O

O

O

O

O

O

O

LDO

BUCK SMPS

SUPERVISOR

LDO

CHARGE PUMP

DE2

VDD

+5V

LX
FB

+12V

CAP2

CAP1

ILIMIT_REF

HV_IN2

LV_OUT2

O

I

Functional Block Diagram – MCP8026

MCP8025/6

 2014 Microchip Technology Inc. DS20005339A-page 5

DS20005339A-page 6  2014 Microchip Technology Inc.

LIN

XCVR

CE

FAULTn/TXE

RX
TX

PWM1H

PWM1L

PWM2H

PWM2L

PWM3H

PWM3L

LIN_BUS

MUX

+

-

PHA
PHB
PHC

PGND

ZC_OUT

COMP_REF

NEUTRAL_SIM

DE2

MUX1
MUX2

MOTOR CONTROL UNIT

COMMUNICATION PORT BIAS GENERATOR

LDO

BUCK SMPS

SUPERVISOR

VDD

LDO

+5V

LX
FB

+12V

+12V

HSA

HSB

HSC

LSA

LSB

LSC

VBA
VBB
VBC

GATE

CONTROL

LOGIC

I

I

I

I

I

I

I

I

I

O

O

O

O

O

O

O

VDD

I_OUT1

+

-

+

-

ILIMIT_OUT

I_SENSE1+

I_SENSE1-

DRIVER

FAULT

VDD

I

I

I/O

I/O

O

I

I

I

I

IO

CAP1

CHARGE PUMP

CB

A

+
_

E

VADJ

PHASE DETECT

+12V

ILIMIT_REF

CAP2

100 nF

Ceramic

SIM Select

Typical Application Circuit – MCP8025

MCP8025/6

 2014 Microchip Technology Inc. DS20005339A-page 7

'!4%

#/.42/,

,/')#

#%

07-(

07-,

07-(

07-,

07-(

07-,

(6?).

)?/54









0(!
0("
0(#

0'.$

-/4/2#/.42/,5.)4

#/--5.)#!4)/.0/24

6

(3!

(3"

(3#

)?3%.3%

,3!

,3"

,3#

)?3%.3%

6"!
6""
6"#

,6?/54

,%6%,

42!.3,!4/2

6$$









)?3%.3%

)?3%.3%

)?3%.3%

)?3%.3%

)?/54

)?/54

$2)6%2

&!5,4

)

)

)

)

)

)

)

)

)

)

)

/

/

/

/

/

/

/

/

#"

!


?

%

6

$%

")!3'%.%2!4/2

,$/

"5#+3-03

350%26)3/2

6$$

,$/

6

,8
&"

6

#!0

#(!2'%05-0

6!$*

ILIMIT_REF

#!0

(6?).

,6?/54

/

)

N&

#ERAMIC

),)-)4?/54

Typical Application Circuit – MCP8026

MCP8025/6

MCP8025/6

NOTES:

DS20005339A-page 8  2014 Microchip Technology Inc.

MCP8025/6

1.0 ELECTRICAL CHARACTERISTICS

† Notice: Stresses above those listed under “Maximum

Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those

Absolute Maximum Ratings †

Input Voltage, VDD.............................(GND – 0.3V) to +46.0V

Input Voltage, < 100 ms Transient ...............................+48.0V

Internal Power Dissipation ...........................Internally-Limited

Operating Ambient Temperature Range .......-40°C to +150°C

Operating Junction Temperature (Note 2) ....-40°C to +160°C

Transient Junction Temperature (Note 1)...................+170°C

Storage Temperature (Note 2)......................-55°C to +150°C

Digital I/O .......................................................... -0.3V to 5.5V

LV Analog I/O.................................................... -0.3V to 5.5V

VBx ..................................................(GND – 0.3V) to +46.0V

PHx, HSx .........................................(GND – 5.5V) to +46.0V

ESD and Latch-Up Protection:

, LIN_BUS/HV_IN1  8 kV HBM and  750V CDM

V

DD

All other pins .....................  2 kV HBM and  750V CDM

Latch-up protection – all pins .............................. > 100 mA

indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.

Note 1: Transient junction temperatures should not

2: The maximum allowable power dissipation

AC/DC CHARACTERISTICS

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

POWER SUPPLY INPUT

Input Operating Voltage V

Transient Maximum Voltage V

Input Current (MCP8025)V

Input Current (MCP8026)V

Digital Input/Output DIGITAL

Digital Open-Drain Drive

DD

DDmax

DD

DD

DIGITAL

I/O

IOL

Streng th

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD=13V.

J

6.0 — 19.0 V Operating (MCP8025)

6.0 — 28.0 Operating (MCP8026)

6.0 — 40.0 Shutdown

4.0 — 32.0 Buck Operating Range

— — 48.0 V < 100 ms

———µAVDD>13V

— 5 15 Sleep Mode

— 175 — Standby, CE = 0V, T

— 175 — Standby, CE = 0V, TJ= +25°C

— 195 300 Standby, CE = 0V, T

—940— Active, CE>V

—1150— Active, VDD=6V, TJ=+25°C

———µAVDD>13V

— 5 15 Sleep Mode

— 120 — Standby, CE = 0V, T

— 120 — Standby, CE = 0V, TJ= +25°C

— 144 300 Standby, CE = 0V, T

—950— Active, CE>V

— 1090 — Active, VDD=6V, TJ=+25°C

0—5.5V

—1—mAVDS<50mV

exceed one second in duration. Sustained
junction temperatures above 170°C may
impact the device reliability.

is a function of ambient temperature, the
maximum allowable junction temperature
and the thermal resistance from junction to
air (i.e., T

, TJ, JA). Exceeding the maxi-

A

mum allowable power dissipation may
cause the device operating junction tem­perature to exceed the maximum 160°C
rating. Sustained junction temperatures
above 150°C can impact the device reliabil­ity and ROM data retention.

=-45°C

J

= +150°C

J

DIG_HI_TH

=-45°C

J

= +150°C

J

DIG_HI_TH

 2014 Microchip Technology Inc. DS20005339A-page 9

MCP8025/6

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

Digital Input Rising Threshold V

Digital Input Falling Threshold V

Digital Input Hysteresis V

Digital Input Current I

Analog Low-Voltage Input ANALOG

Analog Low-Voltage Output

DIG_HI_TH

DIG_LO_TH

DIG_HYS

DIG

ANALOG

VIN

VOUT

BIAS GENERATOR
+12V Regulated Charge Pump

Charge Pump Current I

Charge Pump Start CP

Charge Pump Stop CP

Charge Pump Frequency

CP

CP

START

STOP

FSW

(50% charging/
50% discharging)

Charge Pump Switch

CP

RDSON

Resistance

Output Voltage V

Output Voltage Tolerance |TOLV

Output Current I

Output Current Limit I

Output Voltage Temperature

TCV

OUT12

OUT12

OUT

LIMIT

OUT12

|— — 4.0 %I

Coefficient
Line Regulation |V

(V

OUT

Load Regulation |V

Power Supply Rejection

/

OUT

x VDD)|

OUT/VOUT

|— 0.2 0.5 %I

PSRR — 60 — dB f = 1 kHz, I

Ratio

+5V Linear Regulator

Output Voltage V

Output Voltage Tolerance |TOLV

Output Current I

Output Current Limit I

Output Voltage Temperature

|TCV

OUT5

|— — 4.0 %

OUT5

OUT

LIMIT

|—50—ppm/°C

OUT5

Coefficient
Line Regulation |V

(V

OUT

Load Regulation |V

/

OUT

x VDD)|

OUT/VOUT

|— 0.2 0.5 %I

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD= 13V.

J

1.26 — — V

——0.54V

—500—mV

—30100µAV

—0.2— V

0 — 5.5 V Excludes LIN and high-voltage

0—V

OUT5

20 — — mA VDD=9.0V

11.0 11.5 — V VDD falling

— 12.0 12.5 V VDD rising

— 76.80 — kHz VDD=9.0V

—0— V

—14—  RDSON sum of high side and

—12— VVDD 7.5V, C

—9— V

30 — — mA Average current

40 50 — mA Average current

—50—ppm/°C

—0.10.5%/V13V<V

—5—VVDD=V

30 — — mA Average current

40 50 — mA Average current

—0.10.5%/V6V<V

=3.0V

DIG

=0V

DIG

pins

V Excludes LIN and high-voltage

pins

= 13V (stopped)

DD

low side

=100nF,

DD

OUT5

DD

PUMP

PUMP

< 19V,

=10mA

OUT

+1V,

<19V, I

= 260 nF,

=20mA

OUT

=20mA

I

OUT

=5.1V, C

DD

=15mA

I

OUT

=1mA

OUT

=20mA

I

OUT

= 0.1 mA to 15 mA

OUT

=1mA

I

OUT

= 0.1 mA to 15 mA

OUT

DS20005339A-page 10  2014 Microchip Technology Inc.

MCP8025/6

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

Dropout Voltage VDD–V

Power Supply Rejection

OUT5

PSRR — 60 — dB f = 1 kHz, I

Ratio

Buck Regulator

Feedback Voltage V

FB

Feedback Voltage Tolerance TOLVFB ——5.0%IFB=1µA

Feedback Voltage Line
Regulation

Feedback Voltage Load

V

V

V

)/

FB/VFB

|

DD

|—0.10.5%I

FB/VFB

Regulation

Feedback Input Bias Current I

Feedback Voltage

FB

V

BUCK_DIS

To Shutdown Buck Regulator

Switching Frequency f

Duty Cycle Range DC

PMOS Switch On Resistance R

PMOS Switch Current Limit I

Ground Current –

SW

MAX

DSON

P(MAX)

I

GND

PWM Mode

Quiescent Current –

I

Q

PFM Mode

Output Voltage Adjust Range V

Output Current I

Output Power P

OUT

OUT

OUT

V oltage Supervisor

Buck Input Undervoltage

UVLO

BK_STRT

Lockout – Start-Up

Buck Input Undervoltage

UVLO

BK_STOP

Lockout – Shutdown

Buck Input Undervoltage

UVLO

BK_HYS

Lockout Hysteresis

5V LDO Undervoltage Fault

UVLO

5VLDO_INACT

Inactive

5V LDO Undervoltage Fault

UVLO

5VLDO_ACT

Active

5V LDO Undervoltage Fault

UVLO

5VLDO_HYS

Hysteresis

Input Undervoltage Lockout –

UVLO

STRT

Start -Up

Input Undervoltage Lockout -

UVLO

STOP

Shutdown

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD=13V.

J

—180350mVI

OUT

=20mA,
measurement taken when
output voltage drops 2% from
no-load value.

1.19 1.25 1.31 V

—0.10.5%/VV

= 6V to 28V

DD

= 5 mA to 150 mA

OUT

-100 — +100 nA Sink/Source

2.5 — 5.5 V VDD>6V

—461—kHz

3—96%

—0.6—  TJ=25°C

—2.5— A

— 1.5 2.5 mA Switching

—150200µAI

OUT

=0mA

2.0 — 5.0 V

150 — — mA 5V, VDD–V

250 — — 3V, VDD–V

—750—mWP=I

OUTxVOUT

—4.34.5 VVDD rising

3.8 4.0 — V VDD falling

—0.3— V

—4.5— VV

—4.0— VV

OUT5

OUT5

rising

falling

—0.5— V

—6.06.25VVDD rising

5.1 5.5 — V VDD falling

OUT

OUT

OUT

=10mA

>0.5V

> 0.5V

 2014 Microchip Technology Inc. DS20005339A-page 11

MCP8025/6

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

Input Undervoltage Lockout

UVLO

HYS

Hysteresis

Input Overvoltage Lockout –

DOVLO

STOP

Driver Disabled (MCP8025)

Input Overvoltage Lockout –

DOVLO

STRT

Driver Enabled (MCP8025)

Input Overvoltage Lockout

DOVLO

HYS

Hysteresis (MCP8025)

Input Overvoltage Lockout –

AOVLO

STOP

All Functions Disabled

Input Overvoltage Lockout –

AOVLO

STRT

All Functions Enabled

Input Overvoltage Lockout

AOVLO

HYS

Hysteresis

Temperature Supervisor

Thermal Warning

T

WARN

Temperature
Thermal Warning Hysteresis T

Thermal Shutdown

WARN

T

SD

Temperature

Thermal Shutdown

T

SD

Hysteresis

MOTOR CONTROL UNIT
Output Drivers

PWMH/L Input Pull Down R

Output Driver Source Current I

Output Driver Sink Current I

Output Driver Source

PULLDN

SOURCE

SINK

R

DSON

Resistance

Output Driver Sink

R

DSON

Resistance

Output Driver Blanking t

Output Driver UVLO

BLANK

D

UVLO

Threshold

Output Driver UVLO

t

DUVLO

Minimum Duration

Output Driver HS Drive

V

HS

Voltage

Output Driver LS Drive

V

LS

Voltage

Output Driver Bootstrap

V

BOOTSTRAP

Voltage

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD= 13V.

J

0.20 0.45 0.70 V

— 20.0 20.5 V VDD rising

18.75 19.5 — V VDD falling

0.15 0.5 0.75 V

— 32.0 33.0 V VDD rising

29.0 30.0 — V VDD falling

1.0 2.0 3.0 V

—72—%TSDRising temperature (115°C)

— 15 — °C Falling temperature

160 170 — °C Rising temperature

— 25 — °C Falling temperature

—47—k

0.3 — — A VDD= 12V, HS[A:C], LS[A:C]

0.3 — — A VDD= 12V, HS[A:C], LS[A:C]

—17—  I

—17—  I

500 — 4000 ns Configurable

7.2 8.0 — V Config Register 0 bit 3 = 0

t

BLANK

+700

—t

BLANK

+1400

8.0 12 13.5 V With respect to the Phase pin

-5.5 — — With respect to ground

8.0 12 13.5 V With respect to ground

— — — V With respect to ground

— — 44 Continuous

— — 48 < 100 ms

=10mA, VDD= 12V,

OUT

HS[A:C], LS[A:C]

=10mA, VDD= 12V,

OUT

HS[A:C], LS[A:C]

ns Fault latched after t

DUVLO

DS20005339A-page 12  2014 Microchip Technology Inc.

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

Output Driver Phase Pin

V

PHASE

Voltage

Output Driver Short Circuit

D

SC_THR

Protection Threshold

High Side (VDD–V
Low Side (V

PHx–PGND

Output Driver Short Circuit

PHx

)

)

T

SC_DLY

Detected Propagation Delay

Output Driver OVLO Turn-Off

T

OVLO_DLY

Delay

Power-Up or Sleep to

t

POWER

Standby

Standby to Motor Operational t

Fault to Driver Output

MOTOR

T

FAULT_ OFF

Turn-Off

CE Low to Driver Output

T

DEL_OFF

Turn-Off

CE Low to Standby State t

CE Low to Sleep State t

CE Fault Clearing Pulse t

STANDBY

SLEEP

FAULT_CLR

Current Sense Amplifier

Input Offset Voltage V

Input Offset Temperature Drift V

Input Bias Current I

Common Mode Input Range V

OS

CMR

OS

B

/T

A

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD=13V.

J

— — — V With respect to ground

-5.5 — 44 Continuous

-5.5 — 48 < 100 ms

— — — V Set In Register CFG0
—0.250— 00 (Default)
—0.500— 01
—0.750— 10
—1.000— 11

———nsC

— 430 — Detection after blanking

— 10 — Detection during blanking,

3 5 — µs Detection synchronized with

— — — ms CE High-Low-High

—10— MCP8025
—5— MCP8026

— 5 — µs CE High-Low-High

— — 5 ms Standby state to Operational

— — 10 ms Standby state to Operational

———µsC

— 1 — UVLO, OCP faults

— 10 — All other faults

—100250nsC

— 1 — ms Time after CE = Low,

— 1 — ms Time after CE = Low,

1 — 900 µs CE High-Low-High Transition

-3.0 — +3.0 mV VCM=0V

—±2.0—µV/°CVCM=0V

-1 — +1 µA

-0.3 — 3.5 V

MCP8025/6

= 1000 pF, VDD=12V

LOAD

value is delay after blanking

internal clock (Note 2)

Transition < 100 µs (Fault
Clearing)

Transition < 0.9 ms (Fault
Clearing)

state (MCP8025, Note 2)

state (MCP8026, Note 2)

= 1000 pF, VDD=12V,

LOAD

time after fault occurs.

= 1000 pF, VDD=12V,

LOAD

Time after CE = Low (Note 2)

SLEEP Bit = 0

SLEEP Bit = 1

Time (Note 2)

= -40°C to +150°C

T

A

 2014 Microchip Technology Inc. DS20005339A-page 13

MCP8025/6

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

Common Mode Rejection

CMRR — 80 — dB Freq = 1 kHz, I

Ratio

Maximum Output Voltage

, V

V

OL

OH

Swing

Slew Rate SR — ±7 — V/µs Symmetrical

Gain Bandwidth Product GBWP — 10.0 — MHz

Current Comparator

CC

HYS

Hysteresis

Current Comparator

V

CC_CMR

Common Mode Input Range

Current Limit DAC

Resolution — 8 — Bits

Output Voltage Range V

Output Voltage V

Input to Output Delay T

, V

OL

DAC

DELAY

OH

Integral Nonlinearity INL -0.5 — +0.5 %FSR %Full Scale Range, Note 2
Differential Nonlinearity DNL -50 — +50 %LSB %LSB, Note 2

ILIMIT_OUT

Sink Current

IL

OUT

(Open-Drain)

ZC Back EMF Sampler Comparator (MCP8025)

Maximum Output Voltage
Swing

Reference Input Impedance ZC

Input to Output Delay ZC

Voltage Divider RC Time

ZCVOL,

ZCV

OH

ZREF

DELAY

ZC

TRC

Constant

ZC Output Pull-Up Range ZC

ZC Output Sink Current

RPULLUP

ZC

IOL

(Open-Drain)

Back EMF Sampler Phase Multiplexer (MCP8025)

MUX[1:2] Input Pull Down R

Transition Time t

Delay from MUX Select to ZC

PULLDN

MUX

TRAN

DELAY

Out

Phase Filter Capacitors C

PHASE

COMMUNICATION PORTS
Standard LIN (MCP8025)
Microcontroller Interface

TX Input Pull-Up Resistor R

PUTXD

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD= 13V.

J

OUT

0.05 — 4.5 V I

OUT

= 200 µA

—10—mV

1.0 — 4.5 V

0.991 — 4.503 V I

OUT

=1mA

——— VCFG1 Code x

13.77 mV/bit + 0.991V

— 0.991 — Code 00H

— 1.872 — Code 40H

— 4.503 — Code FFH

—50—µs

—1—mAV

0.05 - 5.0 V I

ILIMIT_OUT

OUT

 50 mV

=1mA

—83—k

—-500nsV

IN_STEP

=500mV, Note 2

—100— ns

3.3 10 — k
—1—mAVout 50 mV

—47—k
—150250nsNote 2

—210— ns

— 1.5 — pF MUX input to ground

—48 - k Pull up to 5V

=10µA

DS20005339A-page 14  2014 Microchip Technology Inc.

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

Bus Interface

LIN Bus High-Level Input

V

HI

Voltage

LIN Bus Low-Level Input

V

LO

Voltage

LIN Bus Input Hysteresis V

LIN Bus Low-Level Output

HYS

I

OL

Current

LIN Bus Input Pull-Up Current I

LIN Bus Short Circuit Current
Limit

LIN Bus Low-Level Output

PU

I

SC

V

OL

Voltage

LIN Bus Input Leakage
Current (at receiver during

I

BUS_PAS_DOM

dominant bus level)

LIN Bus Input Leakage
Current (at receiver during
recessive bus level)

I

BUS_PAS_REC

LIN Bus Input Leakage
Current (disconnected from

I

BUS_NO_GND

ground)

LIN Bus Input Leakage

I

BUS_NO_BAT

Current (disconnected from
V

)

DD

Receiver Center Voltage V

LIN Bus Slave Pull-Up

BUS_CNT

R

PULLUP

Resistance

LIN Dominant State Timeout t

Propagation Delay T

Symmetry T

DOM_TOUT

RX_PD

RX_SYM

V oltage Level Translators (MCP8026)

High Voltage Input Range V

Low Voltage Output Range V

IN

OUT

Input Pull-Up Resistor RPU — 30 — k

High-Level Input Voltage V

Low-Level Input Voltage V

Input Hysteresis V

Propagation Delay T

IH

IL

HYS

LV_ OUT

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD=13V.

J

0.6 x
V

DD

— — V Recessive state

——0.4x

V

DD

— — 0.175 x

V

DD

7.3 — — mA VO=0.2xVDD, VDD=8V

16.5 — — VO=0.2xVDD, VDD= 18V

30.6 — — V

5—180µA

50 — 200 mA

——0.2x

V

DD

-1 — — mA Driver OFF,

— 12 20 µA Driver OFF,

-1 — 1 mA GND = VDD=12V,

——10µAVDD=0V,

0.475 x
V

DD

0.5 x
V

DD

0.525 x
V

DD

20K 30K 47K 

—25—ms

— 3.0 6.0 µs Propagation delay of receiver

-2 — +2 µs Symmetry of receiver

0—VDDV

0—5.0VV

0.60 — — V

——0.40VDDVDD=15V

——0.30V

—3.06.0µsNote 2

MCP8025/6

VDominant state

VVHI–V

V

VV

DDVDD

DD

LO

=0.251xVDD, VDD= 18V

O

=0V, VDD=12V

V

BUS

 V

V

BUS

7V < V
7V < V

0V < V

0V < V

BUS _CNT

DD

< 19V

BUS

<19V

DD

< 19V

BUS

< 19V

BUS

=(VHI–VLO)/2

propagation delay rising edge
w.r.t.falling edge

=15V

 2014 Microchip Technology Inc. DS20005339A-page 15

MCP8025/6

AC/DC CHARACTERISTICS (CONTINUED)

Electrical Specifications: Unless otherwise noted, T

Parameters Symbol Min. Typ. Max. Units Conditions

Maximum Communication

F

MAX

Frequency

Low-Voltage Output Sink

I

OL

Current (Open-Drain)

DE2 Communications

Baud Rate BAUD — 9600 — BPS

Power-Up Delay PU_DELAY — 1 — ms Time from rising V

DE2 Sink Current DE2

DE2 Message Response

DE2

iSINK

RSP

Time

DE2 Host Wait Time DE2

DE2 Message Receive

DE2

WAIT

RCVTOUT

Timeout

INTERNAL ROM (READ-ONLY MEMORY) DATA RETENTION

Cell High Temperature

HTOL — 1000 — Hours T

Operating Life

Cell Operating Life — 10 — Years T

Note 1: 1000 hour cumulative maximum for ROM data retention (typical).

2: Limits are by design, not production tested.

= -40°C to +150°C, typical values are for +25°C, VDD= 13V.

J

——20kHzNote 2

—1—mAV

OUT

 50 mV

to DE2 active

1——mAV

 50 mV, Note 2

DE2

0 µs Time from last received Stop bit

to Response Start bit, Note 2

3.125 — — ms Minimum Time For Host
To Wait For Response. Three
packets based on 9600 BAUD,

Note 2

— 5 — ms Time between message bytes

= 150°C (Note 1)

J

= 85°C

J

DD

 6V

TEMPERATURE SPECIFICATIONS

Parameters Sym. Min. Typ. Max. Units Conditions

Temperature Ranges (Note 1)

Specified Temperature Range T

Operating Temperature Range T

Storage Temperature Range T

A

A

T

J

A

Package Thermal ResistanceS

Thermal Resistance, 5 mm x 5 mm
40L-QFN

Thermal Resistance, 7 mm x 7 mm
48L-TQFP with Exposed Pad



JA



JC



JA



JC

Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable

junction temperature and the thermal resistance from junction to air (i.e., T
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum 160°C rating. Sustained junction temperatures above 160°C can impact the device reliability.

2: 1000 hour cumulative maximum for ROM data retention (typical).

-40 +150 °C

-40 +150 °C

-40 +160 °C

-55 +150 °C (Note 2)

— 37 — °C/W 4-Layer JC51-5 standard board,

—6.9—

natural convection

—30—°C/W

—15—

, TJ, JA). Exceeding the

A

DS20005339A-page 16  2014 Microchip Technology Inc.

MCP8025/6

ESD, SUSCEPTIBILITY, SURGE AND LATCH-UP TESTING

Parameter Standard and Test Condition Value

Input voltage surges ISO 16750-2 28V for 1 minute,

45V for 0.5 seconds

ESD according to IBEE LIN EMC
– Pins LIN_BUS, V

ESD HBM with 1.5 k/100 pF CEI/IEC 60749-26: 2006

ESD HBM with 1.5 k/100 pF
– Pins LIN_BUS, V
P

GND

ESD CDM (Charged Device Model,
field-induced method – replaces
machine-model method)

Latch-Up Susceptibility AEC Q100-004, 150°C > 100 mA

(HMM)

DD

, HV_IN1 against

DD

Test specification 1.0 following IEC
61000-4.2

AEC-Q100-002-Ref E
JEDEC JS-001-2012

CEI/IEC 60749-26: 2006
AEC-Q100-002-Ref E
JEDEC JS-001-2012

ESD-STM5.3.1-1999 ± 750V all pins

±8kV

±2kV

±8kV

 2014 Microchip Technology Inc. DS20005339A-page 17

MCP8025/6

NOTES:

DS20005339A-page 18  2014 Microchip Technology Inc.

MCP8025/6

-0.010

-0.008

-0.006

-0.004

-0.002

0.000

0.002

0.004

0.006

0.008

0.010

-45 -20 5 30 55 80 105 130

155

V

OUT

= 5V

V

OUT

= 12V

0.00

0.05

0.10

0.15

0.20

0.25

0.30

0.35

-45 -20 5 30 55 80 105 130

155

Load Regulation (%)

V

OUT

= 5V

V

OUT

= 12V

012345678910

iLIMIT_OUT

DE2

0 5 10 15 20 25 30 35 40 45 50

HSA

V

BA

20
15
10

5
0

25
20
15
10

5
0

VDD= 6V

100

105

110

115

120

125

130

135

140

145

150

7 1013161922252831

Current (mA)

5V LDO

12V LDO

-40

-20

0

20

40

60

80

100

120

140

0

3

6

9

12

15

18

0 20406080100

V

IN

(V)

VIN= 14V

VIN= 15V

V

OUT

(AC)

CIN= C

OUT

= 10 µF

I

OUT

= 20 mA

2.0 TYPICAL PERFORMANCE CURVES

Note: The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, T

= +25°C; Junction Temperature (TJ) is approximated by soaking the device under

A

test to an ambient temperature equal to the desired junction temperature. The test time is small enough such that the
rise in Junction temperature over the Ambient temperature is not significant.

Volts (V)

Line Regulation (%/V)

Temperature (°C)

FIGURE 2-1: LDO Line Regulation vs. Temperature.

FIGURE 2-4: Bootstrap Voltage @ 92% Duty Cycle.

Time (µs)

Temperature (°C)

FIGURE 2-2: LDO Load Regulation vs. Temperature.

FIGURE 2-3: I
Message Delay.

 2014 Microchip Technology Inc. DS20005339A-page 19

Time (µs)

LIMIT_OUT

Low to DE2

Voltage (V)

FIGURE 2-5: LDO Short Cir cuit Cur rent vs. Input Voltage.

(mV)

OUT

V

Time (µs)

FIGURE 2-6: 5V LDO Dynamic Linestep –
Rising V

DD

.

MCP8025/6

-40

-20

0

20

40

60

80

100

120

140

0

3

6

9

12

15

18

0 20406080100

V

IN

(V)

VIN= 15V

VIN= 14V

V

OUT

(AC)

CIN= C

OUT

= 10 µF

I

OUT

= 20 mA

-40

-20

0

20

40

60

80

100

120

140

0

3

6

9

12

15

18

0 20406080100

IN

VIN= 14V

VIN= 15V

V

OUT

(AC)

CIN= C

OUT

= 10 µF

I

OUT

= 20 mA

-40

-20

0

20

40

60

80

10

11

12

13

14

15

16

0 20406080100

IN

VIN= 15V

VIN= 14V

V

OUT

(AC)

CIN= C

OUT

= 10 µF

I

OUT

= 20 mA

-100

-80

-60

-40

-20

0

20

40

60

80

100

0.0 0.5 1.0 1.5 2.0 2.5

OUT

VIN= 14V
V

OUT

= 5V

C

IN

= C

OUT

= 10 µF

I

OUT

= 1 mA to 20 mA Pulse

20 mA

1 mA

-100

-80

-60

-40

-20

0

20

40

60

80

100

0.0 0.5 1.0 1.5 2.0 2.5

V

OUT

AC (mV)

1 mA

VIN= 14V
V

OUT

= 12V

C

IN

= C

OUT

= 10 µF

I

OUT

= 1 mA to 20 mA Pulse

20 mA

7.0

8.0

9.0

10.0

11.0

12.0

13.0

14.0

6 101418222630

V

OUT

(V)

V

OUT

= 12V

C

IN

= C

OUT

= 10 µF

I

OUT

= 20 mA

Charge Pump

Switch Point

Note: Unless otherwise indicated, T

= +25°C; Junction Temperature (TJ) is approximated by soaking the device under

A

test to an ambient temperature equal to the desired junction temperature. The test time is small enough such that the
rise in Junction temperature over the Ambient temperature is not significant.

(mV)

OUT

V

Time (µs)

FIGURE 2-7: 5V LDO Dynamic Linestep –
Falling V

(V)

V

DD

.

(mV)

OUT

V

AC (mV)

V

Time (ms)

FIGURE 2-10: 5V LDO Dynamic Loadstep.

Time (µs)

FIGURE 2-8: 12V LDO Dynamic Linestep
– Rising V

(V)

V

DD

.

Time (µs)

FIGURE 2-9: 12V LDO Dynamic Linestep
– Falling V

DS20005339A-page 20  2014 Microchip Technology Inc.

.

DD

(mV)

OUT

V

Time (ms)

FIGURE 2-11: 12V LDO Dynamic Loadstep.

VIN(V)

FIGURE 2-12: 12V LDO Output Voltage vs. Rising Input Voltage.

MCP8025/6

0

200

400

600

800

1000

-45 -20 5 30 55 80 105 130 155

CE Low

CE High

0

200

400

600

800

1000

1200

-45 -20 5 30 55 80 105 130 155

CE Low

CE High

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

Dead Time

PWMxH

PWMxL

Dead Time

10

12

14

16

18

20

22

24

-45 -20 5 30 55 80 105 130 155

R

DSON

(

Ω

)

Low-Side

Note: Unless otherwise indicated, T

= +25°C; Junction Temperature (TJ) is approximated by soaking the device under

A

test to an ambient temperature equal to the desired junction temperature. The test time is small enough such that the
rise in Junction temperature over the Ambient temperature is not significant.

1200

High-Side

Quiescent Current (µA)

Temperature (°C)

FIGURE 2-13: Quiescent Current vs. Temperature (MCP8025).

FIGURE 2-16: Driver R
Temperature.

Temperature(°C)

DSON

vs.

Quiescent Current (µA)

Temperature (°C)

FIGURE 2-14: Quiescent Current vs. Temperature (MCP8026).

Time (µs)

FIGURE 2-15: 500 ns PWM Dead Time Injection.

 2014 Microchip Technology Inc. DS20005339A-page 21