Datasheet MCP4802, MCP4812, MCP4822 Datasheet
MCP4802/4812/4822
MCP48X2
8-Pin PDIP, SOIC, MSOP
1
2
3
4
8
7
6
5
CS
SCK
SDI
V
DD
V
SS
V
OUTA
V
OUTB
LDAC
MCP4802: 8-bit dual DAC
MCP4812: 10-bit dual DAC
MCP4822: 12-bit dual DAC
8/10/12-Bit Dual Voltage Out put Digital-to-Analog Converter
with Internal V
and SPI Interface
REF
Features
• MCP4802: Dual 8-Bit Voltage Output DAC
• MCP4812: Dual 10-Bit Voltage Output DAC
• MCP4822: Dual 12-Bit Voltage Output DAC
• Rail-to-Rail Output
• SPI Interface with 20 MHz Clock Support
• Simultaneous Latching of the Dual DACs
with LDAC pin
• Fast Settling Time of 4.5 µs
• Selectable Unity or 2x Gain Ou tput
• 2.048V Internal Voltage Reference
•50ppm/°C V
• 2.7V to 5.5V Single-Supply Operation
• Extended Temperature Range: -40°C to +125°C
Temperature Coefficient
REF
Applications
• Set Point or Offset Trimming
• Sensor Calibration
• Precision Selectable Voltage Reference
• Portable Instrument ati on (Batte ry-Po w ered )
• Calibration of Optical Communication Devices
DAC
(1)
No. of
Channels
Related Products
P/N
MCP4801 8 1
MCP4811 10 1
MCP4821 12 1
MCP4802 8 2
MCP4812 10 2
MCP4822 12 2
MCP4901 8 1
MCP4911 10 1
MCP4921 12 1
MCP4902 8 2
MCP4912 10 2
MCP4922 12 2
Note 1: The products listed here have similar
Resolution
AC/DC performances.
Voltage
Reference
)
(V
REF
Internal
(2.048V)
External
Description
The MCP4802/4812/4822 devices are dual 8-bit, 10-bit
and 12-bit buffered voltage output Digital-to-Analog
Converters (DACs), respectively. The devices operate
from a single 2.7V to 5.5V supply with SPI compatible
Serial Peripheral Interface.
The devices have a high precision internal voltage
reference (V
full-scale range of the device to be 2.048V or 4.096V by
setting the Gain Selection Option bit (gain of 1 of 2).
Each DAC channel can be operated in Active or
Shutdown mode individually by setting the Configuration
register bits. In Shutdown mode, most of the internal
circuits in the shutdown channel are turned off for power
savings and the output amplifier is configured to present
a known high resistance output load (500 k typical.
The devices include double-buffered registers,
allowing synchronous updates of two DAC outputs
using the LDAC
Power-on Reset (POR) circuit to ensure reliable powerup.
The devices utilize a r esistive string arc hitecture , with
its inherent advantages of low DNL error, low ratio
metric temperature coefficient and fast settling time.
These devices are specified over the extended
temperature range (+125°C).
The devices provide high accuracy and low noise
performance for consumer and industrial applications
where calibration or compensation of signals (such as
temperature, pressure and humidity) are required.
The MCP4802/4812/4822 devices are available in the
PDIP, SOIC and MSOP packages.
= 2.048V). The user can configure the
REF
pin. These devices also incorporate a
Package Types
2010-2015 Microchip Technology Inc. DS20002249B-page 1
MCP4802/4812/4822
Op Amps
V
DD
V
SS
CS SDI SCK
Interface Logic
Input
Register A
Register B
Input
DAC
A
Register Register
DAC
B
String
DAC
B
String
DAC
A
Output
Power-on
Reset
V
OUTA
V
OUTB
LDAC
Output
Gain
Logic
Gain
Logic
2.048V
V
REF
Logic
Block Diagram
DS20002249B-page 2 2010-2015 Microchip Technology Inc.
MCP4802/4812/4822
1.0 ELECTRICAL CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at tho se or any oth er conditions ab ove those
Absolute Maximum Ratings †
VDD....................................................................... 6.5V
All inputs and outputs ..........V
– 0.3V to V
SS
DD
+ 0.3V
indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
Current at Input Pins .........................................±2 mA
Current at Supply Pins ....................................±50 mA
Current at Output Pins ....................................±25 mA
Storage temperature ..........................-65°C to +150°C
Ambient temp. with power applied.....-55°C to +125°C
ESD protection on all pins 4 kV (HBM), 400V (MM)
Maximum Junction Temperature (T
)................+150°C
J
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, V
Output Buffer Gain (G) = 2x, R
Parameters Sym Min Typ Max Units Conditions
Power Requirements
Input Voltage V
Input Current I
Software Shutdown Current I
Power-on Reset Threshold V
DC Accuracy
MCP4802
Resolution n 8 — — Bits
INL Error INL -1 ±0.125 1 LSb
DNL DNL -0.5 ±0.1 +0.5 LSb Note 1
MCP4812
Resolution n 10 — — Bits
INL Error INL -3.5 ± 0.5 3.5 LSb
DNL DNL -0.5 ±0.1 +0.5 LSb Note 1
MCP4822
Resolution n 12 — — Bits
INL Error INL -12 ±2 12 LSb
DNL DNL -0.75 ±0.2 +0.75 LSb Note 1
Offset Error V
Offset Error Temperature
Coefficient
Gain Error g
Gain Error Temperature
Coefficient
Note 1: Guaranteed monotonic by des ign over all codes.
2: This parameter is ensured by design, and not 100% tested.
= 5 k to GND, CL = 100 pF, TA = -40 to +85°C. Typical values are at +25°C.
L
DD
DD
SHDN_SW
POR
OS
V
OS
2.7 — 5.5 V
— 4 15 750 µA All digital inputs are grounded,
—3.3 6 µA
—2.0 — V
-1 ±0.02 1 % of FSR Code = 0x000h
/°C — 0.16 — ppm/°C -45°C to +25°C
— -0.44 — ppm/°C +25°C to +85°C
E
-2 -0.10 2 % of FSR Code = 0xFFFh,
G/°C — -3 — ppm/°C
= 2.048V,
REF
all analog outputs (V
OUT
unloaded. Code = 0x000h
not including offset error
) are
2010-2015 Microchip Technology Inc. DS20002249B-page 3
MCP4802/4812/4822
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, VDD = 5V, VSS = 0V, V
Output Buffer Gain (G) = 2x, R
= 5 k to GND, CL = 100 pF, TA = -40 to +85°C. Typical values are at +25°C.
L
Parameters Sym Min Typ Max Units Conditions
Internal Voltage Reference (V
Internal Reference V o lt a ge V
Temperature Coefficient
(Note 2)
)
REF
2.008 2.048 2.088 V V
/°C — 125 325 ppm/°C -40°C to 0°C
V
REF
REF
— 0.25 0.65 LSb/°C -40°C to 0°C
— 45 160 ppm/°C 0°C to +85°C
— 0.09 0.32 LSb/°C 0°C to +85°C
Output Noise (V
Noise) E
REF
NREF
—290 —µV
(0.1-
10 Hz)
Output Noise Density e
NREF
—1.2 —µV/Hz Code = 0xFFFh, G = 1x
(1 kHz)
e
NREF
—1.0 —µV/Hz Code = 0xFFFh, G = 1x
(10 kHz)
1/f Corner Frequency f
CORNER
—400 — Hz
Output Amplifier
Output Swing V
OUT
— 0.01 to
– 0.04
V
DD
— V Accuracy is better than 1LSb for
Phase Margin PM — 66 — Degree
Slew Rate SR — 0.55 — V/µs
Short Circuit Current I
Settling Time t
SETTLING
SC
—1524mA
— 4.5 — µs Within 1/2 LSb of final value from
Dynamic Performance (Note 2)
DAC-to-DAC Crosstalk — <10 — nV-s
Major Code Transition Glitch — 45 — nV-s 1 LSb change around major carry
Digital Feedthrough — <10 — nV-s
Analog Crosstalk — <10 — nV-s
Note 1: Guaranteed monotonic by des ign over all codes.
2: This parameter is ensured by design, and not 100% tested.
= 2.048V,
REF
(°)
when G = 1x and
OUTA
Code = 0xFFFh
Code = 0xFFFh, G = 1x
p-p
V
= 10 mV to (VDD–40 mV)
OUT
= 400 pF, RL =
C
L
1/4 to 3/4 full-scale range
(0111...1111 to
1000...0000)
DS20002249B-page 4 2010-2015 Microchip Technology Inc.
MCP4802/4812/4822
ELECTRICAL CHARACTERISTIC WITH EXTE NDED TEMPERATURE
Electrical Specifications: Unless otherwise indicated, V
= 5 k to GND, CL = 100 pF. Typical values are at +125°C by characterization or simulation.
R
L
Parameters Sym Min Typ Max Units Conditions
Power Requirements
Input Voltage V
Input Current
DD
I
DD
2.7 — 5.5 V
Input Curren
Software Shutdown Curren t I
Power-On Reset threshold V
SHDN_SW
POR
DC Accuracy
MCP4802
Resolution n 8 — — Bits
INL Error INL — ±0.25 — LSb
DNL DNL — ±0.2 — LSb Note 1
MCP4812
Resolution n 10 — — Bits
INL Error INL — ±1 — LSb
DNL DNL — ±0.2 — LSb Note 1
MCP4822
Resolution n 12 — — Bits
INL Error INL — ±4 — LSb
DNL DNL — ±0.25 — LSb Note 1
Offset Error V
Offset Error Temperature
OS
VOS/°C — -5 — ppm/°C +25°C to +125°C
Coefficient
Gain Error g
Gain Error Temperature
E
G/°C — -3 — ppm/°C
Coefficient
Internal Voltage Reference (V
Internal Reference V o lt a ge V
Temperature Coefficient
)
REF
REF
V
/°C — 125 — ppm/°C -40°C to 0°C
REF
(Note 2)
Output Noise (V
Noise) E
REF
NREF
(0.1 – 10 Hz)
Output Noise Density e
NREF
(1 kHz)
e
NREF
(10 kHz)
1/f Corner Frequency f
CORNER
Note 1: Guaranteed monotonic by des ign over all codes.
2: This parameter is ensured by design, and not 100% tested.
DD
= 5V, V
SS
= 0V, V
= 2.048V, Output Buffer Gain (G) = 2x,
REF
— 440 — µA All digital inputs are grounded,
all analog outputs (V
unloaded. Code = 0x000h.
—5—µA
—1.85— V
— ±0.02 — % of FSR Code = 0x000h
— -0.10 — % of FSR Code = 0xFFFh,
not including offset error
— 2.048 — V V
when G = 1x and
OUTA
Code = 0xFFFh
— 0.25 — LSb/°C -40°C to 0°C
— 45 — ppm/°C 0°C to +85°C
— 0.09 — LSb/°C 0°C to +85°C
— 290 — µV
—1.2—µV/
—1.0—µV/
Code = 0xFFFh, G = 1x
p-p
Hz Code = 0xFFFh, G = 1x
Hz Code = 0xFFFh, G = 1x
— 400 — Hz
OUT
) are
2010-2015 Microchip Technology Inc. DS20002249B-page 5
MCP4802/4812/4822
ELECTRICAL CHARACTERISTIC WITH EXTE NDED TEMPERATURE (CONTINUED)
Electrical Specifications: Unless otherwise indicated, V
= 5 k to GND, CL = 100 pF. Typical values are at +125°C by characterization or simulation.
R
L
Parameters Sym Min Typ Max Units Conditions
Output Amplifier
Output Swing V
OUT
Phase Margin PM — 66 — Degree (°) C
Slew Rate SR — 0.55 — V/µs
Short Circuit Current I
Settling Time t
SC
SETTLING
Dynamic Performance (Note 2)
DAC-to-DAC Crosstalk — <10 — nV-s
Major Code Transition
Glitch
Digital Feedthrough — <10 — nV-s
Analog Crosstalk — <10 — nV-s
Note 1: Guaranteed monotonic by des ign over all codes.
2: This parameter is ensured by design, and not 100% tested.
= 5V, V
DD
— 0.01 to
V
DD
SS
– 0.04
= 0V, V
= 2.048V, Output Buffer Gain (G) = 2x,
REF
— V Accuracy is better than 1 LSb
for
V
= 10 mV to (VDD –
OUT
40 mV)
= 400 pF, RL =
L
—17—mA
— 4.5 — µs Within 1/2 LSb of final value
from 1/4 to 3/4 full-scale ra nge
— 45 — nV-s 1 LSb change around major
carry (0111...1111 to
1000...0000)
AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS)
Electrical Specifications: Unless otherwise indicated, V
Typical values are at +25°C.
Parameters Sym Min Typ Max Units Conditions
Schmitt Trigger High-Level
V
0.7 V
IH
DD
Input Voltage
(All digital input pins)
Schmitt Trigger Low-Level
V
IL
——0.2VDDV
Input Voltage
(All digital input pins)
Hysteresis of Schmitt Trigger
V
HYS
—0.05VDD—V
Inputs
Input Leakage Current I
LEAKAGE
Digital Pin Capacitance
(All inputs/outputs)
C
Clock Frequency F
Clock High Time t
Clock Low Time t
Fall to First Rising CLK
CS
t
CIN,
OUT
CLK
HI
LO
CSSR
-1 — 1 ALDAC = CS = SDI = SCK =
—10—pFV
——20MHzT
15 — — ns Note 1
15 — — ns Note 1
40 — — ns Applies only when CS falls with
Edge
Data Input Setup Time t
Data Input Hold Time t
SCK Rise to CS
Rise Hold
SU
HD
t
CHS
15 — — ns Note 1
10 — — ns Note 1
15 — — ns Note 1
Time
Note 1: This parameter is ensured by design and not 100% tested.
= 2.7V – 5.5V, TA= -40 to +125°C.
DD
——V
V
or V
DD
SS
= 5.0V, TA = +25°C,
DD
= 1 MHz (Note 1)
f
CLK
= +25°C (Note 1)
A
CLK high. (Note 1)
DS20002249B-page 6 2010-2015 Microchip Technology Inc.
MCP4802/4812/4822
CS
SCK
SDI
LDAC
t
CSSR
t
HD
t
SU
t
LO
t
CSH
t
CHS
LSb in
MSb in
t
IDLE
Mode 1,1
Mode 0,0
t
HI
t
LD
t
LS
AC CHARACTERISTICS (SPI TIMING SPECIFICATIONS)
Electrical Specifications: Unless otherwise indicated, V
Typical values are at +25°C.
Parameters Sym Min Typ Max Units Conditions
CS High Time t
LDAC Pulse Width t
Setup Time t
LDAC
SCK Idle Time before CS Fal l t
CSH
LD
LS
IDLE
15 — — ns Note 1
100 — — ns Note 1
40 — — ns Note 1
40 — — ns Note 1
Note 1: This parameter is ensured by design and not 100% tested.
= 2.7V – 5.5V, TA= -40 to +125°C.
DD
FIGURE 1-1: SPI Input Timing Data.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD= +2.7V to +5.5V, VSS= GND.
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Specified Temperature Range T
Operating Temperature Range T
Storage Temperature Range T
Thermal Package Resistances
Thermal Resistance, 8L-MSOP
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Note 1: The MCP4802/4812/4822 devices operate over this extended temperature range, but with reduced
performance. Operation in this range must not cause T
of +150°C.
JA
JA
JA
A
A
A
-40 — +125 °C
-40 — +125 °C Note 1
-65 — +150 °C
—211—°C/W
—90—°C/W
—150—°C/W
to exceed the maximum junction temperature
J
2010-2015 Microchip Technology Inc. DS20002249B-page 7
MCP4802/4812/4822
NOTES:
DS20002249B-page 8 2010-2015 Microchip Technology Inc.
MCP4802/4812/4822
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0 1024 2048 3072 4096
Code (Decimal)
DNL (L SB)
-0.2
-0.1
0
0.1
0.2
0 1024 2048 3072 4096
Code (Decimal)
DNL (LSB)
125C 85C 25C
0.075
0.0752
0.0754
0.0756
0.0758
0.076
0.0762
0.0764
0.0766
-40-200 20406080100120
Ambient Temperature (ºC)
Absolute DNL (LSB)
-5
-4
-3
-2
-1
0
1
2
3
4
5
0 1024 2048 3072 4096
Code (Decimal)
INL (LSB)
125C 85 25
Ambient Temperat ure
0
0.5
1
1.5
2
2.5
-40 -20 0 20 40 60 80 100 120
Ambient Temperature (ºC)
Absolute IN L (LS B)
-6
-4
-2
0
2
0 1024 2048 3072 4096
Code (Decimal )
INL (LSB)
2.0 TYPICAL PERFORMANCE CURVES
Note: The graphs and table s prov ided following this note are a st a tis tic al s umm ary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise in dic ate d, TA = +25°C, VDD = 5V, VSS = 0V, V
FIGURE 2-1: DNL vs. Code (MCP4822).
FIGURE 2-4: INL vs. Code and
Temperature (MCP4822).
= 2.048V, Gain = 2x, RL = 5 k, CL = 100 pF.
REF
FIGURE 2-2: DNL vs. Code and Temperature (MCP4822).
FIGURE 2-3: Absolute DNL vs. Temperature (MCP4822).
2010-2015 Microchip Technology Inc. DS20002249B-page 9
FIGURE 2-5: Absolute INL vs. Temperature (MCP4822).
FIGURE 2-6: INL vs. Code (MCP4822 ).
Note: Single device graph for illustration of 64
code effect.
MCP4802/4812/4822
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0 128 256 384 512 640 768 896 1024
Code
DNL (LSB)
- 40oC
+25oC to +125oC
-3
-2.5
-2
-1.5
-1
-0.5
0
0.5
1
1.5
0 128 256 384 512 640 768 896 1024
INL (LSB)
25oC
85oC
125oC
- 40oC
-0.15
-0.1
-0.05
0
0.05
0.1
0.15
0 32 64 96 128 160 192 224 256
Code
DNL (LSB)
34
Temperature: - 40oC to +125
o
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
0.6
0 326496128160192224256
Code
INL (LSB)
-
o
C
25oC
85oC
125oC
2.040
2.041
2.042
2.043
2.044
2.045
2.046
2.047
2.048
2.049
2.050
-40 -20 0 20 40 60 80 100 120
Ambient Temperature (°C)
Full Scale V
OUT
(V)
VDD: 4V
VDD: 3V
VDD: 2.7V
4.076
4.080
4.084
4.088
4.092
4.096
4.100
-40 -20 0 20 40 60 80 100 120
Ambient Temperature (°C)
Full Scal e V
OUT
(V)
VDD: 5.5V
VDD: 5V
Note: Unless otherwise in dic ate d, TA = +25°C, VDD = 5V, VSS = 0V, V
FIGURE 2-7: DNL vs. Code and Temperature (MCP4812).
FIGURE 2-10: INL vs. Code and Temperature (MCP4802).
= 2.048V, Gain = 2x, RL = 5 k, CL = 100 pF.
REF
40
Code
FIGURE 2-8: INL vs. Code and
FIGURE 2-11: Full-Scale V
Ambient Temperature and V
DD
vs.
OUTA
. Gain = 1x.
Temperature (MCP4812).
C
FIGURE 2-9: DNL vs. Code and Temperature (MCP4802).
DS20002249B-page 10 2010-2015 Microchip Technology Inc.
FIGURE 2-12: Full-Scale V
Ambient Temperature and V
DD
vs.
OUTA
. Gain = 2x.
MCP4802/4812/4822
1.E-07
1.E-06
1.E-05
1.E-04
1E-1 1E+0 1E+1 1E+2 1E+3 1E+4 1E+5
Frequency (Hz)
Output Noise Voltage Densit y
(µV/
Hz)
1 10 100 1k 10k 100k
100
10
1
0.1
1.E-05
1.E-04
1.E-03
1.E-02
1E+2 1E+3 1E+4 1E+5 1E+6
Bandwidth (Hz)
Output Noise Voltage (mV)
100 1k 10k 100k 1M
Eni (in V
RMS
)
10.0
1.00
0.10
0.01
Eni (in V
P-P
)
Maximum Measurement Time = 10s
180
200
220
240
260
280
300
320
340
-40-200 20406080100120
Ambien t Te mp e r at ure (°C)
I
DD
(µA)
V
DD
5.5V
4.0V
5.0V
3.0V
2.7V
0
5
10
15
20
25
380
385
390
395
400
405
410
415
420
425
430
435
440
IDD (µA)
Occurrence
0
2
4
6
8
10
12
14
16
18
20
22
385
390
395
400
405
410
415
420
425
430
435
IDD (µA)
Occurrence
Note: Unless otherwise in dic ate d, TA = +25°C, VDD = 5V, VSS = 0V, V
0.1
FIGURE 2-13: Output Noise Voltage
Density (V
Noise Density) vs. Frequency.
REF
FIGURE 2-16: IDD Histogram (VDD = 2.7V).
Gain = 1x.
= 2.048V, Gain = 2x, RL = 5 k, CL = 100 pF.
REF
FIGURE 2-14: Output Noise Voltage
(V
Noise Voltage) vs. Bandwidth. Gain = 1x.
REF
FIGURE 2-15:
2010-2015 Microchip Technology Inc. DS20002249B-page 11
IDD vs. Temperature and VDD.
FIGURE 2-17: I
Histogram (VDD = 5.0V).
DD
MCP4802/4812/4822
1
1.5
2
2.5
3
3.5
4
-40-20 0 20406080100120
Ambient Temperature (ºC)
I
SHDN_SW
(µA)
V
DD
5.5V
4.0V
5.0V
3.0V
2.7V
-0.03
-0.01
0.01
0.03
0.05
0.07
0.09
0.11
-40 -20 0 20 40 60 80 100 120
Ambien t Te m p er at u re ( ºC)
Offset Error (%)
V
DD
5.5V
5.0V
3.0V
2.7V
-0.5
-0.45
-0.4
-0.35
-0.3
-0.25
-0.2
-0.15
-0.1
-0.05
-40 -20 0 20 40 60 80 100 120
Ambient Te m pe r at ure (ºC)
Gain Error (%)
V
DD
5.5V
4.0V
5.0V
3.0V
2.7V
1
1.5
2
2.5
3
3.5
4
-40-200 20406080100120
Ambient Temperature (ºC)
V
IN
Hi Threshold (V)
V
DD
5.5V
4.0V
5.0V
3.0V
2.7V
0.8
0.9
1
1.1
1.2
1.3
1.4
1.5
1.6
-40 -20 0 20 40 60 80 100 120
Ambient Temperature (ºC)
V
IN
Low Threshold (V)
V
DD
5.5V
4.0V
5.0V
3.0V
2.7V
Note: Unless otherwise in dic ate d, TA = +25°C, VDD = 5V, VSS = 0V, V
FIGURE 2-18: Software Shutdown Current
vs. Temperature and V
DD
.
FIGURE 2-21: V
Temperature and V
= 2.048V, Gain = 2x, RL = 5 k, CL = 100 pF.
REF
High Threshold vs.
IN
.
DD
FIGURE 2-19: Offset Error vs. Temperature
DD
.
and V
FIGURE 2-20: Gain Error vs. Temperature
and V
DS20002249B-page 12 2010-2015 Microchip Technology Inc.
DD
.
4.0V
FIGURE 2-22: V
Temperature and V
Low Threshold vs.
IN
.
DD
MCP4802/4812/4822
0
0.25
0.5
0.75
1
1.25
1.5
1.75
2
2.25
2.5
-40-200 20406080100120
Ambient Temperature (ºC)
V
IN
_
SPI
Hysteresis (V)
V
DD
5.5V
4.0V
5.0V
3.0V
2.7V
0.015
0.017
0.019
0.021
0.023
0.025
0.027
0.029
0.031
0.033
0.035
-40-200 20406080100120
Ambient Temperature (ºC)
V
OUT_HI
Limi t ( V
DD
-Y)(V)
V
DD
3.0V
2.7V
0.0010
0.0012
0.0014
0.0016
0.0018
0.0020
0.0022
0.0024
0.0026
0.0028
-40-200 20406080100120
Ambient Temperature (ºC)
V
OUT_LOW
Limit (Y-AV
SS
)(V)
V
DD
5.5V
4.0V
5.0V
3.0V
2.7V
10
11
12
13
14
15
16
-40 -20 0 20 40 60 80 100 120
Ambient Temperature (ºC)
I
OUT_HI_SHORTED
(mA)
V
DD
4
3
2
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0246810121416
I
OUT
(mA)
V
OUT
(V)
V
REF
= 4.096V
Output Shorted to V
SS
Output Shorted to V
DD
Note: Unless otherwise in dic ate d, TA = +25°C, VDD = 5V, VSS = 0V, V
FIGURE 2-23: Input Hysteresis vs.
Temperature and V
DD
.
4.0V
FIGURE 2-26: I
Temperature and V
= 2.048V, Gain = 2x, RL = 5 k, CL = 100 pF.
REF
High Short vs.
OUT
.
DD
5.5V
5.0V
.0V
.0V
.7V
FIGURE 2-24: V
vs.Temperature and V
FIGURE 2-25: V
Temperature and V
2010-2015 Microchip Technology Inc. DS20002249B-page 13
DD
OUT
DD
OUT
.
.
High Limit
Low Limit vs.
FIGURE 2-27: I
OUT
vs. V
. Gain = 2x.
OUT
MCP4802/4812/4822
V
OUT
SCK
LDAC
Time (1 µs/div)
V
OUT
SCK
LDAC
Time (1 µs/div)
V
OUT
SCK
LDAC
Time (1 µs/div)
Time (1 µs/div)
V
OUT
LDAC
Time (1 µs/div)
V
OUT
SCK
LDAC
Ripple Rejection (dB)
Frequency (Hz)
Note: Unless otherwise in dic ate d, TA = +25°C, VDD = 5V, VSS = 0V, V
FIGURE 2-28: V
Rise Time.
OUT
FIGURE 2-31: V
= 2.048V, Gain = 2x, RL = 5 k, CL = 100 pF.
REF
Rise Time.
OUT
FIGURE 2-29: V
Fall Time.
OUT
FIGURE 2-32: V
Rise Time Exit
OUT
Shutdown.
FIGURE 2-30: V
DS20002249B-page 14 2010-2015 Microchip Technology Inc.
Rise Time.
OUT
FIGURE 2-33: PSRR vs. Frequency.
MCP4802/4812/4822
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE FOR MCP4802/4812/4822
MCP4802/4812/4822
MSOP, PDIP, SOIC
1V
2CSChip Select Input
3 SCK Serial Clock Input
4 SDI Serial Data Input
5LDAC
6V
7V
8V
Symbol Description
DD
Supply Voltage Input (2.7V to 5.5V)
Synchronization Input. This pin is used to transfer DAC settings
(Input Registers) to the output registers (V
OUTB
SS
OUTA
DACB Output
Ground reference point for all circuitry on the device
DACA Output
OUT
)
3.1 Supply Volt age Pins (V
DD, VSS
)
VDD is the po siti ve sup ply v oltage input pin. The i nput
supply voltage is relative to V
2.7V to 5.5V. The power supply at the V
and can range from
SS
pin should
DD
be as clean as possible for a good DAC performance.
It is recommended to use an appropriate bypass
capacitor of about 0.1 µF (ceramic) to ground. An
additional 10 µF capacitor (tantalum) in parallel is also
recommended to further attenuate high-frequency
noise present in application boards.
is the analog ground pin and the current return path
V
SS
of the device. The user must connect the V
pin to a
SS
ground plane through a low-impedance connection. If
an analog ground path is available in the application
Printed Circuit Board (PCB), it is highly recommended
that the VSS pin be tied to the analog ground path or
isolated within an analog ground plane of the circuit
board.
3.2 Chip Select (CS)
CS is the Chip Select input pin, which requires an
active-low to enable serial clock and data functions.
3.3 Serial Clock Input (SCK)
3.4 Serial Data Input (SDI)
SDI is the SPI compatible serial data input pin.
3.5 Latch DAC Input (LDAC)
LDAC (latch DAC sync hro ni z at i on i npu t ) pi n is us ed to
transfer the input latch registers to their corresponding
DAC registers (output latches, V
low, both V
OUTA
and V
are updated at the same
OUTB
time with t heir input regi ster c onten ts. This pin can be
tied to low (VSS) if the V
rising edge of the CS
OUT
pin. This pin can be driven by an
external control device such as an MCU I/O pin.
3.6 Analog Outputs (V
V
is the DAC A output pin, and V
OUTA
B output pin. Each output has its own output amplifier.
The full-scale range of the DAC output is from
to G* V
V
SS
(1x or 2x). The DAC analog output cannot go higher
than the supply voltag e (V
, where G is the gain selection option
REF
DD
). When this pin is
OUT
update is desired at the
OUTA
, V
OUTB
)
OUTB
is the DAC
).
SCK is the SPI compatible serial clock input pin.
2010-2015 Microchip Technology Inc. DS20002249B-page 15
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