Datasheet MCM69D618TQ8, MCM69D618TQ8R, MCM69D618TQ6, MCM69D618TQ6R Datasheet (Motorola)

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Page 1

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order this document

by MCM69D618/D

64K x 18 Bit Synchronous Dual I/O, Dual Address SRAM

The MCM69D618 is a 1M–bit static random access memory , organized as 64K words of 18 bits. It features common data input and data output buffers and incorporates input and output registers on–board with high speed SRAM.

The MCM69D618 allows the user to concurrently perform reads, writes, or pass–through cycles in combination on the two data ports. The two address ports (AX, AY) determine the read or write locations for their respective data ports (DQX, DQY).

The synchronous design allows for precise cycle control with the use of an external single clock (K). All signal pins except output enables (GX registered on the rising edge of clock (K).

The pass–through feature allows data to be passed from one port to the other, in either direction. The PTX port Y. The PTY operation takes precedence over a read operation.

For the case when AX and A Y are the same, certain protocols are followed. If both ports are read, the reads occur normally . If one port is written and the other is read, the read from the array will occur before the data is written. If both ports are written, only the data on DQY will be written to the array .

• Single 3.3 V ± 5% Power Supply

• Fast Access Times: 6/8 ns Max

• Throughput of 1.49 Gigabits/Second

• Single Clock Operation

• Address, Data Input, E1

On–Chip

• 83 MHz Maximum Clock Frequency

• Self Timed Write

• Two Bi–Directional Data Buses

• Can be Configured as Separate I/O

• Pass–Through Feature

• Asynchronous Output Enables (GX

• L VTTL Compatible I/O

• Concurrent Reads and Writes

• 100–Pin TQFP Package

Suggested Applications

— A TM — Ethernet Switches — Routers — Cell/Frame Buffers — SNA Switches — Shared Memory

will likewise pass data from port Y to port X. A pass–through

input must be asserted to pass data from port X to

, E2, PTX, PTY, WX, WY, and Data Output Registers

, GY)

, GY) are

MCM69D618

TQ PACKAGE

100 LEAD TQFP

CASE 983A–01

Product Family Configurations

Part

Number

MCM69D536 MCM69D618 MCM67Q709A MCM67Q909

NOTES:

1. Tie AX and AY address ports together for the part to function as a single address part.

2. Tie GX

REV 5 1/16/98

 Motorola, Inc. 1998

MOTOROLA FAST SRAM

high for DQX to be inputs and tie WY high and GY low for DQY to be outputs.

Dual

Address

n n

Single

Address

Note 1 Note 1

n n n n

Dual

I/O

n n

Separate

I/O

Note 2 32K x 36 3.3 V Note 2 64K x 18 3.3 V

Configuration V

128K x 9 5.0 V 512K x 9 5.0 V

MCM69D618

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BLOCK DIAGRAM

PTX

E1 E2

ENABLE

REG 1

ENABLE

REG 2

ADDRESS

WRITE X

PTX

WRITE

DRIVER

DATA IN

64K x 18 ARRAY

SENSE

AMPS

PASS–THROUGH

OUTPUT

DQX

SENSE

AMPS

OUTPUT

DQY

WRITE

DRIVER

DATA IN

ADDRESS

WRITE Y

PTY

MCM69D618 2

MOTOROLA FAST SRAM

Page 3

PIN ASSIGNMENT

SS DQX9 DQY9

DQX10 DQY10

DQX11 DQY11 DQX12 DQY12

DQY13 DQX13 DQY14 DQX14

DQY15 DQX15

DQY16 DQX16

DQY17 DQX17

AY5

AX5

AX6

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

31 32 33

AY6

AX7

AY7

VSSV

94 9397 96 95 89 8892 91 90 86 8587100 99 98 81828384

37 3834 35 36 42 4339 40 41 45 4644

PTY

PTX

AX8

AY8

AX9

AY9

AX15

77 76

72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51

AY15 V

DD DQX8 DQY8

DQX7 DQY7

SS V

DD DQX6

DQY6 DQX5

DQY5 V

SS V

DD DQY4 DQX4

DQY3 DQX3 V

SS V

DD DQY2

DQX2 DQY1 DQX1

SS V

DD DQY0

DQX0 AY14

75 74 73

50494847

AY1

AX4

AY3

AX3

AY4

AY2

AX2

AX1

AY0

AX0

AX10

AY10

AY11

AX11

AX12

AY12

AY13

AX13

AX14

MOTOROLA FAST SRAM

MCM69D618

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PIN DESCRIPTIONS

Pin Locations Symbol

40, 38, 36, 34, 32, 30, 100, 98, 85,

83, 42, 44, 46, 48, 50, 81

39, 37, 35, 33, 31, 29, 99, 97, 84, 82,

43, 45, 47, 49, 51, 80

52, 56, 58, 62, 64, 69, 71, 75, 77,

3, 5, 9, 11, 16, 18, 22, 24, 28

53, 57, 59, 63, 65, 68, 70, 74, 76,

4, 6, 10, 12, 15, 17, 21, 23, 27

90 E1 Input Synchronous Chip Enable: Active low. 91 E2 Input Synchronous Chip Enable: Active high. 92 GX Input Asynchronous Output Enable Port X Input:

93 GY Input Asynchronous Output Enable Port Y Input:

96 K Input Clock: This signal registers the address, data in, and all control signals

86 PTX Input Pass–Through Port X. 87 PTY Input Pass–Through Port Y. 88 WX Input Synchronous Write Enable Port X. 89 WY Input Synchronous Write Enable Port Y.

1, 7, 13, 19, 25, 41, 54, 60, 66, 72, 78, 95 V

2, 8, 14, 20, 26, 55, 61, 67, 73, 79, 94 V

AX0 –

AX15

AY0 –

AY15

DQX0 –

DQX17

DQY0 –

DQY17

DD SS

Type Description

Input Address Port X. Never allow floating addresses for inputs AX0 – AX15.

Input Address Port Y. Never allow floating addresses for inputs AY0 – AY15.

Supply + 3.3 V Power Supply. Supply Ground.

A pullup resistor is needed.

I/O Data Input/Output Port X.

I/O Data Input/Output Port Y.

Low — enables output buffers (DQXx pins). High — DQXx pins are high impedance.

Low — enables output buffers (DQYx pins). High — DQYx pins are high impedance.

except G

MCM69D618 4

MOTOROLA FAST SRAM

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TRUTH TABLE (See Notes 1 through 5)

Input at tn Clock

Operation Number

1 H X X X X X Deselected 2 X L X X X X Deselected 3 L H 0 X X X Write X Port 4 L H X 0 X X Write Y Port 5 L H X X 0 X Pass–Through X to Y 6 L H X X X 0 Pass–Through Y to X 7 L H 1 X 1 1 Read X 8 L H X 1 1 1 Read Y

NOTES:

1. GX

/GY must be controlled to avoid bus contention issues during write and pass–through cycles.

2. Operation numbers 3 – 6 can be used in any combination.

3. Operation numbers 4 and 7, 3 and 8, 7 and 8 can be combined.

4. Operation number 5 can not be combined with operation number 7 or 8 because pass–through takes precedence over a read operation.

5. Operation number 6 can not be combined with operation number 7 or 8 because pass–through takes precedence over a read operation.

E1 E2 WX WY PTX PTY Operation

ADDRESS & CONTROL

DATA INPUT D

DATA OUTPUT Q

VALID

PASS–THROUGH

tn +

PIPELINED READ ACCESS

ABSOLUTE MAXIMUM RATINGS (See Note)

Rating

Power Supply Voltage V Voltage Relative to VSS for Any Pin

Except V Output Current I Power Dissipation P Temperature Under Bias T Operating Temperature T Storage Temperature — Plastic T

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are

exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.

Symbol Value Unit

Vin, V

out

bias

stg

out

– 0.5 to + 4.6 V

– 0.5 to VDD + 0.5 V

± 20 mA TBD W

– 10 to + 85 °C

0 to + 70 °C

– 55 to + 125 °C

VALID

This is a synchronous device. All synchronous inputs must meet specified setup and hold times with stable logic levels for edges of clock (K) while the device is selected.

This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to these high–impedance circuits.

ALL

rising

MOTOROLA FAST SRAM

MCM69D618

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PACKAGE THERMAL CHARACTERISTICS (See Note 1)

Rating

Junction to Ambient (@ 200 lfm) Single–Layer Board

Four–Layer Board Junction to Board (Bottom) R Junction to Case (Top) R

NOTES:

1. Junction temperature is a function of on–chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, board population, and board thermal resistance.

2. Per SEMI G38–87.

3. Indicates the average thermal resistance between the die and the printed circuit board.

4. Indicates the average thermal resistance between the die and the case top surface via the cold plate method (MIL SPEC–883 Method 1012.1).

Symbol TQFP Unit Notes

θJA

θJB θJC

40 25

17 °C/W 3

9 °C/W 4

°C/W 2

DC OPERA TING CONDITIONS AND CHARACTERISTICS

(VDD = 3.3 V ± 5%, TA = 0 to 70°C, Unless Otherwise Noted)

RECOMMENDED OPERATING CONDITIONS AND SUPPLY CURRENTS

Parameter Symbol Min Max Unit

Supply Voltage (Operating Voltage Range) V Input High Voltage V Input Low Voltage V Input Leakage Current (All Inputs, Vin = 0 to VDD) I Output Leakage Current (E = VIH, V AC Supply Current (I

CMOS Standby Supply Current (Deselected, Clock (K) MCM69D618–6 ns Cycle Time ≥ t Vin ≤ VSS + 0.2 V or ≥ VDD – 0.2 V)

Output Low Voltage (IOL = + 8.0 mA) V Output High Voltage (IOH = – 4.0 mA) V

*VIL ≥ –1.5 V for t ≤ t

**VIH ≤ VDD + 1.0 V for t ≤ t

KHKH

= 0 mA) (VDD = max, f = f

out

, All Inputs Toggling at CMOS Levels MCM69D618–8 ns

/2.

KHKH

= 0 to VDD) I

out

) MCM69D618–6 ns

max

/2.

MCM69D618–8 ns

lkg(O) I

IH IL

lkg(I)

DDA

SB1

3.135 3.465 V

2.0 VDD + 0.5** V

– 0.5* 0.8 V

— ± 1.0 µA — ± 1.0 µA —

— —

—

— 0.4 V

2.4 V

300 300

100 100

CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, T

Address and Data Input Capacitance C Control Pin Input Capacitance C Output Capacitance C

= 0 to + 70°C, Periodically Sampled Rather Than 100% Tested)

Parameter

Symbol Max Unit

in in

out

6 pF 6 pF 8 pF

MCM69D618 6

MOTOROLA FAST SRAM

Page 7

AC OPERA TING CONDITIONS AND CHARACTERISTICS

(VDD = 3.3 V ± 5%, TA = 0 to 70°C, Unless Otherwise Noted)

Input Timing Measurement Reference Level 1.5 V. . . . . . . . . . . . . . .

Input Pulse Levels 0 to 3.0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input Rise/Fall Time 3 ns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Output Timing Reference Level 1.5 V. . . . . . . . . . . . . . . . . . . . . . . . . .

Output Load Figure 1 Unless Otherwise Noted. . . . . . . . . . . . . . . . . .

READ/WRITE CYCLE TIMING

MCM69D618–6 MCM69D618–8

Parameter Symbol

Cycle Time t Clock Access Time t Clock Low Pulse Width t Clock High Pulse Width t Clock High to Data Output Active t Clock High to Data Output Invalid t Clock High to Data Output High–Z t Output Enable Low to Data Output Valid t Output Enable Low to Data Output Low–Z t Output Enable High to Data Output High–Z t Setup Times: AWR0 – AWR14

Hold Times: AWR0 – AWR14

NOTES:

1. All read and write cycles are referenced from K.

2. This parameter is sampled and not 100% tested.

3. This is a synchronous device. All synchronous inputs must meet the specified setup and hold times with stable logic levels for edges of clock (K) while the device is selected.

4. t

minimum for Port Y only extends to 4.0 ns only for the special case when the Y– and X–address are identical on the same rising

KHDX

clock edge.

ARD0 – ARD14

E1, E2

D0 – D35

ARD0 – ARD14

E1, E2

D0 – D35

KHKH KHQV

KLKH

KHKL KHQX1 KHQX2

KHQZ GLQV GLQX GHQZ

AVKH

WVKH

PTVKH t

EVKH

DVKH

KHAX

KHWX

KHPTX t

KHEX

KHDX

Min Max Min Max

12 — 15 — ns 1 — 6 — 8 ns

4 — 6 — ns 4 — 6 — ns 0 — 0 — ns

2 — 2 — ns — 5 — 5 ns 2 — 6 — 8 ns

0 — 5 — 8 ns 2

2.5 — 3 — ns 3

0.5 — 1 — ns 3

—

0 — ns

Unit Notes

3 3 3 3

3, 4

ALL

rising

MOTOROLA FAST SRAM

OUTPUT

Z0 = 50

Figure 1. AC Test Load

Ω

RL = 50

Ω

VL = 1.5 V

MCM69D618

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READ CYCLE TIMING FROM BOTH PORTS (WX, WY, PTX, PTY HIGH)

KHKH t

KLKH

KHKL

PORT X

PORT Y

DQX

AVKH

KHQX1

2 3 4 5 6 7 8 9

KHQV

Q(1) Q(2) Q(3) Q(5) Q(6)

EVKH

KHEX

13 14 15 16 6 7 19 20

KHAX

GHQZ

Q(7)

GLQX

GLQV

DQY

NOTE: E Low = E1 Low and E2 High. E High = E1 High or E2 Low.

Q(12) Q(13) Q(14) Q(16) Q(6) Q(7)

KHQZ

KHQV

MCM69D618 8

MOTOROLA FAST SRAM

Page 9

WRITE CYCLE TIMING TO BOTH PORTS (PTX, PTY HIGH)

PORT X

DQX

KHKH

1 2 3 4 5 6 7 8 9

WVKH

D(2) D(3) D(4)

KHWX

DVKH

KLKH

KHDX

KHKL

D(8) D(9)

PORT Y

DQY

NOTE: E Low = E1 Low and E2 High. E High = E1 High or E2 Low.

12 13 14

D(14) D(15) D(19)D(18)

5 6 18 19 20

D(5) D(6)

PORT Y TAKES PRECEDENCE

OVER PORT X WHEN AX = AY

AND WRITING BOTH PORTS.

MOTOROLA FAST SRAM

MCM69D618

Page 10

WRITE TO PORT X AND PASS–THROUGH TO PORT Y (See Note)

PORT X

PTX

DQX

KHKH

1 2 3 4 5 6 7 8 9

KHPTX

DVKH

D(2) D(3) D(X) D(Y) D(6)

KLKH

KHDX

PTVKH

KHKL

PORT Y

E Low = E1 Low and E2 High. E High = E1 High or E2 Low. NOTE: The timing diagram is valid for the opposite case as well, i.e., writing to Port Y and passing through to Port X.

PTY

DQY

12 13 14

KHQV

KHQX2

16 17 18 19 20

KHQZ

D(3) D(X)

D(Y)

D(17)

MCM69D618 10

MOTOROLA FAST SRAM

Page 11

COMBINATION READ/WRITE WITH SAME ADDRESS ON EACH PORT

PORT X

DQX

TRY TO

WRITE

D(ABC) D(DEF)

WRITE WRITE

KHKH

TRY TO

WRITE

1 2 1 2 3

2 1 2 3

READ READ READ READ READ READ

READ READ READ WRITE READ READ

KLKH

KHKL

Q(XYZ) Q(JKL)Q(PQR)

PORT Y

DQY

PTX = PTY = high. D(Value) = Value is the input to the data port. Q(Value) = Value is the output from the data port.

D(PQR) D(XYZ) Q(PQR) D(JKL) Q(JKL)

PORT Y TAKES PRECEDENCE

OVER PORT X WHEN AX = AY

AND WRITING BOTH PORTS.

MOTOROLA FAST SRAM

MCM69D618

Page 12

Motorola Memory Prefix Part Number

ORDERING INFORMATION

(Order by Full Part Number)

MCM 69D618 XX XX X

Shipping Method (R = Tape and Reel,

Blank = Rails)

Speed (6 = 6ns, 8 = 8 ns) Package (TQ = TQFP)

Full Part Numbers — MCM69D618TQ6 MCM69D618TQ8

MCM69D618TQ6R MCM69D618TQ8R

MCM69D618 12

MOTOROLA FAST SRAM

Page 13

P ACKAGE DIMENSIONS

A–B0.20 (0.008) H

80 51

–D–

TQFP PACKAGE

100 PIN

CASE 983A–01

2X 30 TIPS

A–B0.20 (0.008) C D

e/2

–A–

–H– –C–

SEATING PLANE

0.05 (0.002)

100

2X 20 TIPS

D1/2

C D

VIEW AB

E/2

–B–

E1/2

301

BASE

METAL

B B

–X–

X=A, B, OR D

VIEW Y

PLATING

D/2

A–B0.20 (0.008)

0.10 (0.004)

NOTES:

VIEW AB

0.25 (0.010)

GAGE PLANE

0.13 (0.005) D

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M,

1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE.

4. DATUMS –A–, –B– AND –D– TO BE DETERMINED AT DATUM PLANE –H–.

5. DIMENSIONS D AND E TO BE DETERMINED AT SEATING PLANE –C–.

6. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 (0.010) PER SIDE. DIMENSIONS D1 AND B1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE –H–.

7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. DAMBAR PROTRUSION SHALL NOT CAUSE THE b DIMENSION TO EXCEED 0.45 (0.018).

DIM MIN MAX MIN MAX

A ––– 1.60 ––– 0.063 A1 0.05 0.15 0.002 0.006 A2 1.35 1.45 0.053 0.057

b 0.22 0.38 0.009 0.015

b1 0.22 0.33 0.009 0.013

c 0.09 0.20 0.004 0.008

c1 0.09 0.16 0.004 0.006

D 22.00 BSC 0.866 BSC D1 20.00 BSC 0.787 BSC

E 16.00 BSC 0.630 BSC E1 14.00 BSC 0.551 BSC

e 0.65 BSC 0.026 BSC

L 0.45 0.75 0.018 0.030

L1 1.00 REF 0.039 REF L2 0.50 REF

S 0.20 ––– 0.008 ––– R1 0.08 ––– 0.003 ––– R2 0.08 0.20 0.003 0.008

q q

A–B

SECTION B–B

INCHESMILLIMETERS

0.020 REF

0 7 0 7

0 ––– 0 –––

11 13 11 13

_ _ _

_ _

MOTOROLA FAST SRAM

MCM69D618

Page 14

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

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MCM69D618 14

◊

MOTOROLA FAST SRAM

MCM69D618/D