Datasheet MCM6949YJ10, MCM6949YJ12, MCM6949YJ12R, MCM6949YJ15, MCM6949YJ15R Datasheet (Motorola)
...Page 1
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
1M x 4 Bit Static Random
Access Memory
The MCM6949 is a 4,194,304 bit static random access memory organized as
1,048,576 words of 4 bits. Static design eliminates the need for external clocks
or timing strobes.
The MCM6949 is equipped with chip enable (E
allowing for greater system flexibility and eliminating bus contention problems.
Either input, when high, will force the outputs into high–impedance.
The MCM6949 is available in a 400 mil, 32–lead surface–mount SOJ package.
• Single 3.3 V – 5%, + 10% Power Supply
• Fast Access Time: 8/10/12/15 ns
• Equal Address and Chip Enable Access Time
• All Inputs and Outputs are TTL Compatible
• Three–State Outputs
• Power Operation: 195/165/160/155 mA Maximum, Active AC
) and output enable (G) pins,
Order this document
MCM6949
YJ PACKAGE
400 MIL SOJ
CASE 857A–02
PIN NAMES
A0 – A19 Address Inputs. . . . . . . . . . . . . . . .
W
G
E
DQ Data Input/Output. . . . . . . . . . . . . . . . . .
NC No Connection. . . . . . . . . . . . . . . . . . . . .
V
CC
V
SS
+ 3.3 V Power Supply. . . . . . . . . . . . . .
by MCM6949/D
Write Enable. . . . . . . . . . . . . . . . . . . . . . .
Output Enable. . . . . . . . . . . . . . . . . . . . . .
Chip Enable. . . . . . . . . . . . . . . . . . . . . . . . .
Ground. . . . . . . . . . . . . . . . . . . . . . . . . .
This document contains information on a new product. Specifications and information herein are subject to change without notice.
REV 4
4/2/98
Motorola, Inc. 1998
MOTOROLA FAST SRAM
MCM6949
1
Page 2
BLOCK DIAGRAM
A
A
A
A
A
A
A
A
A
A
ROW
DECODER
MEMORY MATRIX
DQ
DQ
E
W
G
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
AA AAA AAAAA
DQ
DQ
MCM6949
2
MOTOROLA FAST SRAM
Page 3
PIN ASSIGNMENT
AA
1
A
2
A
3
A
4
A
5
E
6
DQ
7
V
8
CC
V
9
SS
DQ
10
W
11
12
A
13
A
14
A
15
A
ANC
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
A
A
A
G
DQ
V
V
DQ
A
A
A
A
A
SS
CC
MOTOROLA FAST SRAM
MCM6949
3
Page 4
TRUTH TABLE (X = Don’t Care)
E G W Mode I/O Pin Cycle Current
H X X Not Selected High–Z — I
L H H Output Disabled High–Z — I
L L H Read D
L X L Write High–Z Write I
out
Read I
SB1
, I
CCA
CCA
CCA
SB2
ABSOLUTE MAXIMUM RATINGS (See Note)
Rating Symbol Value Unit
Power Supply Voltage Relative to V
Voltage Relative to VSS for Any Pin
Except V
Output Current (per I/O) I
Power Dissipation P
Temperature Under Bias T
Operating Temperature T
Storage Temperature — Plastic T
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
CC
exceeded. Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
SS
V
CC
Vin, V
out
bias
stg
– 0.5 to + 5.0 V
– 0.5 to VCC + 0.5 V
out
± 20
D
A
1.0 W
– 10 to + 85 °C
0 to + 70 °C
– 55 to + 150 °C
mA
This device contains circuitry to protect the
inputs against damage due to high static voltages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maximum rated voltages to these high–impedance
circuits.
This BiCMOS memory circuit has been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board and
transverse air flow of at least 500 linear feet per
minute is maintained.
MCM6949
4
MOTOROLA FAST SRAM
Page 5
DC OPERA TING CONDITIONS AND CHARACTERISTICS
(VCC = 3.3 V – 5%, + 10%, TA = 0 to + 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Min Typ Max Unit
Supply Voltage (Operating Voltage Range) V
Input High Voltage V
Input Low Voltage V
*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width ≤ 2.0 ns).
DC CHARACTERISTICS
Parameter Symbol Min Max Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC) I
Output Leakage Current (E = VIH, V
Output Low Voltage (IOL = + 8.0 mA) V
Output High Voltage (IOH = – 4.0 mA) V
= 0 to VCC) I
out
POWER SUPPLY CURRENTS
Parameter Symbol 0 to + 70°C
AC Active Supply Current MCM6949–8: t
(I
= 0 mA, VCC = Max) MCM6949–10: t
out
AC Standby Current (VCC = Max, E = VIH, MCM6949–8: t
No Other Restrictions on Other Inputs) MCM6949–10: t
CMOS Standby Current (E ≥ VCC – 0.2 V, Vin ≤ VSS + 0.2 V or ≥ VCC – 0.2 V)
(VCC = Max, f = 0 MHz)
MCM6949–12: t
MCM6949–15: t
MCM6949–12: t
MCM6949–15: t
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
AVAV
CC
IH
IL
= 8 ns
= 10 ns
= 12 ns
= 15 ns
= 8 ns
= 10 ns
= 12 ns
= 15 ns
3.0 3.3 3.465 V
2.2 — VCC + 0.3 V
– 0.5*
lkg(I)
lkg(O)
OL
OH
I
CC
I
SB1
I
SB2
— 0.8 V
— ± 1.0 µA
— ± 1.0 µA
— 0.4 V
2.4 — V
– 40 to
+ 85°C
195
165
160
155
55
50
50
45
15 15 mA
195
175
170
165
55
55
55
50
Unit
mA
mA
CAPACITANCE (f = 1.0 MHz, dV = 3.3 V, T
Parameter Symbol Typ Max Unit
Input Capacitance All Inputs Except Clocks and DQs
Input/Output Capacitance DQ C
= 25°C, Periodically Sampled Rather Than 100% Tested)
A
E
, G, W
C
in
C
ck
I/O
4
5
5 8 pF
6
8
pF
MOTOROLA FAST SRAM
MCM6949
5
Page 6
AC OPERA TING CONDITIONS AND CHARACTERISTICS
(VCC = 3.3 V – 5%, + 10%, TA = 0 to + 70°C, Unless Otherwise Noted)
Input Pulse Levels 0 to 3.0 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Rise/Fall Time 2 ns. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Timing Measurement Reference Level 1.5 V. . . . . . . . . . . . . . .
Output Timing Measurement Reference Level 1.5 V. . . . . . . . . . . . .
Output Load See Figure 1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
READ CYCLE TIMING (See Notes 1 and 2)
MCM6949–8 MCM6949–10 MCM6949–12 MCM6949–15
Parameter Symbol
Read Cycle Time t
Address Access Time t
Enable Access Time t
Output Enable Access Time t
Output Hold from Address Change t
Enable Low to Output Active t
Output Enable Low to Output Active t
Enable High to Output High–Z t
Output Enable High to Output High–Z t
NOTES:
1. W
is high for read cycle.
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. All read cycle timings are referenced from the last valid address to the first transitioning address.
4. Addresses valid prior to or coincident with E
5. At any given voltage and temperature, t
to device.
6. Transition is measured ± 200 mV from steady–state voltage.
7. This parameter is sampled and not 100% tested.
8. Device is continuously selected (E
AVAV
AVQV
ELQV
GLQV
AXQX
ELQX
GLQX
EHQZ
GHQZ
EHQZ
≤ VIL, G ≤ VIL).
Min Max Min Max Min Max Min Max
8 — 10 — 12 — 15 — ns 3
— 8 — 10 — 12 — 15 ns
— 8 — 10 — 12 — 15 ns 4
— 4 — 5 — 6 — 7 ns
2 — 2 — 2 — 2 — ns
3 — 3 — 3 — 3 — ns 5, 6, 7
0 — 0 — 0 — 0 — ns 5, 6, 7
0 4 0 5 0 6 0 7 ns 5, 6, 7
0 4 0 5 0 6 0 7 ns 5, 6, 7
going low.
max t t
ELQX
min, and t
GHQZ
max t t
min, both for a given device and from device
GLQX
Unit Notes
OUTPUT
Z0 = 50
Ω
RL = 50
VL = 1.5 V
Ω
Figure 1. AC Test Load
TIMING LIMITS
The table of timing values shows either a minimum
or a maximum limit for each parameter. Input requirements are specified from the external system point of
view. Thus, address setup time is shown as a minimum since the system must supply at least that much
time. On the other hand, responses from the memory
are specified from the device point of view. Thus, the
access time is shown as a maximum since the device
never provides data later than that time.
MCM6949
6
MOTOROLA FAST SRAM
Page 7
A (ADDRESS)
READ CYCLE 1 (See Note 8)
t
AVAV
t
AXQX
Q (DATA OUT)
A (ADDRESS)
E (CHIP ENABLE)
(OUTPUT ENABLE)
G
Q (DATA OUT)
SUPPLY CURRENT
I
CC
I
SB
HIGH–Z
t
AVQV
READ CYCLE 2 (See Note 4)
t
AVAV
t
ELQV
t
ELQX
t
t
GLQX
t
AVQV
GLQV
DATA VALID
DATA VALIDPREVIOUS DATA VALID
t
EHQZ
t
GHQZ
MOTOROLA FAST SRAM
MCM6949
7
Page 8
WRITE CYCLE 1 (W Controlled; See Notes 1, 2, and 3)
MCM6949–8 MCM6949–10 MCM6949–12 MCM6949–15
Parameter Symbol
Write Cycle Time t
Address Setup Time t
Address Valid to End of W rite t
Address Valid to End of Write (G High) t
Write Pulse Width t
Write Pulse Width (G High) t
Data Valid to End of W rite t
Data Hold Time t
Write Low to Data High–Z t
Write High to Output Active t
Write Recovery Time t
NOTES:
1. A write occurs during the overlap of E
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. If G
goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. All write cycle timings are referenced from the last valid address to the first transitioning address.
5. Transition is measured ± 200 mV from steady–state voltage.
6. This parameter is sampled and not 100% tested.
7. At any given voltage and temperature, t
AVAV
AVWL
AVWH
AVWH
WLWH
t
WLEH
WLWH
t
WLEH
DVWH
WHDX
WLQZ
WHQX
WHAX
low and W low.
WLQZ
Min Max Min Max Min Max Min Max
8 — 10 — 12 — 15 — ns 4
0 — 0 — 0 — 0 — ns
8 — 9 — 10 — 12 — ns
7 — 8 — 9 — 10 — ns
8 — 9 — 10 — 12 — ns
7 — 8 — 9 — 10 — ns
5 — 5 — 6 — 7 — ns
0 — 0 — 0 — 0 — ns
0 4 0 5 0 6 0 7 ns 5, 6, 7
3 — 3 — 3 — 3 — ns 5, 6, 7
0 — 0 — 0 — 0 — ns
max < t
min, both for a given device and from device to device.
WHQX
Unit Notes
A (ADDRESS)
E (CHIP ENABLE)
W
(WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
WRITE CYCLE 1 (W Controlled; See Notes 1, 2, and 3)
t
AVAV
t
AVWH
t
WLWH
t
WLEH
t
AVWL
t
WLQZ
HIGH–Z
t
DVWH
DATA VALID
HIGH–Z
t
WHAX
t
WHDX
t
WHQX
MCM6949
8
MOTOROLA FAST SRAM
Page 9
WRITE CYCLE 2 (E Controlled; See Notes 1, 2, and 3)
MCM6949–8 MCM6949–10 MCM6949–12 MCM6949–15
Parameter Symbol
Write Cycle Time t
Address Setup Time t
Address Valid to End of W rite t
Address Valid to End of Write (G High) t
Enable Pulse Width t
Enable Pulse Width (G High) t
Data Valid to End of W rite t
Data Hold Time t
Write Recovery Time t
NOTES:
1. A write occurs during the overlap of E
2. Product sensitivities to noise require proper grounding and decoupling of power supplies as well as minimization or elimination of bus
contention conditions during read and write cycles.
3. If G
goes low coincident with or after W goes low, the output will remain in a high–impedance state.
4. All write cycle timing is referenced from the last valid address to the first transitioning address.
5. If E
goes low coincident with or after W goes low, the output will remain in a high–impedance condition.
6. If E
goes high coincident with or before W goes high, the output will remain in a high–impedance condition.
AVAV
AVEL
AVEH
AVEH
ELEH,
t
ELWH
ELEH,
t
ELWH
DVEH
EHDX
EHAX
low and W low.
Min Max Min Max Min Max Min Max
8 — 10 — 12 — 15 — ns 4
0 — 0 — 0 — 0 — ns
7 — 9 — 10 — 12 — ns
7 — 8 — 9 — 10 — ns
8 — 9 — 10 — 12 — ns 5, 6
7 — 8 — 9 — 10 — ns 5, 6
5 — 5 — 6 — 7 — ns
0 — 0 — 0 — 0 — ns
0 — 0 — 0 — 0 — ns
Unit Notes
A (ADDRESS)
(CHIP ENABLE)
E
W
(WRITE ENABLE)
D (DATA IN)
Q (DATA OUT)
Motorola Memory Prefix
WRITE CYCLE 2 (E Controlled; See Notes 1, 2, and 3)
t
AVAV
t
t
AVEL
AVEH
HIGH–Z
t
ELEH
t
ELWH
t
DVEH
DATA VALID
ORDERING INFORMATION
(Order by Full Part Number)
MCM 6949 XX XX XX
Shipping Method (R = Tape and Reel, Blank = Rails)
t
EHAX
t
EHDX
Part Number
Full Part Numbers — MCM6949YJ8 MCM6949YJ10 MCM6949YJ12 MCM6949YJ15
MOTOROLA FAST SRAM
Speed (8 = 8 ns, 10 = 10 ns, 12 = 12 ns,
15 = 15 ns)
Package (YJ = 400 mil SOJ)
MCM6949YJ8R MCM6949YJ10R MCM6949YJ12R MCM6949YJ15R
MCM6949
9
Page 10
P ACKAGE DIMENSIONS
YJ PACKAGE
400 MIL SOJ
CASE 857A–02
32 PL
32
17
N
1
16
0.17 (0.007)ST
-AL
0.17 (0.007)ST
F
0.17 (0.007)ST
DETAIL Z
32 PL
D
S
A
B
S
NOTE 3
S
B
P
S
S
B
A
G
-BC
0.10 (0.004)
SEATING
K
DETAIL Z
-T-
PLANE
R
0.25 (0.010)
S
E
RADIUS
S
S
S
T
B
A
NOTE 3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
S
A
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. TO BE DETERMINED AT PLANE -T-.
4. DIMENSION A & B DO NOT INCLUDE MOLD
PROTRUSION. MOLD PROTRUSION SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
5. DIMENSION A & B INCLUDE MOLD MISMATCH
AND ARE DETERMINED AT THE PARTING LINE.
6. 857A-01 IS OBSOLETE, NEW STANDARD 857A-02.
MILLIMETERS INCHES
MIN MINMAX MAX
DIM
A
B
C
D
E
F
G
K
L
N
P
R
S
20.83
10.03
3.26
0.41
2.24
0.67
1.27 BSC
0.89
0.64 BSC
0.76
11.05
9.27
0.77
21.08
10.29
3.75
0.50
2.48
0.81
1.14
1.14
11.30
9.52
1.01
0.820
0.395
0.128
0.016
0.088
0.026
0.050 BSC
0.035
0.025 BSC
0.030
0.435
0.365
0.030
0.830
0.405
0.148
0.020
0.098
0.032
0.045
0.045
0.445
0.375
0.040
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
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arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
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Opportunity/Affirmative Action Employer.
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MCM6949
◊
MOTOROLA FAST SRAM
MCM6949/D
10
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