Datasheet MC74VHC4066DT, MC74VHC4066D, MC74VHC4066DR2, MC74VHC4066DTR2 Datasheet (MOTOROLA)



SEMICONDUCTOR TECHNICAL DATA

Order this document

by MC74VHC4066/D

1

REV 3

 Motorola, Inc. 1999

07/99

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! #! #

High–Performance Silicon–Gate CMOS

The MC74VHC4066 utilizes silicon–gate CMOS technology to
achieve fast propagation delays, low ON resistances, and low OFF–
channel leakage current. This bilateral switch/multiplexer/demultiplexer
controls analog and digital voltages that may vary across the full
power–supply range (from VCC to GND).

The VHC4066 is identical in pinout to the metal–gate CMOS MC14066
and the high–speed CMOS HC4066A. Each device has four independent
switches. The device has been designed so that the ON resistances
(RON) are much more linear over input voltage than RON of metal–gate
CMOS analog switches.

The ON/OFF control inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LSTTL outputs.
For analog switches with voltage–level translators, see the VHC4316.

• Fast Switching and Propagation Speeds

• High ON/OFF Output Voltage Ratio

• Low Crosstalk Between Switches

• Diode Protection on All Inputs/Outputs

• Wide Power–Supply Voltage Range (VCC – GND) = 2.0 to 12.0 Volts

• Analog Input Voltage Range (VCC – GND) = 2.0 to 12.0 Volts

• Improved Linearity and Lower ON Resistance over Input Voltage than

the MC14016 or MC14066

• Low Noise

• Chip Complexity: 44 FETs or 11 Equivalent Gates

LOGIC DIAGRAM

X

A

Y

A

12

A ON/OFF CONTROL

13

X

B

Y

B

43

B ON/OFF CONTROL

5

X

C

Y

C

89

C ON/OFF CONTROL

6

X

D

Y

D

11 10

D ON/OFF CONTROL

12

ANALOG
OUTPUTS/INPUTS

ANALOG INPUTS/OUTPUTS = XA, XB, XC, X

D

PIN 14 = V

CC

PIN 7 = GND

This document contains information on a new product. Specifications and information herein are subject to
change without notice.



FUNCTION TABLE

PIN ASSIGNMENT

11

12

13

14

8

9

105

4

3

2

1

7

6

Y

D

X

D

D ON/OFF
CONTROL

A ON/OFF
CONTROL

V

CC

X

C

Y

C

X

B

Y

B

Y

A

X

A

GND

C ON/OFF
CONTROL

B ON/OFF
CONTROL

On/Off Control State of

Input Analog Switch

LOff
HOn

ORDERING INFORMATION

MC74VHCXXXXD
MC74VHCXXXXDT

SOIC
TSSOP

D SUFFIX

14–LEAD SOIC PACKAGE

CASE 751A–03

DT SUFFIX

14–LEAD TSSOP PACKAGE

CASE 948G–01

MC74VHC4066

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 2

2

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

V

CC

Positive DC Supply Voltage (Referenced to GND)

– 0.5 to + 14.0

V

V

IS

Analog Input Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

V

in

Digital Input Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

I

DC Current Into or Out of Any Pin

± 25

mA

Î

Î

P

D

ОООООООООООО

Î

Power Dissipation in Still Air, SOIC Package†

TSSOP Package†

ÎÎÎÎ

Î

500
450

Î

Î

mW

T

stg

Storage Temperature

– 65 to + 150

_

C

T

L

Lead Temperature, 1 mm from Case for 10 Seconds

260

_

C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — SOIC Package: – 7 mW/_C from 65_ to 125_C

TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

V

CC

Positive DC Supply Voltage (Referenced to GND)

2.0

12.0

V

V

IS

Analog Input Voltage (Referenced to GND)

GND

V

CC

V

V

in

Digital Input Voltage (Referenced to GND)

GND

V

CC

V

ÎÎ

Î

VIO*

ОООООООООООО

Î

Static or Dynamic Voltage Across Switch

Î

Î

—

Î

Î

1.2

Î

Î

V

ÎÎ

T

A

ОООООООООООО

Operating Temperature, All Package Types

Î

– 55Î+ 125

Î

_

C

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

tr, t

f

ОООООООООООО

Î

ОООООООООООО

Î

ОООООООООООО

Î

ОООООООООООО

Î

Input Rise and Fall Time, ON/OFF Control
Inputs (Figure 10) VCC = 2.0 V

VCC = 3.0 V
VCC = 4.5 V
VCC = 9.0 V

VCC = 12.0 V

Î

Î

Î

Î

Î

Î

Î

Î

0
0
0
0
0

Î

Î

Î

Î

Î

Î

Î

Î

1000

600
500
400
250

Î

Î

Î

Î

Î

Î

Î

Î

ns

*For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may

be drawn; i.e., the current out of the switch may contain both VCC and switch input components.
The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

DC ELECTRICAL CHARACTERISTIC Digital Section (Voltages Referenced to GND)

Guaranteed Limit

ÎÎ

Î

Symbol

ООООООО

Î

Parameter

ООООООО

Î

Test Conditions

ÎÎ

Î

V

CC

V

ÎÎ

– 55 to

25_C

ÎÎ

Î

v

85_C

ÎÎ

Î

v

125_C

Î

Î

Unit

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

V

IH

ООООООО

Î

ООООООО

Î

ООООООО

Î

Minimum High–Level Voltage
ON/OFF Control Inputs

ООООООО

Î

ООООООО

Î

ООООООО

Î

Ron = Per Spec

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

2.0

3.0

4.5

9.0

12.0

ÎÎ

ÎÎ

ÎÎ

1.5

2.1

3.15

6.3

8.4

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

1.5

2.1

3.15

6.3

8.4

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

1.5

2.1

3.15

6.3

8.4

Î

Î

Î

Î

Î

Î

V

ÎÎ

Î

ÎÎ

Î

V

IL

ООООООО

Î

ООООООО

Î

Maximum Low–Level Voltage
ON/OFF Control Inputs

ООООООО

Î

ООООООО

Î

Ron = Per Spec

ÎÎ

Î

ÎÎ

Î

2.0

3.0

4.5

9.0

12.0

ÎÎ

ÎÎ

0.5

0.9

1.35

2.7

3.6

ÎÎ

Î

ÎÎ

Î

0.5

0.9

1.35

2.7

3.6

ÎÎ

Î

ÎÎ

Î

0.5

0.9

1.35

2.7

3.6

Î

Î

Î

Î

V

ÎÎ

Î

I

in

ООООООО

Î

Maximum Input Leakage Current
ON/OFF Control Inputs

ООООООО

Î

Vin = VCC or GND

ÎÎ

Î

12.0

ÎÎ

± 0.1

ÎÎ

Î

± 1.0

ÎÎ

Î

± 1.0

Î

Î

µA

ÎÎ

Î

I

CC

ООООООО

Î

Maximum Quiescent Supply
Current (per Package)

ООООООО

Î

Vin = VCC or GND
VIO = 0 V

ÎÎ

Î

6.0

12.0

ÎÎ

2
4

ÎÎ

Î

20
40

ÎÎ

Î

40

160

Î

Î

µA

This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir­cuit. For proper operation, Vin and
V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
I/O pins must be connected to a
properly terminated line or bus.

MC74VHC4066

VHC Data – Advanced CMOS Logic
DL203 — Rev 2

3 MOTOROLA

DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to GND)

Guaranteed Limit

ÎÎ

Î

Symbol

ООООООО

Î

Parameter

ООООООО

Î

Test Conditions

ÎÎ

Î

V

CC

V

ÎÎ

– 55 to

25_C

ÎÎ

Î

v

85_C

ÎÎ

Î

v

125_C

Î

Î

Unit

ÎÎ

Î

ÎÎ

Î

R

on

ООООООО

Î

ООООООО

Î

Maximum “ON” Resistance

ООООООО

Î

ООООООО

Î

Vin = V

IH

VIS = VCC to GND
IS v 2.0 mA (Figures 1, 2)

ÎÎ

Î

ÎÎ

Î

2.0†

3.0†

4.5

9.0

12.0

ÎÎ

ÎÎ

—
—

120

70
70

ÎÎ

Î

ÎÎ

Î

—
—

160

85
85

ÎÎ

Î

ÎÎ

Î

—

—
200
100
100

Î

Î

Î

Î

Ω

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ООООООО

Î

ООООООО

Î

ООООООО

Î

ООООООО

Î

ООООООО

Î

ООООООО

Î

Vin = V

IH

VIS = VCC or GND (Endpoints)
IS v 2.0 mA (Figures 1, 2)

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

2.0

3.0

4.5

9.0

12.0

ÎÎ

ÎÎ

ÎÎ

—
—
70
50
30

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

—
—
85
60
60

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

—

—
100

80

80

Î

Î

Î

Î

Î

Î

ÎÎ

Î

ÎÎ

Î

∆R

on

ООООООО

Î

ООООООО

Î

Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package

ООООООО

Î

ООООООО

Î

Vin = V

IH

VIS = 1/2 (VCC – GND)
IS v 2.0 mA

ÎÎ

Î

ÎÎ

Î

2.0

4.5

9.0

12.0

ÎÎ

ÎÎ

—
20
15
15

ÎÎ

Î

ÎÎ

Î

—
25
20
20

ÎÎ

Î

ÎÎ

Î

—

30

25

25

Î

Î

Î

Î

Ω

ÎÎ

Î

I

off

ООООООО

Î

Maximum Off–Channel Leakage
Current, Any One Channel

ООООООО

Î

Vin = V

IL

VIO = VCC or GND
Switch Off (Figure 3)

ÎÎ

Î

12.0

ÎÎ

0.1

ÎÎ

Î

0.5

ÎÎ

Î

1.0

Î

Î

µA

ÎÎ

Î

I

on

ООООООО

Î

Maximum On–Channel Leakage
Current, Any One Channel

ООООООО

Î

Vin = V

IH

VIS = VCC or GND
(Figure 4)

ÎÎ

Î

12.0

ÎÎ

0.1

ÎÎ

Î

0.5

ÎÎ

Î

1.0

Î

Î

µA

†At supply voltage (VCC) approaching 3 V the analog switch–on resistance becomes extremely non–linear. Therefore, for low–voltage

operation, it is recommended that these devices only be used to control digital signals.

AC ELECTRICAL CHARACTERISTICS (C

L

= 50 pF, ON/OFF Control Inputs: tr = tf = 6 ns)

Guaranteed Limit

Symbol

Parameter

V

CC

V

– 55 to

25_C

v

85_Cv 125_C

Unit

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

t

PLH

,

t

PHL

ООООООООООООООО

Î

ООООООООООООООО

Î

ООООООООООООООО

Î

Maximum Propagation Delay , Analog Input to Analog Output

(Figures 8 and 9)

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

2.0

3.0

4.5

9.0

12.0

ÎÎ

ÎÎ

ÎÎ

40
30

5
5
5

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

50
40

7
7
7

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

60

50

8
8
8

Î

Î

Î

Î

Î

Î

ns

ÎÎ

Î

ÎÎ

Î

ÎÎ

t

PLZ

,

t

PHZ

ООООООООООООООО

Î

ООООООООООООООО

Î

ООООООООООООООО

Maximum Propagation Delay, ON/OFF Control to Analog Output

(Figures 10 and 11)

ÎÎ

Î

ÎÎ

Î

ÎÎ

2.0

3.0

4.5

9.0

12.0

ÎÎ

ÎÎ

ÎÎ

80
60
20
20
20

ÎÎ

Î

ÎÎ

Î

ÎÎ

90
70
25
25
25

ÎÎ

Î

ÎÎ

Î

ÎÎ

110

80

35

35

35

Î

Î

Î

Î

Î

ns

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

t

PZL

,

t

PZH

ООООООООООООООО

Î

ООООООООООООООО

Î

ООООООООООООООО

Î

Maximum Propagation Delay, ON/OFF Control to Analog Output

(Figures 10 and 1 1)

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

2.0

3.0

4.5

9.0

12.0

ÎÎ

ÎÎ

ÎÎ

80
45
20
20
20

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

90
50
25
25
25

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

100

60

30

30

30

Î

Î

Î

Î

Î

Î

ns

C

Maximum Capacitance ON/OFF Control Input

—

10

10

10

pF

ÎÎÎООООООООООООООО

Î

Control Input = GND

Analog I/O

Feedthrough

ÎÎ

Î

—
—

ÎÎ

35

1.0

ÎÎ

Î

35

1.0

ÎÎ

Î

35

1.0

Î

Î

Typical @ 25°C, VCC = 5.0 V

C

PD

Power Dissipation Capacitance (Per Switch) (Figure 13)*

15

pF

*Used to determine the no–load dynamic power consumption: PD = CPD V

CC

2

f + ICC VCC.

MC74VHC4066

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 2

4

ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)

ÎÎ

Î

ÎÎ

Symbol

ОООООООО

Î

ОООООООО

Parameter

ОООООООООООО

Î

ОООООООООООО

Test Conditions

Î

Î

Î

V

CC

V

ÎÎ

Î

ÎÎ

Limit*

25_C

74HC

Î

Î

Î

Unit

ÎÎ

Î

ÎÎ

Î

BW

ОООООООО

Î

ОООООООО

Î

Maximum On–Channel Bandwidth or
Minimum Frequency Response

(Figure 5)

ОООООООООООО

Î

ОООООООООООО

Î

fin = 1 MHz Sine Wave
Adjust fin Voltage to Obtain 0 dBm at V

OS

Increase fin Frequency Until dB Meter Reads – 3 dB

RL = 50 Ω, CL = 10 pF

Î

Î

Î

Î

4.5

9.0

12.0

ÎÎ

Î

ÎÎ

Î

150
160
160

Î

Î

Î

Î

MHz

ÎÎ

Î

ÎÎ

Î

—

ОООООООО

Î

ОООООООО

Î

Off–Channel Feedthrough Isolation

(Figure 6)

ОООООООООООО

Î

ОООООООООООО

Î

fin  Sine Wave
Adjust fin Voltage to Obtain 0 dBm at V

IS

fin = 10 kHz, RL = 600 Ω, CL = 50 pF

Î

Î

Î

Î

4.5

9.0

12.0

ÎÎ

Î

ÎÎ

Î

– 50
– 50
– 50

Î

Î

Î

Î

dB

ÎÎÎООООООООÎОООООООООООО

Î

fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF

Î

Î

4.5

9.0

12.0

ÎÎ

Î

– 40
– 40
– 40

Î

Î

ÎÎ

Î

—

ОООООООО

Î

Feedthrough Noise, Control to
Switch

(Figure 7)

ОООООООООООО

Î

Vin v 1 MHz Square Wave (tr = tf = 6 ns)
Adjust RL at Setup so that IS = 0 A

RL = 600 Ω, CL = 50 pF

Î

Î

4.5

9.0

12.0

ÎÎ

Î

60

130
200

Î

Î

mV

PP

ÎÎ

Î

ÎÎ

Î

ОООООООО

Î

ОООООООО

Î

ОООООООООООО

Î

ОООООООООООО

Î

RL = 10 kΩ, CL = 10 pF

Î

Î

Î

Î

4.5

9.0

12.0

ÎÎ

Î

ÎÎ

Î

30
65

100

Î

Î

Î

Î

ÎÎ

Î

—

ОООООООО

Î

Crosstalk Between Any Two Switches

(Figure 12)

ОООООООООООО

Î

fin  Sine Wave
Adjust fin Voltage to Obtain 0 dBm at V

IS

fin = 10 kHz, RL = 600 Ω, CL = 50 pF

Î

Î

4.5

9.0

12.0

ÎÎ

Î

– 70
– 70
– 70

Î

Î

dB

ÎÎÎООООООООÎОООООООООООО

Î

fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF

Î

Î

4.5

9.0

12.0

ÎÎ

Î

– 80
– 80
– 80

Î

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

THD

ОООООООО

Î

ОООООООО

Î

ОООООООО

Î

Total Harmonic Distortion

(Figure 14)

ОООООООООООО

Î

ОООООООООООО

Î

ОООООООООООО

Î

fin = 1 kHz, RL = 10 kΩ, CL = 50 pF
THD = THD

Measured

– THD

Source

VIS = 4.0 VPP sine wave
VIS = 8.0 VPP sine wave

VIS = 11.0 VPP sine wave

Î

Î

Î

Î

Î

Î

4.5

9.0

12.0

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

0.10

0.06

0.04

Î

Î

Î

Î

Î

Î

%

*Guaranteed limits not tested. Determined by design and verified by qualification.

MC74VHC4066

VHC Data – Advanced CMOS Logic
DL203 — Rev 2

5 MOTOROLA

Figure 1a. Typical On Resistance, VCC = 2.0 V Figure 1b. Typical On Resistance, VCC = 4.5 V

Figure 1c. Typical On Resistance, VCC = 6.0 V Figure 1d. Typical On Resistance, VCC = 9.0 V

Figure 1e. Typical On Resistance, VCC = 12 V Figure 2. On Resistance Test Set–Up

TBD TBD

TBDTBD

TBD

PLOTTER

MINI COMPUTER

PROGRAMMABLE

POWER
SUPPLY

DC ANALYZER

V

CC

+–

ANALOG IN COMMON OUT

GND

DEVICE

UNDER TEST

MC74VHC4066

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 2

6

Figure 3. Maximum Off Channel Leakage Current,

Any One Channel, Test Set–Up

OFF

7

14

V

CC

A

V

CC

GND

V

CC

SELECTED

CONTROL

INPUT

V

IL

Figure 4. Maximum On Channel Leakage Current,

Test Set–Up

ON

14

V

CC

N/C

A

GND

V

CC

7

SELECTED

CONTROL

INPUT

V

IH

Figure 5. Maximum On–Channel Bandwidth

Test Set–Up

ON

14

V

CC

0.1µF

CL*

f

in

dB

METER

*Includes all probe and jig capacitance.

V

OS

7

SELECTED

CONTROL

INPUT

V

CC

Figure 6. Off–Channel Feedthrough Isolation,

Test Set–Up

OFF

7

14

V

CC

0.1µF

CL*

f

in

dB

METER

*Includes all probe and jig capacitance.

V

OS

R

L

V

IS

SELECTED
CONTROL
INPUT

Figure 7. Feedthrough Noise, ON/OFF Control to

Analog Out, Test Set–Up

14

V

CC

CL*

*Includes all probe and jig capacitance.

OFF/ON

V

CC

GND

Vin

≤

1 MHz

tr = tf = 6 ns

CONTROL

V

CC/2

R

L

I

S

R

L

V

OS

7

SELECTED

CONTROL

INPUT

V

CC/2

V

CC

GND

ANALOG IN

ANALOG OUT

50%

t

PLH

t

PHL

50%

Figure 8. Propagation Delays, Analog In to

Analog Out

MC74VHC4066

VHC Data – Advanced CMOS Logic
DL203 — Rev 2

7 MOTOROLA

POSITION WHEN TESTING t

PLZ

AND t

PZL

Figure 9. Propagation Delay Test Set–Up

ON

14

V

CC

*Includes all probe and jig capacitance.

TEST

POINT

ANALOG OUTANALOG IN

CL*

7

SELECTED

CONTROL

INPUT

V

CC

t

r

t

f

V

CC

GND

HIGH
IMPEDANCE

V

OL

V

OH

HIGH
IMPEDANCE

CONTROL

ANALOG

OUT

90%

50%

10%

50%

50%

10%

90%

t

PZH

t

PHZ

t

PZL

t

PLZ

Figure 10. Propagation Delay, ON/OFF Control

to Analog Out

ON/OFF

V

CC

TEST

POINT

14

V

CC

1 k

Ω

POSITION WHEN TESTING t

PHZ

AND t

PZH

CL*

1
2

1
2

Figure 11. Propagation Delay Test Set–Up

1
2

7

SELECTED
CONTROL
INPUT

Figure 12. Crosstalk Between Any Two Switches,

Test Set–Up

R

L

ON

14

VCC OR GND

CL*

*Includes all probe and jig capacitance.

OFF

R

L

R

L

V

IS

R

L

CL*

V

OS

f

in

0.1

µ

F

V

CC/2

V

CC/2

7

SELECTED
CONTROL
INPUT

V

CC/2

Figure 13. Power Dissipation Capacitance

Test Set–Up

14

V

CC

N/C

OFF/ON

A

N/C

7

SELECTED

CONTROL

INPUT

ON/OFF CONTROL

ON

V

CC

0.1 µF

CL*

f

in

R

L

TO

DISTORTION

METER

*Includes all probe and jig capacitance.

V

OS

V

IS

7

SELECTED

CONTROL

INPUT

V

CC

Figure 14. Total Harmonic Distortion, Test Set–Up

*Includes all probe and jig capacitance.

V

CC

V

CC/2

MC74VHC4066

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 2

8

0
–10
–20
–30
–40
–50

1.0 2.0
FREQUENCY (kHz)

dBm

–60
–70
–80
–90

FUNDAMENT AL FREQUENCY

DEVICE
SOURCE

Figure 15. Plot, Harmonic Distortion

3.0

APPLICATION INFORMATION

The ON/OFF Control pins should be at VCC or GND logic
levels, VCC being recognized as logic high and GND being
recognized as a logic low. Unused analog inputs/outputs
may be left floating (not connected). However, it is advisable
to tie unused analog inputs and outputs to VCC or GND
through a low value resistor. This minimizes crosstalk and
feedthrough noise that may be picked–up by the unused I/O
pins.

The maximum analog voltage swings are determined by
the supply voltages VCC and GND. The positive peak analog
voltage should not exceed VCC. Similarly, the negative peak
analog voltage should not go below GND. In the example

below, the dif ference between VCC and GND is twelve volts.
Therefore, using the configuration in Figure 16, a maximum
analog signal of twelve volts peak–to–peak can be con­trolled.

When voltage transients above VCC and/or below GND
are anticipated on the analog channels, external diodes (Dx)
are recommended as shown in Figure 17. Thes e diodes
should be small signal, fast turn–on types able to absorb the
maximum anticipated current surges during clipping. An
alternate method would be to replace the Dx diodes with
MOsorbs (Motorola high current surge protectors).
MOsorbs are fast turn–on devices ideally suited for precise
DC protection with no inherent wear out mechanism.

ANALOG O/I

ON

14

VCC = 12 V

ANALOG I/O

+ 12 V

0 V

+ 12 V

0 V

OTHER CONTROL

INPUTS

(VCC OR GND)

ON

16

V

CC

D

x

D

x

V

CC

D

x

Figure 16. 12 V Application Figure 17. Transient Suppressor Application

7

SELECTED
CONTROL
INPUT

D

x

OTHER CONTROL

INPUTS

(VCC OR GND)

7

SELECTED
CONTROL
INPUT

V

CC

MC74VHC4066

VHC Data – Advanced CMOS Logic
DL203 — Rev 2

9 MOTOROLA

+5 V

14

VHC4066

CONTROL

INPUTS

7

5

6
14
15

LSTTL/

NMOS

ANALOG
SIGNALS

R* R* R* R*

ANALOG

SIGNALS

VHCT

BUFFER

R* = 2 TO 10 k

Ω

VDD = 5 V VCC = 5 TO 12 V

ANALOG
SIGNALS

ANALOG

SIGNALS

116 14

CONTROL

INPUTS

78

MC14504

13

3
5
7
9

11

14

2
4
6

10

5

6
14
15

CHANNEL 4

CHANNEL 3

CHANNEL 2

CHANNEL 1

1 OF 4

SWITCHES

COMMON I/O

1234

CONTROL INPUTS

INPUT

OUTPUT

0.01

µ

F

LF356 OR

EQUIVALENT

a. Using Pull-Up Resistors b. Using HCT Buffer

Figure 18. LSTTL/NMOS to HCMOS Interface

Figure 19. TTL/NMOS–to–CMOS Level Converter

Analog Signal Peak–to–Peak Greater than 5 V

(Also see VHC4316)

Figure 20. 4–Input Multiplexer Figure 21. Sample/Hold Amplifier

+

–

1 OF 4

SWITCHES

+5 V

14

CONTROL

INPUTS

7

5

6
14
15

LSTTL/
NMOS

ANALOG
SIGNALS

ANALOG

SIGNALS

1 OF 4

SWITCHES

1 OF 4

SWITCHES

1 OF 4

SWITCHES

VHC4066

VHC4066

MC74VHC4066

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 2

10

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

MIN MINMAX MAX

MILLIMETERS INCHES

DIM

A
B
C
D
F
G
J
K
M
P
R

8.55

3.80

1.35

0.35

0.40

0.19

0.10
0

°

5.80

0.25

8.75

4.00

1.75

0.49

1.25

0.25

0.25
7

°

6.20

0.50

0.337

0.150

0.054

0.014

0.016

0.008

0.004
0

°

0.228

0.010

0.344

0.157

0.068

0.019

0.049

0.009

0.009
7

°

0.244

0.019

1.27 BSC 0.050 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

–A–

–B–

P 7 PL

G

C

K

SEATING
PLANE

D 14 PL

M

J

R

X 45°

1

7

814

0.25 (0.010) T B A

M

S S

B0.25 (0.010)

M M

F

MC74VHC4066

VHC Data – Advanced CMOS Logic
DL203 — Rev 2

11 MOTOROLA

OUTLINE DIMENSIONS

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948G–01

ISSUE O

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C ––– 1.20 ––– 0.047
D 0.05 0.15 0.002 0.006

F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC
M 0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS. MOLD FLASH
OR GATE BURRS SHALL NOT EXCEED 0.15
(0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION. INTERLEAD FLASH OR
PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED
AT DATUM PLANE –W–.

____

S

U0.15 (0.006) T

2X L/2

S

U

M

0.10 (0.004) V

S

T

L

–U–

SEATING
PLANE

0.10 (0.004)

–T–

SECTION N–N

DETAIL E

J

J1

K

K1

DETAIL E

F

M

–W–

0.25 (0.010)

8

14

7

1

PIN 1
IDENT.

H

G

A

D

C

B

S

U0.15 (0.006) T

–V–

14X REFK

N

N

MC74VHC4066

MOTOROLA VHC Data – Advanced CMOS Logic

DL203 — Rev 2

12

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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MC74VHC4066/D

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