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MC74VHC393ML1
Datasheet (MOTOROLA)
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Datasheet MC74VHC393ML1, MC74VHC393ML2, MC74VHC393M, MC74VHC393MEL, MC74VHC393D Datasheet (MOTOROLA)

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Page 1

SEMICONDUCTOR TECHNICAL DATA
1
REV 0
Motorola, Inc. 1997
6/97
    
Internal flip–flops are triggered by high–to–low transitions of the clock input. Reset for the counters is asynchronous and active–high. State changes of the Q outputs do not occur simultaneously because of internal ripple delays. Therefore, decoded output signals are subject to decoding spikes and should not be used as clocks or as strobes except when gated with the Clock of the VHC393.
The inputs tolerate voltages up to 7V , allowing the interface of 5V systems to 3V systems.
• High Speed: f
max
= 170MHz (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 4µA (Max) at TA = 25°C
• High Noise Immunity: V
NIH
= V
NIL
= 28% V
CC
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: V
OLP
= 0.8V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 236 FETs or 59 Equivalent Gates
LOGIC DIAGRAM
nQA nQB nQC nQD
CPn
RDn
1, 13
2, 12
3, 11 4, 10
5, 9 6, 8
BINARY
COUNTER
FUNCTION TABLE
Inputs
Clock Reset Outputs
XH L H L No Change L L No Change
↑ L No Change ↓ L Next State

D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
ORDERING INFORMATION
MC74VHCXXXD MC74VHCXXXDT MC74VHCXXXM
SOIC TSSOP SOIC EIAJ
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
PIN ASSIGNMENT
11
12
13
14
8
9
105
4
3
2
1
7
6
2QB
2QA
RD2
CP2
V
CC
2QD
2QC
1QB
1QA
RD1
CP1
GND
1QC 1QD
Page 2
MC74VHC393
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 1
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage
– 0.5 to + 7.0
V
V
in
DC Input Voltage
– 0.5 to + 7.0
V
V
out
DC Output Voltage
– 0.5 to VCC + 0.5
V
I
IK
Input Diode Current
– 20
mA
I
OK
Output Diode Current
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 75
mA
Î
Î
P
D
ОООООООООООО
Î
Power Dissipation in Still Air, SOIC Packages†
TSSOP Package†
ÎÎÎÎ
Î
500 450
Î
Î
mW
T
stg
Storage Temperature
– 65 to + 150
_
C
* Absolute maximum continuous ratings are those values beyond which damage to the device
may occur. Exposure to these conditions or conditions beyond those indicated may adversely
affect device reliability . Functional operation under absolute–maximum–rated conditions is not
implied. †Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage
2.0
5.5
V
V
in
DC Input Voltage
0
5.5
V
V
out
DC Output Voltage
0
V
CC
V
T
A
Operating Temperature
– 40
+ 85
_
C
tr, t
f
Input Rise and Fall Time VCC = 3.3V
VCC = 5.0V00
10020ns/V
DC ELECTRICAL CHARACTERISTICS
ÎÎÎ
V
TA = 25°C
TA = – 40 to 85°C
Symbol
Parameter
Test Conditions
ÎÎÎ
V
CC
V
Min
Typ
Max
Min
Max
Unit
ÎÎ
Î
V
IH
ÎÎÎÎ
Î
Minimum High–Level Input Voltage
ОООООО
Î
ÎÎÎ
ÎÎ
Î
2.0
3.0 to
5.5
ÎÎ
Î
1.50
VCC x 0.7
ÎÎÎÎÎÎÎ
Î
1.50
VCC x 0.7
ÎÎ
Î
V
ÎÎ
Î
ÎÎ
Î
V
IL
ÎÎÎÎ
Î
ÎÎÎÎ
Î
Maximum Low–Level Input Voltage
ОООООО
Î
ОООООО
Î
ÎÎÎ
ÎÎ
Î
ÎÎ
Î
2.0
3.0 to
5.5
ÎÎ
Î
ÎÎ
Î
Î
Î
Î
Î
ÎÎ
Î
ÎÎ
Î
0.50
VCC x 0.3
ÎÎ
Î
ÎÎ
Î
ÎÎ
Î
ÎÎ
Î
0.50
VCC x 0.3
V
ÎÎ
Î
ÎÎ
Î
V
OH
ÎÎÎÎ
Î
ÎÎÎÎ
Î
Minimum High–Level Output Voltage
ОООООО
Î
ОООООО
Î
Vin = VIH or V
IL
IOH = – 50µA
ÎÎÎ
ÎÎ
Î
ÎÎ
Î
2.0
3.0
4.5
ÎÎ
Î
ÎÎ
Î
1.9
2.9
4.4
Î
Î
Î
Î
2.0
3.0
4.5
ÎÎ
Î
ÎÎ
Î
ÎÎ
Î
ÎÎ
Î
1.9
2.9
4.4
ÎÎ
Î
ÎÎ
Î
V
ÎÎÎÎÎÎÎÎОООООО
Î
Vin = VIH or V
IL
IOH = – 4mA IOH = – 8mA
ÎÎÎ
ÎÎ
Î
3.0
4.5
ÎÎ
Î
2.58
3.94
ÎÎÎÎÎÎÎ
Î
2.48
3.80
ÎÎ
Î
ÎÎ
Î
ÎÎ
V
OL
ÎÎÎÎ
Î
ÎÎÎÎ
Maximum Low–Level Output Voltage
ОООООО
Î
ОООООО
Vin = VIH or V
IL
IOL = 50µA
ÎÎÎ
ÎÎ
Î
ÎÎ
2.0
3.0
4.5
ÎÎ
Î
ÎÎ
Î
Î
Î
0.0
0.0
0.0
ÎÎ
Î
ÎÎ
0.1
0.1
0.1
ÎÎ
Î
ÎÎ
ÎÎ
Î
ÎÎ
0.1
0.1
0.1
V
ÎÎ
Î
ÎÎ
Î
ÎÎÎÎ
Î
ÎÎÎÎ
Î
ОООООО
Î
ОООООО
Î
Vin = VIH or V
IL
IOL = 4mA IOL = 8mA
ÎÎÎ
ÎÎ
Î
ÎÎ
Î
3.0
4.5
ÎÎ
Î
ÎÎ
Î
Î
Î
Î
Î
ÎÎ
Î
ÎÎ
Î
0.36
0.36
ÎÎ
Î
ÎÎ
Î
ÎÎ
Î
ÎÎ
Î
0.44
0.44
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance cir­cuit. For proper operation, Vin and V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
Page 3
MC74VHC393
VHC Data – Advanced CMOS Logic DL203 — Rev 1
3 MOTOROLA
DC ELECTRICAL CHARACTERISTICS
Unit
TA = – 40 to 85°C
TA = 25°C
ÎÎÎ
V
CC V
Test Conditions
Parameter
Symbol
Unit
Max
Min
Max
Typ
Min
ÎÎÎ
V
CC V
Test Conditions
Parameter
Symbol
ÎÎ
Î
I
in
ÎÎÎÎ
Î
Maximum Input Leakage Current
ОООООО
Î
Vin = 5.5V or GND
ÎÎÎ
ÎÎ
Î
0 to 5.5
ÎÎÎÎÎÎÎ
Î
± 0.1
ÎÎÎÎÎ
Î
± 1.0
µA
ÎÎ
Î
I
CC
ÎÎÎÎ
Î
Maximum Quiescent Supply Current
ОООООО
Î
Vin = VCC or GND
ÎÎÎ
ÎÎ
Î
5.5
ÎÎÎÎÎÎÎ
Î
4.0
ÎÎÎÎÎ
Î
40.0
µA
AC ELECTRICAL CHARACTERISTICS (Input t
r
= tf = 3.0ns)
TA = 25°C
TA = – 40 to 85°C
Symbol
Parameter
Test Conditions
Min
Typ
Max
Min
Max
Unit
ÎÎ
Î
f
max
ОООООО
Î
Maximum Clock Frequency (50% Duty Cycle)
ООООООО
Î
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
ÎÎ
Î
75 45
Î
Î
120
65
ÎÎÎÎ
Î
65 35
ÎÎ
Î
ns
ÎÎÎООООООÎООООООО
Î
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
ÎÎ
Î
125
85
Î
Î
170 115
ÎÎÎÎ
Î
105
75
ÎÎ
Î
t
PLH
,
t
PHL
Maximum Propagation Delay, CP
to QA
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
8.6
11.1
13.2
16.7
1.0
1.0
15.5
19.0
ns
ÎÎÎООООООÎООООООО
Î
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
ÎÎÎÎ
Î
5.8
7.3
ÎÎ
Î
8.5
10.5
Î
Î
1.0
1.0
ÎÎ
Î
10.0
12.0
ÎÎ
Î
t
PLH
,
t
PHL
ОООООО
Î
Maximum Propagation Delay, CP
to QB
ООООООО
Î
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
ÎÎÎÎ
Î
10.2
12.7
ÎÎ
Î
15.8
19.3
Î
Î
1.0
1.0
ÎÎ
Î
18.5
22.0
ns
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
6.8
8.3
9.8
11.8
1.0
1.0
11.5
13.5
ÎÎ
Î
t
PLH
,
t
PHL
ОООООО
Î
Maximum Propagation Delay, CP
to QC
ООООООО
Î
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
ÎÎÎÎ
Î
11.7
14.2
ÎÎ
Î
18.0
21.5
Î
Î
1.0
1.0
ÎÎ
Î
21.0
24.5
ns
ÎÎÎООООООÎООООООО
Î
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
ÎÎÎÎ
Î
7.7
9.2
ÎÎ
Î
11.2
13.2
Î
Î
1.0
1.0
ÎÎ
Î
13.0
15.0
t
PLH
,
t
PHL
Maximum Propagation Delay, CP
to QD
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
13.0
15.5
19.7
23.2
1.0
1.0
23.0
26.5
ns
ÎÎÎООООООÎООООООО
Î
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
ÎÎÎÎ
Î
8.5
10.0
ÎÎ
Î
12.5
14.5
Î
Î
1.0
1.0
ÎÎ
Î
14.5
16.5
ÎÎ
Î
t
PHL
ОООООО
Î
Maximum Propagation Delay, RD to Qn
ООООООО
Î
VCC = 3.3 ± 0.3V CL = 15pF
CL = 50pF
ÎÎÎÎ
Î
7.9
10.4
ÎÎ
Î
12.3
15.8
Î
Î
1.0
1.0
ÎÎ
Î
14.5
18.0
ns
ÎÎ
ОООООО
ООООООО
VCC = 5.0 ± 0.5V CL = 15pF
CL = 50pF
ÎÎ
Î
5.4
6.9
ÎÎ
8.1
10.1
Î
1.0
1.0
ÎÎ
9.5
11.5
ÎÎ
Î
t
OSLH
,
t
OSHL
ОООООО
Î
Output to Output Skew
ООООООО
Î
VCC = 3.3 ± 0.3V CL = 50pF (Note NO TAG)
ÎÎÎÎÎÎÎ
Î
1.5
ÎÎÎÎ
Î
1.5
pF
ÎÎÎООООООÎООООООО
Î
VCC = 5.0 ± 0.5V CL = 50pF (Note NO TAG)
ÎÎÎÎÎÎÎ
Î
1.0
ÎÎÎÎ
Î
1.0
pF
C
in
Maximum Input Capacitance
4
10
10
pF
Typical @ 25°C, VCC = 5.0V
C
PD
Power Dissipation Capacitance (Note NO T AG)
23
pF
1. Parameter guaranteed by design. t
OSLH
= |t
PLHm
– t
PLHn
|, t
OSHL
= |t
PHLm
– t
PHLn
|.
2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I
CC(OPR
)
= CPD VCC fin + ICC/2 (per 4–bit counter). CPD is used to determine
the no–load dynamic power consumption; PD = CPD V
CC
2
fin + ICC VCC.
Page 4
MC74VHC393
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 1
4
NOISE CHARACTERISTICS (Input t
r
= tf = 3.0ns, CL = 50pF, VCC = 5.0V)
TA = 25°C
Symbol Parameter
Typ Max
Unit
V
OLP
Quiet Output Maximum Dynamic V
OL
0.5 0.8 V
V
OLV
Quiet Output Minimum Dynamic V
OL
– 0.5 – 0.8 V
V
IHD
Minimum High Level Dynamic Input Voltage 3.5 V
V
ILD
Maximum Low Level Dynamic Input Voltage 1.5 V
TIMING REQUIREMENTS (Input t
r
= tf = 3.0ns)
TA = 25°C
TA = – 40
to 85°C
Symbol Parameter Test Conditions
Typ Limit Limit
Unit
t
w
Minimum Pulse Width, CP VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
5.0
5.0
5.0
5.0
ns
t
w
Minimum Pulse Width, RD VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
5.0
5.0
5.0
5.0
ns
t
rec
Minimum Recovery Time, RD to CP VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
5.0
4.0
5.0
4.0
ns
tr, t
f
Minimum Input Rise and Fall Times VCC = 3.3 ± 0.3 V
VCC = 5.0 ± 0.5 V
330 100
330 100
ns
SWITCHING W AVEFORMS
t
PHL
V
CC
GND
V
CC
GND
50%
50% V
CC
50%
t
rec
CP
Qn
RD
Figure 1. Figure 2.
Figure 3. Test Circuit
*Includes all probe and jig capacitance
CL*
TEST
POINT
DEVICE
UNDER
TEST
OUTPUT
CP
Qn
50%
V
CC
GND
t
w
1/f
max
t
PLHtPHL
50% V
CC
t
w
Page 5
MC74VHC393
VHC Data – Advanced CMOS Logic DL203 — Rev 1
5 MOTOROLA
QA
QB
QC
QD
CP
RD
1, 13
2, 12
3, 11
4, 10
5, 9
6, 8
EXPANDED LOGIC DIAGRAM
C
DQ
Q
C
DQ
Q
C
DQ
Q
C
DQ
Q
Page 6
MC74VHC393
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 1
6
01234567891011121314150
CP
RD
QA
QB
QC
QD
TIMING DIAGRAM
COUNT SEQUENCE
Outputs
Count
QD QC QB QA
0 L L L L 1 L L L H 2 L L H L 3 L L H H 4 L H L L 5 L H L H 6 L H H L 7 L H H H 8 H L L L
9 H L L H 10 H L H L 11 H L H H 12 H H L L 13 H H L H 14 H H H L 15 H H H H
Page 7
MC74VHC393
VHC Data – Advanced CMOS Logic DL203 — Rev 1
7 MOTOROLA
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
MIN MINMAX MAX
MILLIMETERS INCHES
DIM
A B C D F G J K M P R
8.55
3.80
1.35
0.35
0.40
0.19
0.10 0
°
5.80
0.25
8.75
4.00
1.75
0.49
1.25
0.25
0.25 7
°
6.20
0.50
0.337
0.150
0.054
0.014
0.016
0.008
0.004 0
°
0.228
0.010
0.344
0.157
0.068
0.019
0.049
0.009
0.009 7
°
0.244
0.019
1.27 BSC 0.050 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
–A–
–B–
P 7 PL
G
C
K
SEATING PLANE
D 14 PL
M
J
R
X 45°
1
7
814
0.25 (0.010) T B A
M
S S
B0.25 (0.010)
M M
F
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C ––– 1.20 ––– 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC M 0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V
S
T
L
–U–
SEATING PLANE
0.10 (0.004)
–T–
SECTION N–N
DETAIL E
J
J1
K
K1
DETAIL E
F
M
–W–
0.25 (0.010)
8
14
7
1
PIN 1 IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
–V–
14X REFK
N
N
Page 8
MC74VHC393
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 1
8
OUTLINE DIMENSIONS
M SUFFIX
PLASTIC SOIC EIAJ PACKAGE
CASE 965–01
ISSUE O
H
E
A
1
DIM MIN MAX MIN MAX
INCHES
––– 2.05 ––– 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.18 0.27 0.007 0.011
9.90 10.50 0.390 0.413
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059 0
0.70 0.90 0.028 0.035
––– 1.42 ––– 0.056
A
1
H
E
Q
1
L
E
_
10
_
0
_
10
_
L
E
Q
1
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MA TERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).
0.13 (0.005)
M
0.10 (0.004)
D
Z
E
1
14 8
7
e
A
b
VIEW P
c
L
DETAIL P
M
A
b c D E e
0.50
M
Z
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
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Mfax is a trademark of Motorola, Inc.
How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1,
P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 Mfax: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
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