The MC74VHC1G66 is an advanced high speed CMOS bilateral
analog switch fabricated with silicon gate CMOS technology. It
achieves high speed propagation delays and low ON resistances while
maintaining CMOS low power dissipation. This bilateral switch
controls analog and digital voltages that may vary across the full
power–supply range (from VCC to GND).
The MC74VHC1G66 is compatible in function to a single gate of
the High Speed CMOS MC74VHC4066 and the metal–gate CMOS
MC14066. The device has been designed so that the ON resistances
(RON) are much lower and more linear over input voltage than RON of
the metal–gate CMOS or High Speed CMOS analog switches.
The ON/OFF control inputs are compatible with standard CMOS
outputs; with pull–up resistors, it is compatible with LSTTL outputs.
• High Speed: t
• Low Power Dissipation: I
• Diode Protection Provided on Inputs and Outputs
• Improved Linearity and Lower ON Resistance over Input Voltage
than the MC14066 or the HC4066
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance: HBM > 2000 V; MM > 200 V, CDM > 1500 V
• Chip Complexity: 11 FETs or 3 Equivalent Gates
= TBD (Typ) at VCC = 5 V
PD
= 2 mA (Max) at TA = 25°C
CC
IN/OUT X
A
OUT/IN Y
2
A
V
51
CC
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SC–88A / SOT–353
DF SUFFIX
CASE 419A
MARKING DIAGRAM
d
V9
Pin 1
d = Date Code
PIN ASSIGNMENT
1
2
3GND
4
5VCC
IN/OUT X
OUT/IN Y
ON/OFF CONTROL
A
A
ON/OFF CONTROLGND
43
5–Lead SOT–353 Pinout (Top View)
LOGIC SYMBOL
ON/OFF CONTROL
IN/OUT X
A
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
Semiconductor Components Industries, LLC, 1999
November, 1999 – Rev. 1
X 1
1
UU
1
OUT/IN Y
A
1Publication Order Number:
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
FUNCTION TABLE
On/Off Control InputState of Analog Switch
L
H
Off
On
MC74VHC1G66/D
Page 2
MC74VHC1G66
ABSOLUTE MAXIMUM RATINGS
CharacteristicsSymbolValueUnit
DC Supply VoltageV
Digital Input VoltageV
Analog Output VoltageV
Digital Input Diode CurrentI
DC Supply Current, VCC and GNDI
Power dissipation in still air, SC–88A †P
Lead temperature, 1 mm from case for 10 sT
Storage temperatureT
†Derating — SC–88A Package: –3 mW/_C from 65_ to 125_C
CC
IN
IS
IK
CC
D
L
stg
RECOMMENDED OPERATING CONDITIONS
CharacteristicsSymbolMinMaxUnit
DC Supply VoltageV
Digital Input VoltageV
Analog Input VoltageV
Static or Dynamic Voltage Across SwitchVIO*1.2V
Operating Temperature RangeT
Input Rise and Fall Time
ON/OFF Control InputVCC = 3.3V ± 0.3V
VCC = 5.0V ± 0.5V
* For voltage drops across the switch greater than 1.2V (switch on), excessive VCC current may be drawn; i.e. the current out of the switch may
contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.
Minimum High–Level
Input Voltage
ON/OFF Control Input
RON = Per Spec2.0
3.0
4.5
5.5
V
IL
Maximum Low–Level
Input Voltage
ON/OFF Control Input
RON = Per Spec2.0
3.0
4.5
5.5
I
IN
Maximum Input
Leakage Current
VIN = VCC or GND0 to
5.5
ON/OFF Control Input
I
R
CC
ON
Maximum Quiescent
Supply Current
Maximum ”ON”
Resistance
VIN = VCC or GND
VIO = 0V
VIN = V
IH
VIS = VCC or GND
|IIS| ≤ 10mA (Figure 1)
Endpoints
VIN = V
IH
VIS = VCC or GND
5.52.02040µA
3.0
4.5
5.5
3.0
4.5
5.5
|IIS| ≤ 10mA (Figure 1)
I
OFF
Maximum Off–Channel
Leakage Current
VIN = V
IL
VIS = VCC or GND
5.50.10.51.0µA
Switch Off (Figure 2)
I
ON
Maximum On–Channel
Leakage
Current
VIN = V
IH
VIS = VCC or GND
Switch On (Figure 3)
5.50.10.51.0µA
TA = 25°CTA ≤ 85°CTA ≤ 125°C
1.5
2.1
3.15
3.85
1.35
1.65
0.5
0.9
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
±0.1±1.0±1.0µA
30
20
15
25
12
50
30
20
50
20
8
15
70
40
35
65
26
23
1.5
2.1
3.15
3.85
0.5
0.9
1.35
1.65
100
50
45
90
40
32
V
V
W
W
AC ELECTRICAL CHARACTERISTICS (C
Symbol
t
,
PLH
t
PHL
ÎÎ
ÎÎ
t
,
PLZ
t
PHZ
ÎÎ
t
,
PZL
ÎÎ
t
PZH
ÎÎ
C
IN
ÎÎ
ÎÎ
Parameter
Maximum Propogation
Delay,
ООООО
Input X to Y
ООООО
Maximum Propogation
Delay,
ON/OFF Control to
ООООО
Analog Output
Maximum Propogation
ООООО
Delay,
ON/OFF Control to
ООООО
Analog Output
Maximum Input
apacitance
ООООО
ООООО
Test Conditions
YA = Open
ООООО
Figure 4
ООООО
RL = 1000
Figure 5
ООООО
RL = 1000
ООООО
Figure 5
ООООО
ON/OFF Control Input
Contol Input = GND
ООООО
Analog I/O
Feedthrough
ООООО
= 50 pF, Input tr/tf = 3.0ns)
load
V
(V)
2.0
3.0
Î
4.5
5.5
Î
W
2.0
3.0
4.5
Î
5.5
W
2.0
Î
3.0
4.5
Î
5.5
0.0
5.0
Î
Î
TA = 25°C
Min
Typ
1
0
Î
Î
Î
0
0
Î
15
8
ÎÎÎ
6
4
Î
Î
15
Î
8
6
Î
4
3
Î
Î
Î
4
4
Î
Max
5
2
Î
1
1
Î
35
15
10
Î
7
35
Î
15
10
Î
7
10
Î
10
10
Î
TA ≤ 85°C
Min
Max
6
3
Î
Î
Î
1
1
Î
46
20
ÎÎÎ
13
9
Î
Î
46
Î
20
13
Î
9
10
Î
Î
Î
10
10
Î
TA ≤ 125°C
Min
Max
7
4
Î
Î
Î
2
1
Î
57
25
ÎÎÎ
17
11
Î
Î
57
Î
25
17
Î
11
10
Î
Î
Î
10
10
Î
Unit
ns
ns
ns
pF
Typical @ 25°C, VCC = 5.0V
C
PD
Power Dissipation Capacitance (Note NO T AG)
18
pF
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
2
power consumption; PD = CPD V
fin + ICC VCC.
CC
CC(OPR
= CPD VCC fin + ICC. CPD is used to determine the no–load dynamic
)
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3
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MC74VHC1G66
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Limit
Symbol
ÎÎÎ
BW
ООООООО
Maximum On–Channel
Bandwidth or Minimum
ÎÎÎ
Frequency Response
ООООООО
Figure 7
ISO
off
ÎÎÎ
ÎÎÎ
ÎÎÎÎОООООООÎОООООООООООО
NOISE
ÎÎÎ
ÎÎÎ
ÎÎÎ
THD
ÎÎÎ
ÎÎÎ
Off–Channel Feedthrough
ООООООО
Isolation
Figure 8
ООООООО
Feedthrough Noise Control to
feed
Switch
ООООООО
Figure 9
ООООООО
ООООООО
Total Harmonic Distortion
Figure 10
ООООООО
ООООООО
Parameter
ОООООООООООО
Test Conditions
fin = 1 MHz Sine Wave
Adjust fin voltage to obtain 0 dBm at V
Increase fin = frequency until dB meter reads –3dB
ОООООООООООО
OS
RL = 50W, CL = 10 pF
fin = Sine Wave
ОООООООООООО
Adjust fin voltage to obtain 0 dBm at V
fin = 10 kHz, RL = 600W, CL = 50 pF
ОООООООООООО
IS
fin = 1.0 kHz, RL = 50W, CL = 10 pF
Vin ≤ 1 MHz Square Wave (tr = tf = 2ns)
Adjust RL at setup so that Is = 0 A
ОООООООООООО
RL = 600W, CL = 50 pF
RL = 50W, CL = 10 pF
ОООООООООООО
ОООООООООООО
fin = 1 kHz, RL = 10kW, CL = 50 pF
THD = THD
ОООООООООООО
VIS = 3.0 VPP sine wave
VIS = 4.0 VPP sine wave
ОООООООООООО
VIS = 5.0 VPP sine wave
Measured
– THD
Source
V
Î
3.0
4.5
5.5
Î
3.0
Î
4.5
5.5
Î
3.0
4.5
Î
5.5
3.0
4.5
Î
5.5
3.0
Î
4.5
5.5
Î
Î
3.3
4.5
Î
5.5
CC
1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
2
power consumption; PD = CPD V
fin + ICC VCC.
CC
CC(OPR
= CPD VCC fin + ICC. CPD is used to determine the no–load dynamic
)
25°C
ÎÎ
150
175
200
ÎÎ
–50
ÎÎ
–50
–50
ÎÎ
–40
–40
ÎÎ
–40
45
60
ÎÎ
130
25
ÎÎ
30
60
ÎÎ
ÎÎ
0.20
0.10
ÎÎ
0.06
Unit
Î
MHz
Î
Î
Î
Î
mV
Î
Î
Î
Î
Î
dB
PP
%
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Page 5
PLOTTER
MC74VHC1G66
POWER
SUPPLY
COMPUTER
+–
2
51
43
DC PARAMETER
ANALYZER
V
CC
V
CC
51
V
CC
A
2
43
Figure 1. On Resistance T est Set–UpFigure 2. Maximum Off–Channel Leakage Current
T est Set–Up
V
CC
N/C
A
2
51
43
V
CC
51
V
IH
TEST
POINT
2
43
V
CC
V
IL
V
CC
V
CC
Figure 3. Maximum On–Channel Leakage Current
T est Set–Up
Switch to Position 1 when testing t
Switch to Position 2 when testing t
ALLOWABLE CAMBER TO BE 1 mm/100 mm NONACCUMULATIVE OVER 250
EMBOSSED
CARRIER
100 mm
(3.937”)
1 mm MAX
CAMBER (TOP VIEW)
1 mm
(0.039”) MAX
EMBOSSMENT
TAPE
250 mm
(9.843”)
mm
Figure 13. Carrier Tape Specifications
EMBOSSED CARRIER DIMENSIONS (See Notes 1 and 2)
Tape
Size
8 mm 4.35 mm
1. Metric Dimensions Govern–English are in parentheses for reference only.
2. A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min to
B
1
Max
(0.171”)
0.50 mm max. The component cannot rotate more than 10° within the determined cavity
DD
1.5 +0.1/
–0.0 mm
(0.059
+0.004/
–0.0”)
1
1.0 mm
Min
(0.039”)
EFKPP
1.75
±0.1 mm
(0.069
±0.004”)
3.5
±0.5 mm
(1.38
±0.002”)
2.4 mm
(0.094”)
4.0
±0.10 mm
(0.157
±0.004”)
0
4.0
±0.1 mm
(0.156
±0.004”)
P
2
2.0
±0.1 mm
(0.079
±0.002”)
RTW
25 mm
(0.98”)
0.3
±0.05 mm
(0.01
+0.0038/
–0.0002”)
8.0
±0.3 mm
(0.315
±0.012”)
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Page 9
MC74VHC1G66
13.0 mm ±0.2 mm
1.5 mm MIN
(0.06”)
(0.512” ±0.008”)
t MAX
20.2 mm MIN
A
(0.795”)
REEL DIMENSIONS
Tape
Size
8 mm330 mm
FULL RADIUS
Figure 14. Reel Dimensions
A MaxGt Max
(13”)
DIRECTION OF FEED
8.400 mm, +1.5 mm, –0.0
(0.33”, +0.059”, –0.00)
14.4 mm
(0.56”)
50 mm MIN
(1.969”)
G
BARCODE LABEL
Figure 15. Reel Winding Direction
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9
HOLEPOCKET
Page 10
MC74VHC1G66
CAVITY
TAPE
TOP TAPE
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
Figure 16. T ape Ends for Finished Goods
“T1” PIN ONE TOWARDS
SPROCKET HOLE
COMPONENTS
DIRECTION OF FEED
SC–88A/SOT–353 (5 Pin)
DEVICE
User Direction of Feed
Figure 17. Reel Configuration
TAPE LEADER
NO COMPONENTS
400 mm MIN
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Page 11
Notes
MC74VHC1G66
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Page 12
MC74VHC1G66
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability ,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
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alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer .
PUBLICATION ORDERING INFORMATION
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MC74VHC1G66/D
12
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