Datasheet MC74LVX125M, MC74LVX125DT Datasheet (Motorola)

Page 1

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SEMICONDUCTOR TECHNICAL DATA

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The MC74L VX125 is an advanced high speed CMOS quad bus buffer. The inputs tolerate voltages up to 7V , allowing the interface of 5V systems to 3V systems.

The MC74LVX125 requires the 3–state control input (OE High to place the output into the high impedance state.

) to be set



LVX

• High Speed: t

• Low Power Dissipation: I

= 4.4ns (Typ) at VCC = 3.3V

= 4µA (Max) at TA = 25°C

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Low Noise: V

= 0.5V (Max)

OLP

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300mA

• ESD Performance: HBM > 2000V; Machine Model > 200V

VCCOE3

OE0

Figure 1. 14–Lead Pinout (Top View)

D3 O3 OE2 D2 O2

1314 12 11 10 9 8

21 34567

D0 O0 OE1 D1 O1 GND

LOW–VOLTAGE CMOS

D SUFFIX

14–LEAD SOIC PACKAGE

CASE 751A–03

DT SUFFIX

14–LEAD TSSOP PACKAGE

CASE 948G–01

M SUFFIX

14–LEAD SOIC EIAJ PACKAGE

CASE 965–01

OE0

OE1

6/97

 Motorola, Inc. 1997

OE2

Figure 2. Logic Diagram

OE3

PIN NAMES

Pins

OEn Dn On

FUNCTION TABLE

OEn Dn On

L L

H = High Voltage Level; L = Low V oltage Level; Z = High Impedance State; X = High or Low Voltage Level and T ransitions Are Acceptable, for ICC reasons, DO NOT FLOAT Inputs

REV 0

Function

Output Enable Inputs Data Inputs 3–State Outputs

INPUTS OUTPUTS

L H X

L H Z

Page 2

MC74LVX125

ОООООО

MAXIMUM RATINGS*

Symbol

V V V I I I I P T

CC in

out IK OK out CC

stg

DC Supply Voltage DC Input Voltage DC Output Voltage Input Diode Current Output Diode Current DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation Storage Temperature

* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or

conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is

not implied.

RECOMMENDED OPERATING CONDITIONS

Symbol

out

∆t/∆V

DC Supply Voltage DC Input Voltage DC Output Voltage Operating Temperature, All Package Types Input Rise and Fall Time

Parameter

Value

–0.5 to +7.0 –0.5 to +7.0

–0.5 to VCC +0.5

–20

±20 ±25 ±50

180

–65 to +150

Min

2.0 0 0

–40

Max

3.6

5.5

+85 100

Unit

V V

V mA mA mA mA

Unit

ns/V

DC ELECTRICAL CHARACTERISTICS

Symbol

ÎÎ

Parameter

High–Level Input Voltage

ОООООО

Low–Level Input Voltage

ОООООО

High–Level Output Voltage

ОООООО

(Vin = VIH or VIL)

ОООООО

Low–Level Output Voltage (Vin = VIH or VIL)

ОООООО

Input Leakage Current Maximum Three–State

Leakage Current

ОООООО

Quiescent Supply Current

ОООООÎÎ

IOH = –50µA

ООООО

IOH = –50µA IOH = –4mA

ООООО

IOL = 50µA IOL = 50µA

ООООО

IOL = 4mA Vin = 5.5V or GND Vin = VIL or V

ООООО

Vin = VCC or GND

Test Conditions

= VCC or GND

out

2.0

3.0

3.6

2.0

3.0

3.6

2.0

3.0

2.0

3.0

3.6

TA = 25°C

Min

Typ

Max

1.5

2.0

ÎÎ

2.4

ÎÎÎÎÎÎÎ

0.5

ÎÎÎÎÎÎÎ

1.9

ÎÎ

2.9

2.58

ÎÎ

2.0

3.0

0.0

ÎÎÎÎ

0.8

ÎÎ

0.1

ÎÎ

0.36

±0.1

±0.25

ÎÎÎÎÎÎÎ

4.0

TA = – 40 to 85°C

Min

Max

1.5

2.0

2.4

ÎÎÎÎ

0.5

ÎÎÎÎÎ

0.8

1.9

ÎÎ

2.9

2.48

ÎÎ

0.1

ÎÎÎÎÎ

0.44

±1.0 ±2.5

ÎÎÎÎÎ

40.0

Unit

µA µA

µA

MOTOROLA LCX DATA

BR1339 — REV 3

Page 3

MC74LVX125

AC ELECTRICAL CHARACTERISTICS (Input t

Symbol

PLH

ÎÎ

PHL

ÎÎÎООООООÎООООООО

PZL

ÎÎ

PZH

ÎÎÎООООООÎООООООО

PLZ

PHZ

ÎÎ

Propagation Delay

Input to Output

Output Enable Time

Output Disable Time

Parameter

ОООООО

to O

ОООООО

= tf = 3.0ns)

Test Conditions

VCC = 2.7V CL = 15pF

ООООООО

CL = 50pF

VCC = 3.3 ± 0.3V CL = 15pF

CL = 50pF

VCC = 2.7V CL = 15pF

ООООООО

RL =1kΩ CL = 50pF VCC = 3.3 ± 0.3V CL = 15pF

RL =1kΩ CL = 50pF VCC = 2.7V CL = 50pF

RL =1kΩ

ООООООО

VCC = 3.3 ± 0.3V CL = 50pF

TA = 25°C

Min

Typ

5.8

ÎÎÎÎ

8.3

4.4

ÎÎÎÎ

6.9

5.3

7.8

4.0

ÎÎÎÎ

6.5

10.0

ÎÎÎÎ

8.3

Max

10.1

13.6

ÎÎ

6.2

9.7

ÎÎ

9.3

ÎÎ

12.8

5.6

ÎÎ

9.1

15.7

ÎÎ

11.2

TA = – 40 to 85°C

Min

1.0

Max

13.5

17.0

ÎÎ

8.5

12.0

ÎÎ

12.5

ÎÎ

16.0

7.5

ÎÎ

11.0

19.0

ÎÎ

13.0

Unit

MHz

RL =1kΩ

OSHL

ÎÎ

OSLH

Output–to–Output Skew

ОООООО

(Note NO TAG)

VCC = 2.7V CL = 50pF

ООООООО

VCC = 3.3 ±0.3V CL = 50pF

ÎÎÎÎÎÎÎ

1.5

ÎÎÎÎ

1.5

1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t guaranteed by design.

) or LOW–to–HIGH (t

OSHL

OSLH

); parameter

CAPACITIVE CHARACTERISTICS

TA = 25°C

Symbol

out

Input Capacitance Maximum Three–State Output Capacitance Power Dissipation Capacitance (Note NO T AG)

Parameter

Min

Typ

4 6

Max

2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I dynamic power consumption; PD = CPD  V

 fin + ICC  VCC.

CC(OPR

= CPD  VCC  fin + ICC/4 (per bit). CPD is used to determine the no–load

)

TA = – 40 to 85°C

Min

Max

Unit

pF pF pF

NOISE CHARACTERISTICS (Input t

= tf = 3.0ns, CL = 50pF, VCC = 3.3V , Measured in SOIC Package)

Symbol Characteristic

V V

OLP OLV IHD

Quiet Output Maximum Dynamic V Quiet Output Minimum Dynamic V

Minimum High Level Dynamic Input Voltage 2.0 V Maximum Low Level Dynamic Input Voltage 0.8 V

ILD

TA = 25°C

Typ Max

Unit

0.3 0.5 V

–0.3 –0.5 V

LCX DATA BR1339 — REV 3

3 MOTOROLA

Page 4

MC74LVX125

PLH

50% V

SWITCHING WAVEFORMS

50%

PHL

GND

50%

PZL

50% V

PZHtPHZ

50% V

Figure 3. Figure 4.

TEST CIRCUITS

PLZ

GND HIGH

IMPEDANCE

VOL +0.3V VOH –0.3V

HIGH IMPEDANCE

TEST POINT

OUTPUT

DEVICE UNDER

TEST

*Includes all probe and jig capacitance

CL*

DEVICE

UNDER

TEST

TEST POINT

1 k

OUTPUT

*Includes all probe and jig capacitance

Ω

CL*

CONNECT TO VCC WHEN TESTING t CONNECT TO GND WHEN TESTING t

Figure 5. Propagation Delay T est Circuit Figure 6. Three–State T est Circuit

PLZ

PHZ

AND t

PZL

PZH

MOTOROLA LCX DATA

BR1339 — REV 3

Page 5

SEATING PLANE

MC74LVX125

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

NOTES:

–A

–

814

–B–P 7 PL

M M

D 14 PL

0.25 (0.010) T B A

X 45°

S S

B0.25 (0.010)

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

MILLIMETERS INCHES

MIN MINMAX MAX

DIM

A B C D F G J K M P R

8.75

8.55

4.00

3.80

1.75

1.35

0.49

0.35

1.25

0.40

1.27 BSC 0.050 BSC

0.25

0.19

0.25

0.10 7

5.80

6.20

0.25

0.50

0.337

0.150

0.054

0.014

0.016

0.008

0.004

0.228

0.010

0.344

0.157

0.068

0.019

0.049

0.009

0.009 7

0.244

0.019

14 8

0.13 (0.005)

HEE

0.10 (0.004)

M SUFFIX

PLASTIC SOIC EIAJ PACKAGE

CASE 965–01

ISSUE O

DETAIL P

VIEW P

NOTES:

1 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSIONS D AND E DO NOT INCLUDE MOLD

FLASH OR PROTRUSIONS AND ARE MEASURED

AT THE PARTING LINE. MOLD FLASH OR

PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006)

PER SIDE. 4 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY. 5 THE LEAD WIDTH DIMENSION (b) DOES NOT

INCLUDE DAMBAR PROTRUSION. ALLOWABLE

DAMBAR PROTRUSION SHALL BE 0.08 (0.003)

TOTAL IN EXCESS OF THE LEAD WIDTH

DIMENSION AT MAXIMUM MATERIAL CONDITION.

DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OR THE FOOT. MINIMUM SPACE

BETWEEN PROTRUSIONS AND ADJACENT LEAD

TO BE 0.46 ( 0.018).

MILLIMETERS DIM MIN MAX MIN MAX A

--- 2.05 --- 0.081

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.18 0.27 0.007 0.011

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059

0.70 0.90 0.028 0.035

--- 1.42 --- 0.056

INCHES

LCX DATA BR1339 — REV 3

5 MOTOROLA

Page 6

MC74LVX125

0.10 (0.004)

SEATING

–T–

PLANE

U0.15 (0.006) T

2X L/2

PIN 1 IDENT.

OUTLINE DIMENSIONS

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948G–01

ISSUE O

14X REFK

0.10 (0.004) V

0.25 (0.010)

–U–

–V–

DETAIL E

SECTION N–N

DETAIL E

NOTES:

1 DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982. 2 CONTROLLING DIMENSION: MILLIMETER. 3 DIMENSION A DOES NOT INCLUDE MOLD FLASH,

PROTRUSIONS OR GATE BURRS. MOLD FLASH

OR GATE BURRS SHALL NOT EXCEED 0.15

(0.006) PER SIDE. 4 DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5 DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR

PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN

EXCESS OF THE K DIMENSION AT MAXIMUM

MATERIAL CONDITION. 6 TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY. 7 DIMENSION A AND B ARE TO BE DETERMINED

AT DATUM PLANE –W–.

INCHESMILLIMETERS

–W–

DIM MIN MAX MIN MAX

A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C ––– 1.20 ––– 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024

J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC M 0 8 0 8

____

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MC74LVX125/D

BR1339 — REV 3

Datasheet MC74LVX125M, MC74LVX125DT Datasheet (Motorola)

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