The MC74LCX16652 is a high performance, non–inverting 16–bit
transceiver/registered transceiver operating from a 2.7 to 3.6V supply.
The device is byte controlled. Each byte has separate control inputs
which can be tied together for full 16–bit operation. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5V allows MC74LCX16652 inputs to
be safely driven from 5V devices. The MC74LCX16652 is suitable for
memory address driving and all TTL level bus oriented transceiver
applications.
Data on the A or B bus will be clocked into the registers as the
appropriate clock pin goes from a LOW–to–HIGH logic level. Output
Enable pins (OEBAn
outputs. In the transceiver mode, data present at the high impedance port
may be stored in either the A or the B register or in both. The select
controls (SBAn, SABn) can multiplex stored and real–time (transparent
mode) data. In the isolation mode (both outputs disabled), A data may be
stored in the B register or B data may be stored in the A register. When in
the real–time mode, it is possible to store data without using the internal
registers by simultaneously enabling OEAB and OEBA
configuration, each output reinforces its input (data retention is not
guaranteed in this mode).
• Designed for 2.7 to 3.6V V
• 5.7ns Maximum t
, OEABn) are provided to control the transceiver
. In this
Operation
CC
pd
• 5V T olerant — Interface Capability With 5V TTL Logic
• Supports Live Insertion and Withdrawal
• I
Specification Guarantees High Impedance When VCC = 0V
OFF
• LVTTL Compatible
• LVCMOS Compatible
• 24mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current in All Three Logic States (20µA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds 500mA
• ESD Performance: Human Body Model >2000V; Machine Model >200V
LOW–VOLTAGE CMOS
16–BIT TRANSCEIVER/
REGISTERED TRANSCEIVER
WITH DUAL ENABLE
PLASTIC TSSOP PACKAGE
PIN NAMES
Pins
A0–A15
B0–B15
CABn, CBAn
SABn, SBAn
OEBAn
, OEABn
DT SUFFIX
CASE 1202–01
Function
Side A Inputs/Outputs
Side B Inputs/Outputs
Clock Pulse Inputs
Select Control Inputs
Output Enable Inputs
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
H = High Voltage Level; h = High Voltage Level One Setup Time Prior to the Low–to–High Clock Transition; L = Low Voltage Level; l = Low Voltage Level One Setup
Time Prior to the Low–to–High Clock T ransition; X = Don’t Care; ↑ = Low–to–High Clock Transition; ↑
QB = B input storage register; * = The clocks are not internally gated with either the Output Enables or the Source Inputs. Therefore, data at the A or B ports may be
clocked into the storage registers, at any time. For ICC reasons, Do Not Float Inputs.
Data Ports
h
H
h
H
H
H
QB
perating Mode
l
h
L
H
L
H
QA
QA
L
H
l
h
L
H
= NOT Low–to–High Clock Transition; QA = A input storage register;
Store A and/or B Data
Real Time A Data to B Bus
Real TIme A Data to B Bus; Store A Data
Clock A Data to B Bus; Store A Data
Real Time B Data to A Bus
Real Time B Data to A Bus; Store B Data
Clock B Data to A Bus; Store B Data
Stored B Data to A Bus
ABSOLUTE MAXIMUM RATINGS*
SymbolParameterValueConditionUnit
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions
beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.
1. Output in HIGH or LOW State. IO absolute maximum rating must be observed.
DC Supply Voltage–0.5 to +7.0V
DC Input Voltage–0.5 ≤ VI ≤ +7.0V
DC Output Voltage–0.5 ≤ VO ≤ +7.0Output in 3–StateV
–0.5 ≤ VO ≤ VCC + 0.5Note 1.V
DC Input Diode Current–50VI < GNDmA
DC Output Diode Current–50VO < GNDmA
+50VO > V
CC
mA
DC Output Source/Sink Current±50mA
DC Supply Current Per Supply Pin±100mA
DC Ground Current Per Ground Pin±100mA
Storage Temperature Range–65 to +150°C
LCX DATABR1339 — REV 3
5MOTOROLA
Page 6
MC74LCX16652
RECOMMENDED OPERATING CONDITIONS
SymbolParameterMinTypMaxUnit
V
CC
V
I
V
O
I
OH
I
OL
I
OH
I
OL
T
A
∆t/∆VInput Transition Rise or Fall Rate, VIN from 0.8V to 2.0V ,
DC ELECTRICAL CHARACTERISTICS
SymbolCharacteristicConditionMinMaxUnit
V
IH
V
IL
V
OH
V
OL
I
I
I
OZ
I
OFF
I
CC
∆I
CC
2. These values of VI are used to test DC electrical characteristics only. Functional test should use VIH ≥ 2.4V , VIL ≤ 0.5V.
HIGH Level Input Voltage (Note 2.)2.7V ≤ VCC ≤ 3.6V2.0V
LOW Level Input Voltage (Note 2.)2.7V ≤ VCC ≤ 3.6V0.8V
HIGH Level Output Voltage2.7V ≤ VCC ≤ 3.6V; IOH = –100µAVCC– 0.2V
3. These AC parameters are preliminary and may be modified prior to release.
4. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH–to–LOW (t
guaranteed by design.
Clock Pulse Frequency3170MHz
Propagation Delay
Input to Output
Propagation Delay
Clock to Output
Propagation Delay
Select to Output
Output Enable Time to
High and Low Level
Output Disable Time From
High and Low Level
Setup Time, HIGH or LOW Data to Clock32.52.5ns
Hold Time, HIGH or LOW Data to Clock31.51.5ns
Clock Pulse Width, HIGH or LOW33.03.0ns
Output–to–Output Skew
(Note 4.)
11.5
1.5
31.5
1.5
11.5
1.5
21.5
1.5
21.5
1.5
5.7
5.7
6.2
6.2
6.5
6.5
7.0
7.0
6.5
6.5
1.0
1.0
) or LOW–to–HIGH (t
OSHL
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
6.2
6.2
7.0
7.0
7.0
7.0
8.0
8.0
7.0
7.0
OSLH
ns
ns
ns
ns
ns
ns
); parameter
DYNAMIC SWITCHING CHARACTERISTICS
TA = +25°C
SymbolCharacteristicConditionMinTypMaxUnit
V
OLP
V
OLV
5. Number of outputs defined as “n”. Measured with “n–1” outputs switching from HIGH–to–LOW or LOW–to–HIGH. The remaining output is
measured in the LOW state. The LCX16652 is characterized with 15 outputs switching with 1 output held LOW.
Dynamic LOW Peak Voltage (Note 5.)VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V0.8V
Dynamic LOW Valley Voltage (Note 5.)VCC = 3.3V, CL = 50pF, VIH = 3.3V, VIL = 0V0.8V
CAPACITIVE CHARACTERISTICS
SymbolParameterConditionTypicalUnit
C
IN
C
I/O
C
PD
Input CapacitanceVCC = 3.3V, VI = 0V or V
Input/Output CapacitanceVCC = 3.3V, VI = 0V or V
Power Dissipation Capacitance10MHz, VCC = 3.3V, VI = 0V or V
CC
CC
CC
7pF
8pF
20pF
LCX DATABR1339 — REV 3
7MOTOROLA
Page 8
MC74LCX16652
An, Bn,
SBAn, SABn
Bn, An
WAVEFORM 1 – SAB to B and SBA to A, An to Bn PROPAGATION DELAYS
1.5V
t
, t
PLH
PHL
1.5V
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns
2.7V
0V
V
OH
V
OL
OEBAn
1.5V1.5V
OEABn
t
PZH
An, Bn
t
PZL
An, Bn
WAVEFORM 2 – OEBA/OEAB to An/Bn OUTPUT ENABLE AND DISABLE TIMES
tR = tF = 2.5ns, 10% to 90%; f = 1MHz; tW = 500ns except when noted
NEGATIVE
PULSE
POSITIVE
PULSE
An/Bn to CLOCK SETUP AND HOLD TIMES
t
1.5V
1.5V
WAVEFORM 4 – INPUT PULSE DEFINITION
tR = tF = 2.5ns, 10% to 90% of 0V to 2.7V
w
t
w
1.5V
1.5V
Figure 1. AC Waveforms (continued)
V
CC
R
PULSE
GENERATOR
DUT
R
T
C
L
1
R
L
6V
OPEN
GND
LCX DATABR1339 — REV 3
TESTSWITCH
t
, t
PLH
PHL
t
, t
PZL
PLZ
Open Collector/Drain t
t
, t
PZH
PHZ
CL = 50pF or equivalent (Includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = Z
of pulse generator (typically 50Ω)
OUT
PLH
and t
PHL
Open
6V
6V
GND
Figure 2. T est Circuit
9MOTOROLA
Page 10
MC74LCX16652
OUTLINE DIMENSIONS
S
U
M
L
0.254 (0.010)T
0.076 (0.003)
–T–
SEATING
PLANE
–U–
PIN 1
IDENT.
PLASTIC TSSOP PACKAGE
DT SUFFIX
CASE 1202–01
ISSUE A
K
56X REF
0.12 (0.005)V
M
S
U
T
S
J
2956
B
128
N
A
–V–
N
DETAIL E
D
C
K
K1
J1
SECTION N–N
F
0.25 (0.010)
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS OR GATE
BURRS. MOLD FLASH OR GATE BURRS
SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
5. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
6. DIMENSIONS A AND B ARE TO BE
DETERMINED AT DATUM PLANE –W–.
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
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