Datasheet MC74HC4852ADG Specification

MC74HCT4851A, MC74HCT4852A

Analog Multiplexers/ Demultiplexers with Injection Current Effect Control with LSTTL

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Compatible Inputs

Automotive Customized

This device is pin compatible to standard HC405x and MC1405xB analog mux/demux devices, but feature injection current effect control. This makes them especially suited for usage in automotive applications where voltages in excess of normal logic voltage are common.

The injection current effect control allows signals at disabled analog input channels to exceed the supply voltage range without affecting the signal of the enabled analog channel. This eliminates the need for external diode/ resistor networks typically used to keep the analog channel signals within the supply voltage range.

The devices utilize low power silicon gate CMOS technology. The Channel Select and Enable inputs are compatible with standard CMOS or LSTTL outputs.

Features

• Injection Current Cross−Coupling Less than 1mV/mA (See Figure 6)

• Pin Compatible to HC405x and MC1405xB Devices

• Power Supply Range (V

• In Compliance With the Requirements of JEDEC Standard No. 7 A

• Chip Complexity: 154 FETs or 36 Equivalent Gates

• NLV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable

• These Devices are Pb−Free and are RoHS Compliant

− GND) = 4.5 to 5.5 V

CC

SOIC−16

16

1

16

1

16

1

X = 1 or 2 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package

(Note: Microdot may be in either location)

D SUFFIX

CASE 751B

SOIC−16 WIDE

DW SUFFIX CASE 751G

TSSOP−16 DT SUFFIX

CASE 948F

MARKING

DIAGRAMS

16

HCT485xAG

AWLYWW

1

16

HCT485xA

AWLYWWG

1

16

HCT4

85xA

ALYWG

1

G

August, 2016 − Rev. 8

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet.

1 Publication Order Number:

MC74HCT4851A/D

MC74HCT4851A, MC74HCT4852A

13

X0

14

X1

15

ANALOG

INPUTS/

OUTPUTS

CHANNEL

SELECT

INPUTS

X2

ENABLE

12

X3

1

X4

5

X5

2

X6

4

X7

11

A

10

B

9

C

6

PIN 16 = V PIN 8 = GND

MULTIPLEXER/

DEMULTIPLEXER

CC

Figure 1. MC74HCT4851A Logic Diagram

Single−Pole, 8−Position Plus Common Off

3

COMMON

X

OUTPUT/ INPUT

FUNCTION TABLE − MC74HCT4851A

Control Inputs

Select

Enable

V

CC

L L L L L L L L

H

CBA

L

H

L

H

L

H

L

H

X

L

H

L

H

L

H

L H X

ON Channels

X0 X1 X2 X3 X4 X5 X6 X7

NONE

X2 X1 X0 X3 A B C

1516 14 13 12 11 10

9

INPUTS/OUTPUTS

CHANNEL‐SELECT

ANALOG

INPUTS

Figure 3. MC74HCT4852A Logic Diagram

Double−Pole, 4−Position Plus Common Off

X0

X1

X2

X3

Y0

Y1

Y2

Y3

ENABLE

21 34567

8

X4 X6 X X7 X5 Enable NC GND

Figure 2. MC74HCT4851A 16−Lead Pinout (Top View)

FUNCTION TABLE − MC74HCT4852A

Control Inputs

Select

12

14

15

11

X SWITCH

13

X

COMMON

1

5

2

4

10

A

9

B

6

Y SWITCH

PIN 16 = V PIN 8 = GND

OUTPUTS/INPUTS

3

Y

CC

Enable

L L L L

H

X = Don’t Care

V

CC

BA

L L H H X

L

H

L H X

ON Channels

Y0 Y1 Y2 Y3

NONE

X0 X1 X2 X3

X2 X1 X X0 X3 A B

1516 14 13 12 11 10

21 34567

9

8

Y0 Y2 Y Y3 Y1 Enable NC GND

Figure 4. MC74HCT4852A 16−Lead Pinout (Top View)

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2

MC74HCT4851A, MC74HCT4852A

l

MAXIMUM RATINGS

Symbol Parameter Value Unit

V

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Min Max Unit

V

VIO* Static or Dynamic Voltage Across Switch 0.0 1.2 V

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. *For voltage drops across switch greater than 1.2 V (switch on), excessive V

drawn; i.e., the current out of the switch may contain both V reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

Positive DC Supply Voltage (Referenced to GND) –0.5 to + 7.0 V

CC

V

DC Input Voltage (Any Pin) (Referenced to GND) –0.5 to VCC + 0.5 V

in

I DC Current, Into or Out of Any Pin $25 mA

P

Power Dissipation in Still Air, SOIC Package†

D

TSSOP Package†

T

Storage Temperature Range –65 to + 150 °C

stg

T

Lead Temperature, 1 mm from Case for 10 Seconds

L

SOIC or TSSOP Package

Positive DC Supply Voltage (Referenced to GND) 4.5 5.5 V

CC

V

DC Input Voltage (Any Pin) (Referenced to GND) GND V

in

T

Operating Temperature Range, All Package Types – 55 + 125 °C

A

tr, tfInput Rise/Fall Time VCC = 2.0 V

(Channel Select or Enable Inputs) V

= 4.5 V

CC

V

= 6.0 V

CC

and switch input components. The

CC

500 450

260

CC

0 0 0

1000

500 400

current may be

CC

mW

°C

V

ns

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, V V

should be constrained to the

out

range GND v (V

in

or V

) v VCC.

out

in

and

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V

CC

Unused outputs must be left open.

).

DC CHARACTERISTICS — Digital Section (Voltages Referenced to GND) V

Symbo

V

IH

V

IL

I

in

I

CC

Minimum High−Level Input Voltage, Channel−Select or Enable Inputs

Maximum Low−Level Input Voltage, Channel−Select or Enable Inputs

Maximum Input Leakage Current on Digital Pins (Enable/A/B/C)

Maximum Quiescent Supply Current (per Package)

Parameter Condition

Ron = Per Spec 4.5

Vin = VCC or GND 5.5 ± 0.1 ± 1.0 ± 1.0

V V

in(digital) in(analog)

= VCC or GND

= GND

= GND, Except Where Noted

EE

V

CC

V

Guaranteed Limit

−55 to 25°C ≤85°C ≤125°C

2.0 2.0 2.0 V

to

5.5

0.8 0.8 0.8 V

to

5.5

5.5 2.0 20 40

Unit

mA

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3

MC74HCT4851A, MC74HCT4852A

l

DC CHARACTERISTICS — Analog Section

Symbo

R

Maximum “ON” Resistance Vin = VIL or VIH; VIS = VCC to

on

DR

Delta “ON” Resistance Vin = VIL or VIH; VIS = VCC/2

on

I

Maximum Off−Channel Leakage Current,

off

Any One Channel

I

Maximum On−Channel Leakage

on

1. VIS is the input voltage of an analog I/O pin. is the currebnt flowing in or out of analog I/O pin.

2. I

S

Parameter Condition V

Common Channel

Channel−to−Channel

GND (Note 1); I (Note 2)

(Note 1); I

≤ 2.0 mA (Note 2)

S

Vin = VCC or GND

≤ 2.0 mA

S

Guaranteed Limit

−55 to 25°C ≤85°C ≤125°C

CC

4.5

5.5

4.5

5.5

5.5 ±0.1

550 400

80 60

±0.1

650 500

100

80

±0.1 ±0.1

750 600

120 100

±0.1 ±0.1

5.5 ±0.1 ±0.1 ±0.1

Unit

W

mA

AC CHARACTERISTICS (C

Symbol

t

,

Maximum Propagation Delay, Analog Input to Analog Output 5.0 40 45 50 ns

PHL

t

PLH

t

,

Maximum Propagation Delay, Enable or Channel−Select to Analog Output 5.0 80 90 100 ns

PHL

t

PHZ,PZH

t

,

PLH

t

PLZ,PZL

C

Maximum Input Capacitance Digital Pins

in

= 50 pF, Input tr = tf = 6 ns, VCC = 5.0 V ± 10%)

L

Parameter V

(All Switches Off) Any Single Analog Pin (All Switches Off) Common Analog Pin

C

Power Dissipation Capacitance Typical 5.0 20 pF

PD

INJECTION CURRENT COUPLING SPECIFICATIONS (V

Symbol

VD

Maximum Shift of Output Voltage of Enabled Analog Channel

out

* Iin = Total current injected into all disabled channels.

Parameter Condition Typ Max Unit

= 5V, TA = −55°C to +125°C)

CC

Iin* ≤ 1 mA, RS ≤ 3,9 kW I

* ≤ 10 mA, RS ≤ 3,9 kW

in

I

* ≤ 1 mA, RS ≤ 20 kW

in

I

* ≤ 10 mA, RS ≤ 20 kW

in

−55 to 25°C ≤85°C ≤125°C Unit

CC

10 35 40

0.1

1.0

0.5

5.0

10 35 40

1.0

5.0

2.0 20

pF

mV

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4

MC74HCT4851A, MC74HCT4852A

External DC P.S.

Figure 5. Typical On Resistance VCC = 4.5V

Vin2 / Iin2 meas. here.

Current Source HP4155C Smu #2

Vin1 = 4.9 V (Smu3) Iin1 measure here Vm1 connected here.

VCC = 5 V

RS

GND or V

SS

4

X7

13

X0

6 8

16

3

X

Vout Vm2 connected here.

NOTES: Rs = 3.9 KW or 20 KW.

NOTES: Vm1 & Vm2 are internal NOTES: HP4155C Voltmeters.

Figure 6. Injection Current Coupling Specification

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5

MC74HCT4851A, MC74HCT4852A

Sensor

(8x Identical Circuitry)

6V5V

V

HCT4051A Microcontroller

Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8

Common Out

CC

5V

V

CC

A/D - Input

Figure 7. Actual Technology

Requires 32 passive components and one extra 6V regulator

to suppress injection current into a standard HCT4051 multiplexer

V

CC

A/D - Input

Sensor

(8x Identical Circuitry)

5V

V

HCT4851A Microcontroller

Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 Channel 6 Channel 7 Channel 8

Common Out

CC

Figure 8. MC74HCT4851A Solution

Solution by applying the HCT4851A multiplexer

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6

MC74HCT4851A, MC74HCT4852A

PROGRAMMABLE

POWER SUPPLY

+-

ANALOG IN COMMON OUT

Figure 9. On Resistance T est Set−Up

V

CC

V

EE

V

CC

MINI COMPUTER

GND

ANALOG I/O

PLOTTER

DEVICE

UNDER TEST

OFF

V

16

COMMON O/I

DC ANALYZER

CC

V

CC

A

V

CC

V

CC

V

EE

16

OFF

V

CC

A

NC

V

IH

OFF

6

COMMON O/I

8

Figure 10. Maximum Off Channel Leakage Current,

Any One Channel, T est Set−Up

V

CC

A

ON

V

EE

V

CC

ANALOG I/O

OFF

16

COMMON O/I

V

CC

N/C

V

IH

6

8

Figure 11. Maximum Off Channel Leakage Current,

Common Channel, T est Set−Up

CHANNEL

SELECT

(VI)

ANALOG

OUT

t

PLH

V

M

t

PHL

50%

VI = GND to 3.0 V V

= 1.3 V

M

Figure 13. Propagation Delays, Channel Select

to Analog Out

V

IL

6

8

Figure 12. Maximum On Channel Leakage Current,

Channel to Channel, T est Set−Up

V

CC

V

CC

ON/OFF

CC

16

ANALOG I/O

GND

OFF/ON

6

8

CHANNEL SELECT

*Includes all probe and jig capacitance

Figure 14. Propagation Delay, T est Set−Up Channel

Select to Analog Out

COMMON O/I

TEST POINT

CL*

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7

ANALOG

IN

(V

)

I

t

PLH

ANALOG

OUT

VI = GND to 3.0 V V

= 1.3 V

M

50%

MC74HCT4851A, MC74HCT4852A

V

CC

GND

t

PHL

50%

ANALOG I/O

V

CC

16

ON

COMMON O/I

TEST POINT

CL*

6

8

*Includes all probe and jig capacitance

Figure 15. Propagation Delays, Analog In

to Analog Out

t

PZL

PZH

t

r

t

PLZ

t

PHZ

t

f

ENABLE

(V

)

I

ANALOG

OUT

ANALOG

OUT

V

= GND to 3.0 V

I

V

= 1.3 V

M

50%

Figure 17. Propagation Delays, Enable to

Analog Out

90% V

M

10%

90%

V

CC

GND

HIGH IMPEDANCE

V

OL

V

OH

HIGH IMPEDANCE

Figure 16. Propagation Delay , Test Set−Up

Analog In to Analog Out

POSITION 1 WHEN TESTING t

1

2

V

CC

1

2

POSITION 2 WHEN TESTING t

ANALOG I/O

ON/OFF

ENABLE

6

V

CC

16

8

Figure 18. Propagation Delay , Test Set−Up

Enable to Analog Out

PHZ PLZ

AND t

PZH

PZL

10kW

TEST POINT

CL*

V

CC

V

CC

A

16

COMMON O/I

ANALOG I/O

V

CC

6

8

11

CHANNEL SELECT

Figure 19. Power Dissipation Capacitance,

Test Set−Up

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8

NC

MC74HCT4851A, MC74HCT4852A

E

0

1

2

3

4

5

6

7

Disabled Analog Mux Input

V

> VCC + 0.7V

in

Figure 20. Diagram of Bipolar Coupling Mechanism

Appears if V

exceeds VCC, driving injection current into the substrate

in

Gate = V

CC

(Disabled)

P+ P+

+

N - Substrate (on VCC potential)

Common Analog Output V

> V

out

CC

A

B

C

NABLE

11

10

9

6

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

13

14

15

12

X

1

X

5

X

2

X

4

X

INJECTION

CURRENT CONTROL

3

X

Figure 21. Function Diagram, HCT4851A

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9

MC74HCT4851A, MC74HCT4852A

10

E

0

1

2

3

0

1

2

3

NABLE

A

9

B

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

13

14

1315

12

X

3

X

1

Y

5

Y

6

INJECTION

CURRENT CONTROL

2

Y

INJECTION

CURRENT CONTROL

INJECTION

CURRENT CONTROL

4

Y

3

Y

Figure 22. Function Diagram, HCT4852A

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10

MC74HCT4851A, MC74HCT4852A

ORDERING INFORMATION

Device Package Shipping

MC74HCT4851ADG SOIC−16

(Pb−Free)

MC74HCT4851ADR2G SOIC−16

(Pb−Free)

NLV74HCT4851ADRG* SOIC−16

(Pb−Free)

MC74HCT4851ADTG TSSOP−16

(Pb−Free)

M74HCT4851ADTR2G TSSOP−16

(Pb−Free)

NLVHCT4851ADTR2G* TSSOP−16

(Pb−Free)

M74HCT4851ADWR2G SOIC−16 WIDE

(Pb−Free)

MC74HCT4852ADG SOIC−16

(Pb−Free)

MC74HCT4852ADR2G SOIC−16

(Pb−Free)

MC74HCT4852ADTG TSSOP−16

(Pb−Free)

M74HCT4852ADTR2G TSSOP−16

(Pb−Free)

NLVHCT4852ADTR2G* TSSOP−16

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP

Capable.

48 Units / Rail

2500 Units / Tape & Reel

48 Units / Rail

2500 Units / Tape & Reel

1000 Units / Tape & Reel

48 Units / Rail

2500 Units / Tape & Reel

48 Units / Rail

2500 Units / Tape & Reel

†

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11

MC74HCT4851A, MC74HCT4852A

SOIC−16

PACKAGE DIMENSIONS

D SUFFIX

CASE 751B−05

ISSUE K

−T−

−A−

16 9

−B−

18

G

K

C

SEATING

PLANE

D

16 PL

0.25 (0.010) A

M

S

B

T

S

8 PLP

M

0.25 (0.010) B

S

X 45

R

_

M

SOLDERING FOOTPRINT

8X

6.40

16X

1.12

1

16

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

DIM MIN MAX MIN MAX

A 9.80 10.00 0.386 0.393

F

J

B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7

____

P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019

INCHESMILLIMETERS

16X

0.58

1.27

PITCH

89

DIMENSIONS: MILLIMETERS

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12

MC74HCT4851A, MC74HCT4852A

SOIC−16 WB

PACKAGE DIMENSIONS

DW SUFFIX

CASE 751G−03

ISSUE D

16 9

M

B

H8X

M

0.25

0.25 B

14X

e

D

A

q

_

E

h X 45

81

B16X

M

S

A

T

B

S

A1

A

C

T

SEATING PLANE

L

NOTES:

1. DIMENSIONS ARE IN MILLIMETERS.

2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994.

3. DIMENSIONS D AND E DO NOT INLCUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION.

MILLIMETERS

DIM MIN MAX

A 2.35 2.65

A1 0.10 0.25

B 0.35 0.49 C 0.23 0.32 D 10.15 10.45 E 7.40 7.60 e 1.27 BSC H 10.05 10.55 h 0.25 0.75 L 0.50 0.90 q 0 7

__

SOLDERING FOOTPRINT*

16X

0.58

11.00

1

16X

1.62

1.27 PITCH

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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13

TSSOP−16

0.10 (0.004)

P

al

−T−

SEATING PLANE

L

U0.15 (0.006) T

PIN 1 IDENT.

U0.15 (0.006) T

D

S

2X L/2

S

MC74HCT4851A, MC74HCT4852A

PACKAGE DIMENSIONS

CASE 948F

ISSUE B

16X REFK

0.10 (0.004) V

M

S

U

T

S

K

K1

16

1

9

B

−U−

8

J1

SECTION N−N

J

N

0.25 (0.010)

M

A

−V−

N

F

DETAIL E

C

DETAIL E

H

G

SOLDERING FOOTPRINT

7.06

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH.

PROTRUSIONS OR GATE BURRS. MOLD FLASH OR

GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER

SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD

FLASH OR PROTRUSION. INTERLEAD FLASH OR

PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER

SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBAR PROTRUSION

SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K

DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR

REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT

DATUM PLANE -W-.

DIM MIN MAX MIN MAX

A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C −−− 1.20 −−− 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.18 0.28 0.007 0.011 J 0.09 0.20 0.004 0.008

−W−

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC M 0 8 0 8

____

INCHESMILLIMETERS

1

0.65 PITCH

16X

0.36

ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/ Patent− Marking.pdf . S CILLC reserves t he right to m ake changes wit hout further notice to any products h erein. SCILLC makes no warranty , r epresentation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental d amages. “Typical” parameters which may be p r ovided i n SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical e xperts. SCILLC does not convey a ny license under its p atent r ight s n or the rights of ot hers. S CILLC p roducts a re n ot d esigned, i ntended, or authorized for use as components in systems intended for surgic al i mplant into the body , o r other applications intended to support or sustain life, or f or a ny o t her a pplicat ion in w hich the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, em ployees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable at torney f ees a r ising o ut o f, d irectly o r indirectly, a ny c laim o f p ersonal i njury o r d eath a ssociated wit h s uch u nintended o r u naut horized u se, e ven if such claim alleges that SCILLC was negligent r egarding the design o r manuf acture o f t he p art. SCILLC i s a n E qual O pportunity/ Aff irmative A ction E mployer . T his l iterature i s subject t o all applicable copyright laws and is not for resale in any manner.

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LITERATURE FULFILLMENT:

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MC74HCT4851A/D

14

Mouser Electronics

Authorized Distributor

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ON Semiconductor: MC74HC4851ANG MC74HC4851AD MC74HC4851ADG MC74HC4851ADR2 MC74HC4851ADR2G

MC74HC4851ADTR2 MC74HC4851ADTR2G MC74HC4851ADWR2 MC74HC4851ADWR2G MC74HC4851AN MC74HC4852AD MC74HC4852ADG MC74HC4852ADR2 MC74HC4852ADR2G MC74HC4852ADTR2 MC74HC4852ADTR2G MC74HC4852AN MC74HC4852ANG M74HCT4851ADTR2G M74HCT4851ADWR2G MC74HCT4851ADG MC74HCT4851ADR2G MC74HCT4851ADTG M74HCT4852ADTR2G MC74HCT4852ADG MC74HCT4852ADR2G MC74HCT4852ADTG NLVHC4851ADTR2G NLV74HCT4851ADRG NLVHCT4851ADTR2G NLV74HC4851ADR2G NLV74HC4851AMNTWG NLVHCT4852ADTR2G

Datasheet MC74HC4852ADG Specification

Specifications and Main Features

Frequently Asked Questions

User Manual