Page 1
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
! "
High–Performance Silicon–Gate CMOS
The MC54/74HC175 is identical in pinout to the LS175. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device consists of four D flip–flops with common Reset and Clock
inputs, a nd separate D inputs. Reset (active–low) is asynchronous and
occurs when a low level is applied to the Reset input. Information at a D input
is transferred to the corresponding Q output on the next positive going edge
of the Clock input.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity 166 FETs or 41.5 Equivalent Gates
LOGIC DIAGRAM
PIN 16 = V
CC
PIN 8 = GND
9
4
5
12
13
CLOCK
D0
D1
D2
D3
RESET
1
DATA
INPUTS
2
3
7
6
10
11
15
14
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
INVERTING
AND
NONINVERTING
OUTPUTS
PIN ASSIGNMENT
FUNCTION TABLE
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
D2
D3
Q3
Q3
V
CC
CLOCK
Q2
Q2
D0
Q0
Q0
RESET
GND
Q1
Q1
D1
Inputs Outputs
Reset Clock D Q Q
L X X L H
H H H L
H L L H
H L X No Change
D SUFFIX
SOIC PACKAGE
CASE 751B–05
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ORDERING INFORMATION
MC54HCXXXJ
MC74HCXXXN
MC74HCXXXD
Ceramic
Plastic
SOIC
1
16
1
16
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
1
16
Page 2
MC54/74HC175
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V
in
DC Input Voltage (Referenced to GND)
– 1.5 to VCC + 1.5
V
V
out
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
I
in
DC Input Current, per Pin
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 50
mA
P
D
Power Dissipation in Still Air,Plastic or Ceramic DIP†
SOIC Package†
750
500
mW
T
stg
Storage Temperature
– 65 to + 150
_
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
(Ceramic DIP)
260
300
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
Ceramic DIP: – 10 mW/_C from 100_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, V
out
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
– 55
+ 125
_
C
tr, t
f
Input Rise and Fall Time VCC = 2.0 V
(Figure 1) VCC = 4.5 V
VCC = 6.0 V
0
0
0
1000
500
400
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
CC
V
– 55 to
25_C
v
85_Cv 125_C
Unit
V
IH
Minimum High–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4 2
V
V
IL
Maximum Low–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
Vin = VIH or V
IL
|I
out
| v 20 µA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.70
5.20
Vin = VIH or V
IL
|I
out
| v 20 µA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.40
0.40
I
in
Maximum Input Leakage Current
Vin = VCC or GND
6.0
± 0.1
± 1.0
± 1.0
µA
I
CC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
I
out
= 0 µA
6.0
8
80
160
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
V
OH
V
OL
Minimum High–Level Output
Voltage
Maximum Low–Level Output
Voltage
V
V
Page 3
MC54/74HC175
High–Speed CMOS Logic Data
DL129 — Rev 6
3 MOTOROLA
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, Input tr = tf = 6 ns)
Guaranteed Limit
Symbol
Parameter
V
CC
V
– 55 to
25_C
v
85_Cv 125_C
Unit
f
max
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
2.0
4.5
6.0
6.0
30
35
4.8
24
28
4.0
20
24
MHz
t
PLH
,
t
PHL
Maximum Propagation Delay, Clock to Q or Q
(Figures 1 and 4)
2.0
4.5
6.0
150
30
26
190
38
33
225
45
38
ns
t
PHL
Maximum Propagation Delay, Reset to Q or Q
(Figures 2 and 4)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
C
in
Maximum Input Capacitance
—
10
10
10
pF
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25°C, VCC = 5.0 V
35
*Used to determine the no–load dynamic power consumption: PD = CPD V
CC
2
f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
TIMING REQUIREMENTS (Input t
r
= tf = 6 ns)
Guaranteed Limit
Symbol
Parameter
V
CC
V
– 55 to
25_C
v
85_Cv 125_C
Unit
t
su
Minimum Setup Time, Data to Clock
(Figure 3)
2.0
4.5
6.0
100
20
17
125
25
21
150
30
26
ns
t
h
Minimum Hold Time, Clock to Data
(Figure 3)
2.0
4.5
6.0
3
3
3
3
3
3
3
3
3
ns
t
rec
Minimum Recovery Time, Reset Inactive to Clock
(Figure 2)
2.0
4.5
6.0
100
20
17
125
25
21
150
30
26
ns
t
w
Minimum Pulse Width, Clock
(Figure 1)
2.0
4.5
6.0
80
16
14
100
20
17
120
24
20
ns
t
w
Minimum Pulse Width, Reset
(Figure 2)
2.0
4.5
6.0
80
16
14
100
20
17
120
24
20
ns
tr, t
f
Maximum Input Rise and Fall Times
(Figure 1)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
ns
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
C
PD
Power Dissipation Capacitance (Per Flip–Flop)*
pF
Page 4
MC54/74HC175
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
4
SWITCHING WAVEFORMS
Figure 1.
Figure 2.
50%
50%
50%
50%
V
CC
V
CC
GND
GND
RESET
Q
Q
CLOCK
t
PLH
t
PHL
50%
DATA
CLOCK
V
CC
V
CC
GND
Figure 3.
GND
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 4.
1/f
max
CLOCK
Q or Q
t
f
t
r
V
CC
GND
90%
50%
10%
90%
50%
10%
t
PLH
t
PHL
t
TLH
t
THL
t
w
t
w
t
rec
VALID
t
h
t
su
TEST CIRCUIT
Page 5
MC54/74HC175
High–Speed CMOS Logic Data
DL129 — Rev 6
5 MOTOROLA
D Q
C
C
R
D0
CLOCK
D1
D2
D3
RESET
1
13
12
5
9
4
2
3
7
6
10
11
15
14
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
EXPANDED LOGIC DIAGRAM
D Q
C
C
R
D Q
C
C
R
D Q
C
C
R
Page 6
MC54/74HC175
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
6
OUTLINE DIMENSIONS
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
ISSUE V
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
19.05
6.10
—
0.39
1.40
0.21
3.18
19.93
7.49
5.08
0.50
1.65
0.38
4.31
0
°
0.51
15
°
1.01
1.27 BSC
2.54 BSC
7.62 BSC
MIN MINMAX MAX
INCHES MILLIMETERS
DIM
0.750
0.240
—
0.015
0.055
0.008
0.125
0.785
0.295
0.200
0.020
0.065
0.015
0.170
0.050 BSC
0.100 BSC
0.300 BSC
A
B
C
D
E
F
G
J
K
L
M
N
0
°
0.020
15
°
0.040
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIM F MAY NARROW TO 0.76 (0.030) WHERE
THE LEAD ENTERS THE CERAMIC BODY.
1 8
916
–A
–
–B
–
C
K
N
G
E
F
D 16 PL
–T
–
SEATING
PLANE
M
L
J 16 PL
0.25 (0.010) T A
M
S
0.25 (0.010) T B
M
S
MIN MINMAX MAX
INCHES MILLIMETERS
DIM
A
B
C
D
F
G
H
J
K
L
M
S
18.80
6.35
3.69
0.39
1.02
0.21
2.80
7.50
0
°
0.51
19.55
6.85
4.44
0.53
1.77
0.38
3.30
7.74
10
°
1.01
0.740
0.250
0.145
0.015
0.040
0.008
0.110
0.295
0
°
0.020
0.770
0.270
0.175
0.021
0.070
0.015
0.130
0.305
10
°
0.040
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
2.54 BSC
1.27 BSC
0.100 BSC
0.050 BSC
–A
–
B
1 8
916
F
H
G
D
16 PL
S
C
–T
–
SEATING
PLANE
K
J
M
L
T A0.25 (0.010)
M M
0.25 (0.010) T B A
M
S S
MIN MINMAX MAX
MILLIMETERS INCHES
DIM
A
B
C
D
F
G
J
K
M
P
R
9.80
3.80
1.35
0.35
0.40
0.19
0.10
0
°
5.80
0.25
10.00
4.00
1.75
0.49
1.25
0.25
0.25
7
°
6.20
0.50
0.386
0.150
0.054
0.014
0.016
0.008
0.004
0
°
0.229
0.010
0.393
0.157
0.068
0.019
0.049
0.009
0.009
7
°
0.244
0.019
1.27 BSC 0.050 BSC
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
1
8
916
–A
–
–B
–
D 16 PL
K
C
G
–T
–
SEATING
PLANE
R X 45°
M
J
F
P 8 PL
0.25 (0.010) B
M M
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
Page 7
MC54/74HC175
High–Speed CMOS Logic Data
DL129 — Rev 6
7 MOTOROLA
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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters can and do vary in different
applications. All operating parameters, including “T ypicals” must be validated for each customer application by customer’s technical experts. Motorola does
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MC54/74HC175/D
*MC54/74HC175/D*
◊
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