Datasheet MC74HC125AD, MC74HC125AN, MC74HC125ADT Datasheet (Motorola)

Page 1



SEMICONDUCTOR TECHNICAL DATA

!    "  !

High–Performance Silicon–Gate CMOS

The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

The HC125A and HC126A noninverting buffers are designed to be used with 3–state memory address drivers, clock drivers, and other bus–oriented systems. The devices have four separate output enables that are active–low (HC125A) or active–high (HC126A).

• Output Drive Capability: 15 LSTTL Loads

• Outputs Directly Interface to CMOS, NMOS, and TTL

• Operating Voltage Range: 2.0 to 6.0 V

• Low Input Current: 1.0 µA

• High Noise Immunity Characteristic of CMOS Devices

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 72 FETs or 18 Equivalent Gates

LOGIC DIAGRAM

HC125A

Active–Low Output Enables

Active–High Output Enables

HC126A

 

N SUFFIX

14–LEAD PLASTIC DIP PACKAGE

CASE 646–06

D SUFFIX

14–LEAD PLASTIC SOIC PACKAGE

CASE 751A–03

DT SUFFIX

14–LEAD PLASTIC TSSOP PACKAGE

CASE 948G–01

OE1

OE2

OE3

OE4

Inputs Output

AOE Y

HL H

LL L

XH Z

PIN 14 = V PIN 7 = GND

FUNCTION TABLE

HC125A

OE1

OE2

OE3

OE4

Inputs Output

AOE Y

HH H

LH L

XL Z

HC126A

ORDERING INFORMATION

MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT

Plastic SOIC TSSOP

PIN ASSIGNMENT

OE1

A1 Y1

OE2

A2 Y2

GND

1 2 3 4

6 7

14 13 12 11 105

OE4 A4

Y4 OE3

4/97

 Motorola, Inc. 1997

REV 8

Page 2

MC74HC125A MC74HC126A

MAXIMUM RATINGS*

Symbol

DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

out

DC Input Current, per Pin

DC Output Current, per Pin

out

DC Supply Current, VCC and GND Pins

Power Dissipation in Still Air Plastic DIP†

ОООООООООООО

Storage Temperature

stg

Lead Temperature, 1 mm from Case for 10 Seconds

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Vin, V

tr, t

ÎÎ

DC Supply Voltage (Referenced to GND)

DC Input Voltage, Output Voltage

out

(Referenced to GND)

Operating Temperature, All Package Types

Input Rise and Fall Time VCC = 2.0 V

(Figure 1) VCC = 4.5 V

ОООООООООООО

Parameter

SOIC Package†

TSSOP Package†

(Plastic DIP, SOIC or TSSOP Package)

Parameter

VCC = 6.0 V

Value

– 0.5 to + 7.0 – 0.5 to VCC + 0.5 – 0.5 to VCC + 0.5

± 20 ± 35 ± 75

750 500 450

ÎÎÎÎ

– 65 to + 150

260

Min

Max

2.0

6.0

– 55

+ 125

1000

500

400

Unit

V V

V mA mA mA

Unit

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

should be constrained to the

out

range GND v (Vin or V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.

) v VCC.

out

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Symbol

ÎÎ

ÎÎÎОООООООÎООООООО

ÎÎ

Minimum High–Level Input

ООООООО

Voltage

ООООООО

Maximum Low–Level Input Voltage

ООООООО

Minimum High–Level Output Voltage

ООООООО

Maximum Low–Level Output

ООООООО

Voltage

ООООООО

Parameter

Test Conditions

= VCC – 0.1 V

out

ООООООО

| v 20 µA

out

ООООООО

= 0.1 V

out

| v 20 µA

out

ООООООО

Vin = V

| v 20 µA

out

ООООООО

Vin = V

ООООООО

| v 20 µA

out

ООООООО

Vin = V

ООООООО

| v 3.6 mA

out

| v 6.0 mA

out

| v 7.8 mA

out

| v 3.6 mA

out

| v 6.0 mA

out

| v 7.8 mA

out

2.0

ÎÎ

3.0

4.5

ÎÎ

6.0

2.0

3.0

ÎÎ

4.5

ÎÎ

6.0

2.0

4.5

ÎÎ

6.0

3.0

4.5

ÎÎ

6.0

2.0

ÎÎ

4.5

6.0

ÎÎ

3.0

ÎÎ

4.5

6.0

ÎÎ

Guaranteed Limit

– 55 to

25_C

1.5

ÎÎ

2.1

3.15

ÎÎ

4.2

0.5

0.9

ÎÎ

1.35

ÎÎ

1.8

1.9

4.4

ÎÎ

5.9

2.48

3.98

ÎÎ

5.48

0.1

ÎÎ

0.1

ÎÎ

0.26

ÎÎ

0.26

ÎÎ

85_C

1.5

ÎÎ

2.1

3.15

ÎÎ

4.2

0.5

0.9

ÎÎ

1.35

ÎÎ

1.8

1.9

4.4

ÎÎ

5.9

2.34

3.84

ÎÎ

5.34

0.1

ÎÎ

0.1

ÎÎ

0.33

ÎÎ

0.33

ÎÎ

125_C

1.5

ÎÎ

2.1

3.15

ÎÎ

4.2

0.5

0.9

ÎÎ

1.35

ÎÎ

1.8

1.9

4.4

ÎÎ

5.9

2.2

3.7

ÎÎ

5.2

0.1

ÎÎ

0.1

ÎÎ

0.4

ÎÎ

0.4

ÎÎ

Unit

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

Page 3

MC74HC125A MC74HC126A

DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)

Guaranteed Limit

Symbol

ÎÎ

Parameter

Maximum Input Leakage Current Maximum Three–State Leakage

ООООООО

Current

ООООООО

Maximum Quiescent Supply Current (per Package)

Test Conditions

Vin = VCC or GND Output in High–Impedance State

ООООООО

Vin = VIL or V V

= VCC or GND

out

ООООООО

Vin = VCC or GND I

= 0 µA

out

6.0

ÎÎ

6.0

NOTE:Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

– 55 to

25_C

± 0.1 ± 0.5

ÎÎ

4.0

85_C

± 1.0 ± 5.0

ÎÎ

125_C

± 1.0 ± 10

ÎÎ

160

Unit

µA µA

µA

AC ELECTRICAL CHARACTERISTICS (C

= 50 pF, Input tr = tf = 6.0 ns)

Guaranteed Limit

Symbol

PLH

ÎÎ

PHL

ÎÎ

PLZ

ÎÎ

PHZ

ÎÎ

PZL

ÎÎ

PZH

ÎÎ

TLH

ÎÎ

THL

ÎÎ

out

ÎÎ

Parameter

Maximum Propagation Delay, Input A to Output Y

ООООООООООООООО

(Figures 1 and 3)

ООООООООООООООО

Maximum Propagation Delay, Output Enable to Y

ООООООООООООООО

(Figures 2 and 4)

ООООООООООООООО

Maximum Propagation Delay, Output Enable to Y

ООООООООООООООО

(Figures 2 and 4)

ООООООООООООООО

Maximum Output Transition Time, Any Output

ООООООООООООООО

(Figures 1 and 3)

ООООООООООООООО

Maximum Input Capacitance Maximum Three–State Output Capacitance

(Output in High–Impedance State)

ООООООООООООООО

2.0

ÎÎ

3.0

4.5

ÎÎ

6.0

2.0

ÎÎ

3.0

4.5

ÎÎ

6.0

2.0

ÎÎ

3.0

4.5

ÎÎ

6.0

2.0

ÎÎ

3.0

4.5

ÎÎ

6.0 — —

ÎÎ

– 55 to

25_C

ÎÎ

36 18

ÎÎ

120

ÎÎ

45 24

ÎÎ

20 90

ÎÎ

36 18

ÎÎ

15 60

ÎÎ

22 12

ÎÎ

10 10

85_C

115

ÎÎ

45 23

ÎÎ

150

ÎÎ

60 30

ÎÎ

115

ÎÎ

45 23

ÎÎ

20 75

ÎÎ

28 15

ÎÎ

13 10 15

ÎÎ15ÎÎ

125_C

135

ÎÎ

60 27

ÎÎ

180

ÎÎ

80 36

ÎÎ

135

ÎÎ

60 27

ÎÎ

23 90

ÎÎ

34 18

ÎÎ

15 10 15

ÎÎ

Unit

pF pF

NOTE:For propagation delays with loads other than 50 pF , and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

Power Dissipation Capacitance (Per Buffer)*

*Used to determine the no–load dynamic power consumption: PD = CPD V

Motorola High–Speed CMOS Data Book (DL129/D).

High–Speed CMOS Logic Data DL129 — Rev 6

Typical @ 25°C, VCC = 5.0 V

f + ICC VCC. For load considerations, see Chapter 2 of the

3 MOTOROLA

Page 4

MC74HC125A MC74HC126A

90%

TLH

10%

90%

50%

10%

50%

Figure 1.

INPUT A

OUTPUT Y

PLH

SWITCHING WAVEFORMS

PHL

THL

GND

OE (HC125A)

OE (HC126A)

OUTPUT Y

50%

PZLtPLZ

50%

PZHtPHZ

50%

Figure 2.

10%

90%

CC GND V

CC GND

HIGH IMPEDANCE

OL V

OH HIGH IMPEDANCE

TEST POINT

OUTPUT

DEVICE

UNDER

TEST

*Includes all probe and jig capacitance

CL*

Figure 3. T est Circuit

DEVICE UNDER

TEST

TEST POINT

1 k

OUTPUT

*Includes all probe and jig capacitance

Ω

CL *

CONNECT TO VCC WHEN TESTING t CONNECT TO GND WHEN TESTING t

Figure 4. T est Circuit

PLZ

PHZ

AND t

and t

PZL.

PZH.

HC125A

(1/4 OF THE DEVICE)

HC126A

(1/4 OF THE DEVICE)

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

Page 5

SEATING PLANE

MC74HC125A MC74HC126A

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

X 45°

ISSUE F

M M

B0.25 (0.010)

–A–

814

P 7 PL

–B–

D 14 PL

0.25 (0.010) T B A

S S

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

MILLIMETERS INCHES

MIN MINMAX MAX

DIM

A B C D F G J K M P R

8.75

8.55

4.00

3.80

1.75

1.35

0.49

0.35

1.25

0.40

1.27 BSC 0.050 BSC

0.25

0.19

0.25

0.10 7

5.80

6.20

0.25

0.50

0.337

0.150

0.054

0.014

0.016

0.008

0.004

0.228

0.010

0.344

0.157

0.068

0.019

0.049

0.009

0.009 7

0.244

0.019

N SUFFIX

PLASTIC DIP PACKAGE

CASE 646–06

ISSUE L

14 8

A F

SEATING

HG D

PLANE

NOTES:

1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION.

2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.

3. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

4. ROUNDED CORNERS OPTIONAL.

DIM MIN MAX MIN MAX

A 0.715 0.770 18.16 19.56 B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 F 0.040 0.070 1.02 1.78

G 0.100 BSC 2.54 BSC

H 0.052 0.095 1.32 2.41 J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 L 0.300 BSC 7.62 BSC

M 0 10 0 10

____

N 0.015 0.039 0.39 1.01

MILLIMETERSINCHES

High–Speed CMOS Logic Data DL129 — Rev 6

5 MOTOROLA

Page 6

MC74HC125A MC74HC126A

OUTLINE DIMENSIONS

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948G–01

ISSUE O

0.10 (0.004)

SEATING

–T–

PLANE

14X REFK

0.25 (0.010)

U0.15 (0.006) T

2X L/2

0.10 (0.004) V

PIN 1 IDENT.

U0.15 (0.006) T

–V–

–U–

DETAIL E

SECTION N–N

DETAIL E

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–.

INCHESMILLIMETERS

–W–

DIM MIN MAX MIN MAX

A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C ––– 1.20 ––– 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC

M 0 8 0 8

____

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MOTOROLA High–Speed CMOS Logic Data

Mfax is a trademark of Motorola, Inc.

MC74HC125A/D

DL129 — Rev 6

Datasheet MC74HC125AD, MC74HC125AN, MC74HC125ADT Datasheet (Motorola)

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