Datasheet MC54HCT32AJ, MC74HCT32AN Datasheet (Motorola)

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SEMICONDUCTOR TECHNICAL DATA

1

REV 6

 Motorola, Inc. 1995

10/95

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High–Performance Silicon–Gate CMOS

The MC54/74HCT32A may be used as a level converter for interfacing

TTL or NMOS outputs to High–Speed CMOS inputs.

The HCT32A is identical in pinout to the LS32.

• Output Drive Capability: 10 LSTTL Loads

• TTL/NMOS Compatible Input Levels

• Outputs Directly Interface to CMOS, NMOS and TTL

• Operating Voltage Range: 4.5 to 5.5 V

• Low Input Current: 1.0 µA

• In Compliance with the Requirements Defined by JEDEC Standard

No. 7A

• Chip Complexity: 64 FETs or 16 Equivalent Gates

LOGIC DIAGRAM

Y = A + B

PIN 14 = V

CC

PIN 7 = GND

A1
B1

1
2

3

Y1

A2
B2

4
5

6

Y2

A3
B3

9
10

8

Y3

A4
B4

12
13

11

Y4

B

L
H
L
H



FUNCTION TABLE

PIN ASSIGNMENT

11

12

13

14

8

9

105

4

3

2

1

7

6

B3

Y4

A4

B4

V

CC

Y3

A3

A2

Y1

B1

A1

GND

Y2

B2

A

L
L
H
H

Inputs

Y

L
H
H
H

Output

D SUFFIX

SOIC PACKAGE

CASE 751A–03

N SUFFIX

PLASTIC PACKAGE

CASE 646–06

ORDERING INFORMATION

MC54HCTXXAJ
MC74HCTXXAN
MC74HCTXXAD

Ceramic
Plastic
SOIC

1

14

1

14

J SUFFIX

CERAMIC PACKAGE

CASE 632–08

1

14

MC54/74HCT32A

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

2

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

V

CC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

V

in

DC Input Voltage (Referenced to GND)

– 1.5 to VCC + 1.5

V

V

out

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

I

in

DC Input Current, per Pin

± 20

mA

I

out

DC Output Current, per Pin

± 25

mA

I

CC

DC Supply Current, VCC and GND Pins

± 50

mA

P

D

Power Dissipation in Still Air,Plastic or Ceramic DIP†

SOIC Package†

750
500

mW

T

stg

Storage Temperature

– 65 to + 150

_

C

T

L

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP)

(Ceramic DIP)

260
300

_

C

_

C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

Ceramic DIP: – 10 mW/_C from 100_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

V

CC

DC Supply Voltage (Referenced to GND)

4.5

5.5

V

Vin, V

out

DC Input Voltage, Output Voltage (Referenced to GND)

0

V

CC

V

T

A

Operating Temperature, All Package Types

– 55

+ 125

_

C

tr, t

f

Input Rise and Fall Time (Figure 1)

0

500

ns

DC ELECTRICAL CHARACTERISTICS FOR THE MC54/74HCT32A (Voltages Referenced to GND)

Guaranteed Limits

V

– 55 to 25_C

v

85_C

v

125_C

Symbol

Parameter

Test Conditions

V

CC

Volts

Min

Max

Min

Max

Min

ÎÎ

ÎÎ

ÎÎ

Max

Unit

V

IH

Minimum High–Level
Input Voltage

V

out

= 0.1 V or VCC – 0.1 V

|I

out

| v 20 µA

4.5

5.5

2.0

2.0

2.0

2.0

2.0

2.0

ÎÎ

ÎÎ

ÎÎ

V

V

IL

Maximum Low–Level
Input Voltage

V

out

= 0.1 V or VCC – 0.1 V

|I

out

| v 20 µA

4.5

5.5

0.8

0.8

0.8

0.8

ÎÎ

ÎÎ

ÎÎ

ÎÎ

0.8

0.8

V

V

OH

Minimum High–Level
Output Voltage

Vin = VIH or V

IL

|I

out

| v 20 µA

4.5

5.5

4.4

5.4

4.4

5.4

4.4

5.4

ÎÎ

ÎÎ

ÎÎ

V

Vin = VIH or V

IL

|I

out

| v 4.0 mA

5.5

3.98

3.84

3.7

ÎÎ

ÎÎ

ÎÎ

ÎÎ

V

OL

Maximum Low–Level
Output Voltage

Vin = VIH or V

IL

|I

out

| v 20 µA

4.5

5.5

0.1

0.1

0.1

0.1

ÎÎ

ÎÎ

ÎÎ

0.1

0.1

V

Vin = VIH or V

IL

|I

out

| v 4.0 mA

4.5

0.26

0.33

ÎÎ

ÎÎ

ÎÎ

ÎÎ

0.4

I

in

Maximum Input Leakage
Current

Vin = VCC or GND

5.5

± 0.1

± 1.0

ÎÎ

ÎÎ

ÎÎ

ÎÎ

± 1.0

µA

I

CC

Maximum Quiescent Sup­ply Current (per Package)

Vin = VCC or GND
I

out

= 0 µA

5.5

1.0

10

ÎÎ

ÎÎ

ÎÎ

40

µA

≥ – 55_C

25_C to

125_C

ÎÎ

ÎÎ

ÎÎ

ÎÎ

∆I

CC

Additional Quiescent
Supply Current

Vin = 2.4 V, Any One Input
Vin = VCC or GND, Other Inputs
l

out

= 0 µA

5.5

2.9

2.4

ÎÎ

ÎÎ

ÎÎ

ÎÎ

mA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance cir­cuit. For proper operation, Vin and
V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.

MC54/74HCT32A

High–Speed CMOS Logic Data
DL129 — Rev 6

3 MOTOROLA

AC CHARACTERISTICS FOR THE MC54/74HCT32A (V

CC

= 5.0 V ± 10%, CL = 50 pF, Input tr = tf = 6.0 ns)

Guaranteed Limits

– 55 to 25_C

v

85_C

v

125_C

Symbol

Parameter

Fig.

Min

Max

Min

Max

Min

Max

Unit

t

PLH

,

t

PHL

Maximum Propagation Delay, Input A or B to Output Y

1, 2

20

25

30

ns

t

TLH

,

t

THL

Maximum Output Transition Time, Any Output

1, 2

15

19

22

ns

C

in

Maximum Input Capacitance

10

10

10

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the Motorola High–

Speed CMOS Data Book (DL129/D).

Typical @ 25°C, VCC = 5.0 V

C

PD

Power Dissipation Capacitance (Per Gate)*

15

pF

*Used to determine the no–load dynamic power consumption: PD = CPD V

CC

2

f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).

B

Figure 1. Switching Waveforms

*Includes all probe and jig capacitance

Figure 2. Test Circuit

CL*

TEST POINT

DEVICE
UNDER

TEST

OUTPUT

EXPANDED LOGIC DIAGRAM

(1/4 OF THE DEVICE)

A

Y

OUTPUT Y

INPUT

A OR B

90%

1.3 V

10%

t

TLH

t

THL

t

PLH

t

PHL

t

r

t

f

GND

3.0 V

90%

1.3 V

10%

MC54/74HCT32A

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

4

OUTLINE DIMENSIONS

J SUFFIX

CERAMIC DIP PACKAGE

CASE 632–08

ISSUE Y

MIN MINMAX MAX

INCHES MILLIMETERS

DIM

A
B
C
D

F

G

J

K

L
M
N

0.785

0.280

0.200

0.020

0.065

0.015

0.170
15

°

0.040

0.750

0.245

0.155

0.015

0.055

0.008

0.125
0

°

0.020

19.94

7.11

5.08

0.50

1.65

0.38

4.31
15

°

1.01

19.05

6.23

3.94

0.39

1.40

0.21

3.18
0

°

0.51

0.100 BSC

0.300 BSC

2.54 BSC

7.62 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.

4. DIMESNION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.

14 8

1 7

-A-

-B-

-T-

SEATING

PLANE

F G

N

K

C

L

M

0.25 (0.010) T A

M

S

0.25 (0.010) T B

M

S

J 14 PL

D 14 PL

N SUFFIX

PLASTIC DIP PACKAGE

CASE 646–06

ISSUE L

NOTES:

1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.

2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.

4. ROUNDED CORNERS OPTIONAL.

1 7

14 8

B

A

F

H G D

K

C

N

L

J

M

SEATING
PLANE

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.715 0.770 18.16 19.56
B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
G 0.100 BSC 2.54 BSC
H 0.052 0.095 1.32 2.41
J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
L 0.300 BSC 7.62 BSC
M 0 10 0 10
N 0.015 0.039 0.39 1.01

_ _ _ _

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

MIN MINMAX MAX

MILLIMETERS INCHES

DIM

A
B
C
D
F

G

J
K

M

P
R

8.55

3.80

1.35

0.35

0.40

0.19

0.10
0

°

5.80

0.25

8.75

4.00

1.75

0.49

1.25

0.25

0.25
7

°

6.20

0.50

0.337

0.150

0.054

0.014

0.016

0.008

0.004
0

°

0.228

0.010

0.344

0.157

0.068

0.019

0.049

0.009

0.009
7°

0.244

0.019

1.27 BSC 0.050 BSC

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

–A–

–B–

P 7 PL

G

C

K

SEATING
PLANE

D 14 PL

M

J

R

X 45°

1

7

814

0.25 (0.010) T B A

M

S S

B0.25 (0.010)

M M

F

MC54/74HCT32A

High–Speed CMOS Logic Data
DL129 — Rev 6

5 MOTOROLA

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MC54/74HCT32A/D

*MC54/74HCT32A/D*

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