Datasheet MC34065P-L, MC34065DW-H, MC34065DW-L, MC33065P-L, MC33065DW-H Datasheet (Motorola)

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The MC34065–H,L series are high performance, fixed frequency, dual
current mode controllers. They are specifically designed for off–line and
dc–to–dc converter applications offering the designer a cost effective
solution with minimal external components. These integrated circuits feature
a unique oscillator for precise duty cycle limit and frequency control, a
temperature compensated reference, two high gain error amplifiers, two
current sensing comparators, Drive Output 2 Enable pin, and two high
current totem pole outputs ideally suited for driving power MOSFETs.

Also included are protective features consisting of input and reference
undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting,
and a latch for single pulse metering of each output. These devices are
available in dual–in–line and surface mount packages.

The MC34065–H has UVLO thresholds of 14 V (on) and 10 V (off), ideally
suited for off–line converters. The MC34065–L is tailored for lower voltage
applications having UVLO thresholds of 8.4 V (on) and 7.8 V (off).

• Unique Oscillator for Precise Duty Cycle Limit and Frequency Control

• Current Mode Operation to 500 kHz

• Automatic Feed Forward Compensation

• Separate Latching PWMs for Cycle–By–Cycle Current Limiting

• Internally Trimmed Reference with Undervoltage Lockout

• Drive Output 2 Enable Pin

• Two High Current Totem Pole Outputs

• Input Undervoltage Lockout with Hysteresis

• Low Startup and Operating Current

Representative Block Diagram

V

CC 16

V

V

ref

Sync Input

R

T

C

T

Voltage

Feedback 1

Compensation 1

Drive Output

2

Enable

Voltage

Feedback 2

Compensation 2

5.0V

15

1
3

2

4

5

14

13

12

R

R

+
–

Error

Amp 1

+
–

Error

Amp 2

Oscillator

Reference

V

ref

Undervoltage

Lockout

Gnd 8 Drive Gnd 9

CC

Undervoltage

Lockout

Latching

PWM 1

Latching

PWM 2

Drive Output 1

7

Current Sense 1

6

Drive Output 2

10

Current Sense 2

11

HIGH PERFORMANCE

DUAL CHANNEL CURRENT

MODE CONTROLLERS

SEMICONDUCTOR

TECHNICAL DATA

P SUFFIX

PLASTIC PACKAGE

CASE 648

DW SUFFIX

PLASTIC PACKAGE

CASE 751G

(SO–16L)

PIN CONNECTIONS

Sync Input

C
R

Voltage Feedback 1

Compensation 1
Current Sense 1

Drive Output 1

Gnd

ORDERING INFORMATION

Device

MC34065DW–H
MC34065DW–L
MC34065P–H

MC34065P–L
MC33065DW–H
MC33065DW–L

MC33065P–H
MC33065P–L

1
2

T

3

T

4
5
6
7
89

Temperature Range

TA = 0° to +70°C

TA = –40° to +85°C

16
15
14

13
12
11
10

(T op V iew)

Operating

V

CC

V

ref
Drive Output 2 Enable
Voltage Feedback 2

Compensation 2
Current Sense 2
Drive Output 2
Drive Gnd

Package

SO–16L

Plastic DIP

SO–16L

Plastic DIP

MOTOROLA ANALOG IC DEVICE DATA

 Motorola, Inc. 1996 Rev 0

1

MC34065–H, L MC33065–H, L

MAXIMUM RATINGS

Rating Symbol Value Unit

Power Supply Voltage V
Output Current, Source or Sink (Note 1) I
Output Energy (Capacitive Load per Cycle) W 5.0 µJ
Current Sense, Enable, and Voltage Feedback Inputs V
Sync Input

High State (Voltage)

Low State (Reverse Current)
Error Amp Output Sink Current I
Power Dissipation and Thermal Characteristics

DW Suffix, Plastic Package Case 751G

Maximum Power Dissipation @ TA = 25°C
Thermal Resistance, Junction–to–Air

P Suffix, Plastic Package Case 648

Maximum Power Dissipation @ TA = 25°C

Thermal Resistance, Junction–to–Air
Operating Junction Temperature T
Operating Ambient Temperature (Note 3)

MC34065
MC33065

Storage Temperature Range T

CC

O

in

V

IH

I

IL
O

P

D

RθJA

P

D

RθJA

J

T

A

stg

20 V

400 mA

– 0.3 to +5.5 V

+5.5

– 5.0

10 mA

862
145

1.25
100

+150 °C

0 to +70

– 40 to +85

– 65 to +150 °C

V

mA

mW

°C/W

mW

°C/W

°C

ELECTRICAL CHARACTERISTICS (V

TA is the operating ambient temperature range that applies to [Note 3].)

Characteristics Symbol Min Typ Max Unit

REFERENCE SECTION

Reference Output Voltage (IO = 1.0 mA, TJ = 25°C) V
Line Regulation (VCC = 11 V to 20 V) Reg
Load Regulation (IO = 1.0 mA to 10 mA, VCC = 20 V) Reg
Total Output Variation over Line, Load, and Temperature V
Output Short Circuit Current I

OSCILLATOR AND PWM SECTIONS

Total Frequency Variation over Line and Temperature

VCC = 11 V to 20 V, TA = T

MC34065

MC33065
Frequency Change with Voltage (VCC = 11 V to 20 V) ∆f
Duty Cycle at each Output

Maximum
Minimum

Sync Input Current

High State (Vin = 2.4 V)
Low State (Vin = 0.8 V)

ERROR AMPLIFIERS

Voltage Feedback Input (VO = 2.5 V) V
Input Bias Current (VFB = 5.0 V) I
Open Loop Voltage Gain (VO = 2.0 V to 4.0 V) A
Unity Gain Bandwidth (TJ = 25°C) BW 0.7 1.0 – MHz
Power Supply Rejection Ratio (VCC = 11 V to 20 V) PSRR 60 90 – dB
Output Current

Source (VO = 3.0 V, VFB = 2.3 V)
Sink (VO = 1.2 V, VFB = 2.7 V)

Output Voltage Swing

High State (RL = 15 k to ground, VFB = 2.3 V)
Low State (RL = 15 k to V

to T

low

, VFB = 2.7 V)

ref

high

= 15 V [Note 2], RT = 8.2 kΩ, CT = 3.3 nF, for typical values TA = 25°C, for min/max values

CC

ref

line

load

ref

SC

f

osc

/∆V – 0.2 1.0 %

osc

DC

max

DC

min

I

IH

I

IL

FB
IB

VOL

I

source

I

sink

V

OH

V

OL

4.85 5.0 5.13 V
– 2.0 20 mV
– 3.0 25 mV

4.8 – 5.15 V
30 100 – mA

46.5
45

46

–

–
–

2.45 2.5 2.55 V

– –0.1 – 1.0 µA

65 100 – dB

0.45

2.0

5.0
–

49
49

49.5
–

170

80

1.0
12

6.2

0.8

51.5
53

52

0

250
160

–
–

–

1.1

kHz

%

µA

mA

V

2

MOTOROLA ANALOG IC DEVICE DATA

MC34065–H, L MC33065–H, L

ELECTRICAL CHARACTERISTICS (V

TA is the operating ambient temperature range that applies to [Note 3].)

Characteristics

CURRENT SENSE SECTION

Current Sense Input Voltage Gain (Notes 4 and 5) A
Maximum Current Sense Input Threshold (Note 4) V
Input Bias Current I
Propagation Delay (Current Sense Input to Output) t

DRIVE OUTPUT 2 ENABLE PIN

Enable Pin Voltage – High State (Output 2 Enabled)

Enable Pin Voltage – Low State (Output 2 Disabled)

Low State Input Current (VIL = 0 V) I

DRIVE OUTPUTS

Output Voltage – Low State (I

Output Voltage – Low State (I
Output Voltage – High State (I
Output Voltage – High State (I

Output Voltage with UVLO Activated (VCC = 6.0 V, I
Output Voltage Rise T ime (CL = 1.0 nF) t
Output Voltage Fall T ime (CL = 1.0 nF) t

UNDERVOLTAGE LOCKOUT SECTION

Startup Threshold (VCC Increasing)
–L Suffix
–H Suffix

Minimum Operating Voltage After Turn–On (VCC Decreasing)
–L Suffix
–H Suffix

TOTAL DEVICE

Power Supply Current
Startup

–L Suffix (VCC = 6.0 V)
–H Suffix (VCC = 12 V)

Operating (Note 2)

NOTES: 1. Maximum package power dissipation limits must be observed.

NOTES: 2. Adjust VCC above the startup threshold before setting to 15 V.
NOTES: 3. Low duty cycle pulse techniques are used during test to maintain junction
NOTES: 3. temperature as close to ambient as possible:

T

= 0°C for the MC34065 T

low

T

= –40°C for the MC33065 T

low

= 20 mA)

sink

= 200 mA)

sink

source
source

= 20 mA)
= 200 mA)

= 15 V [Note 2], RT = 8.2 kΩ, CT = 3.3 nF, for typical values TA = 25°C, for min/max values

CC

PLN(In/Out)

= 1.0 mA) V

Sink

OL(UVLO)

V

4. This parameter is measured at the latch trip point with VFB = 0 V

5. Comparator gain is defined as AV =

= +70°C for MC34065

high

= +85°C for MC33065

high

Symbol Min Typ Max Unit

V
th

IB

2.75 3.0 3.25 V/V

0.9 1.0 1.1 V
– – 2.0 –10 µA
– 150 300 ns

V

IH

V

IL

IB

V

OL

V

OH

3.5
0

–
–

V

1.5

ref

100 250 400 µA

–

1.6

12.8
10

0.3

2.4

13.3

11.2

0.5

3.0
–

12.3

V

V

– 0.1 1.1 V

r
f

V

th

CC(min)

I

CC

– 50 150 ns
– 50 150 ns

7.8
13

7.2

9.0

–
–
–

8.4
14

7.8
10

0.4

0.6
20

∆V Compensation
∆V Current Sense

9.0
15

8.4
11

0.8

1.0
25

V

V

mA

Figure 1. Timing Resistor versus

Oscillator Frequency

16

)

Ω

, TIMING RESISTOR (k

T

R

14

12

10

8.0

6.0

4.0

3.3 nF

5.0 nF

CT=
10 nF

VCC=15V

°

C

TA=25

500 pF

1.0 nF

2.2 nF

100 pF

220 pF

10 k 30 k 50 k 300 k 500 k100 k 1.0 M

f

OSC, OSCILLATOR FREQUENCY (Hz)

MOTOROLA ANALOG IC DEVICE DATA

330 pF

Figure 2. Maximum Output Duty Cycle

versus Oscillator Frequency

50

48

46

44

VCC=15V

42

RT= 4.0 k to 16 k

, DUTY CYCLE MAXIMUM (%)

max

40

DC

38

10 k 30 k 50 k 300 k 500 k100 k 1.0 M

°

TA = 25
CL=15pF

f

OSC, OSCILLATOR FREQUENCY (Hz)

Output 1

Output 2

3

MC34065–H, L MC33065–H, L

Figure 3. Error Amp Small–Signal

Transient Response

2.55 V

2.50 V

2.45 V

1.0 µs/DIV

Figure 5. Error Amp Open Loop Gain and

Phase versus Frequency

100

80

60

Gain

VCC=15V
AV= –1.0

TA=25

VCC=15V
VO= 1.5 V to 2.5 V
RL= 100 k

°

C

TA=25

Figure 4. Error Amp Large–Signal

Transient Response

3.0 V

°

C

2.50 V

20 mV/DIV

2.0 V

1.0 µs/DIV

VCC=15V
AV= –1.0

°

C

TA=25

200 mV/DIV

Figure 6. Current Sense Input Threshold

versus Error Amp Output Voltage

0

30

60

1.2

1.0

0.8

VCC = 15 V

TA = 125°C

40

20

, OPEN LOOP VOL TAGE GAIN (dB)

0

VOL

A

–20

10 100 1.0 k 10 k 100 k 1.0 M 10 M

f, FREQUENCY (Hz)

Phase

Figure 7. Reference V oltage Change

versus Source Current

0

–4.0

–8.0

–12

–16

, REFERENCE VOLTAGE CHANGE (mV)

–20

ref

V

∆

–24

0 20 40 60 80 100 120

I

, REFERENCE SOURCE CURRENT (mA)

ref

TA = 125°C

TA = 25°C

VCC = 15 V

TA = –55°C

90

120

, EXCESS PHASE (DEGREES)

φ

150

180

0.6

0.4

0.2

, CURRENT SENSE INPUT THRESHOLD (V)

th

0

V

0 1.0 2.0 3.0 4.0 7.05.0 6.0

Figure 8. Reference Short Circuit Current

120

100

80

, REFERENCE SHORT CIRCUIT CURRENT (mA)

60

SC

I

–55 –25 0 25 50 75 100 125

TA = 25°C

TA = –55°C

VO, ERROR AMP OUTPUT VOLTAGE (V)

versus T emperature

TA, AMBIENT TEMPERATURE (°C)

VCC=15V

≤

0.1

Ω

R

L

4

MOTOROLA ANALOG IC DEVICE DATA

MC34065–H, L MC33065–H, L

Figure 9. Reference Load Regulation Figure 10. Reference Line Regulation

, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV)

O

V

∆

Figure 11. Output Saturation Voltage

versus Load Current

0

V

–2.0

–4.0

CC

TA= –55°C

VCC=15V
IO= 1.0 mA to 10 mA

°

C

TA=25

, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV)

O

V

1.0 ms/DIV 1.0 ms/DIV

∆

Figure 12. Output Waveform

Source Saturation

(Load to Ground)

TA=25°C

VCC=15V

µ

s Pulsed Load

80

120 Hz Rate

90% –

VCC= 11 V to 15 V

°

C

TA=25

VCC=15V
CL= 1.0 nF

TA=25

°

C

–6.0

4.0

2.0

, OUTPUT SA TURATION VOLTAGE (V)

sat

V

0

0 100 200 300 400

TA= –55°C

TA=25°C

IO, OUTPUT LOAD CURRENT (mA)

Gnd

Sink Saturation

(Load to VCC)

10% –

100 ns/DIV

Figure 13. Output Cross Conduction Current Figure 14. Supply Current versus Supply Voltage

, OUTPUT VOL TAGE 1

O1

, SUPPLY CURRENT

CC

I

VCC=15V
CL=15pF

°

C

TA=25

10 V/DIV

50 mA/DIV

10 V/DIV

32

24

16

, SUPPLY CURRENT (mA)

8.0

CC

I

–L Suffix

RT=10k
CT= 3.3 nF
VFB=0V
Current Sense = 0 V

TA=25

–H Suffix

°

C

, OUTPUT VOL TAGE 2; V

O2

V

100 ns/DIV

MOTOROLA ANALOG IC DEVICE DATA

0

0 4.0 8.0 12 16 20

VCC, SUPPLY VOLTAGE (V)

5

MC34065–H, L MC33065–H, L

OPERA TING DESCRIPTION

The MC34065–H,L series are high performance, fixed
frequency , dual channel current mode controllers specifically
designed for Off–Line and dc–to–dc converter applications.
These devices offer the designer a cost effective solution with
minimal external components where independent regulation
of two power converters is required. The Representative
Block Diagram is shown in Figure 15. Each channel contains
a high gain error amplifier, current sensing comparator, pulse
width modulator latch, and totem pole output driver. The
oscillator, reference regulator, and undervoltage lock–out
circuits are common to both channels.

Oscillator

The unique oscillator configuration employed features
precise frequency and duty cycle control. The frequency is
programmed by the values selected for the timing
components RT and CT. Capacitor CT is charged and
discharged by an equal magnitude internal current source
and sink, generating a symmetrical 50 percent duty cycle
waveform at Pin 2. The oscillator peak and valley thresholds
are 3.5 V and 1.6 V respectively. The source/sink current
magnitude is controlled by resistor RT. For proper operation
over temperature it must be in the range of 4.0 kΩ to 16 kΩ as
shown in Figure 1.

As CT charges and discharges, an internal blanking pulse
is generated that alternately drives the center inputs of the
upper and lower NOR gates high. This, in conjunction with a
precise amount of delay time introduced into each channel,
produces well defined non–overlapping output duty cycles.
Output 2 is enabled while CT is charging, and Output 1 is
enabled during the discharge. Figure 2 shows the Maximum
Output Duty Cycle versus Oscillator Frequency. Note that
even at 500 kHz, each output is capable of approximately
44% on–time, making this controller suitable for high
frequency power conversion applications.

In many noise sensitive applications it may be desirable to
frequency–lock the converter to an external system clock.
This can be accomplished by applying a clock signal as
shown in Figure 17. For reliable locking, the free–running
oscillator frequency should be set about 10% less than the
clock frequency. Referring to the timing diagram shown in
Figure 16, the rising edge of the clock signal applied to the
Sync input, terminates charging of CT and Drive Output 2
conduction. By tailoring the clock waveform symmetry,
accurate duty cycle clamping of either output can be
achieved. A circuit method for this, and multi–unit
synchronization, is shown in Figure 18.

Error Amplifier

Each channel contains a fully–compensated Error
Amplifier with access to the inverting input and output. The
amplifier features a typical dc voltage gain of 100 dB, and a
unity gain bandwidth of 1.0 MHz with 71° of phase margin
(Figure 5). The noninverting input is internally biased at 2.5 V
and is not pinned out. The converter output voltage is
typically divided down and monitored by the inverting input
through a resistor divider. The maximum input bias current is
–1.0 µA which will cause an output voltage error that is equal
to the product of the input bias current and the equivalent
input divider source resistance.

The Error Amp output (Pin 5, 12) is provided for external
loop compensation. The output voltage is offset by two diode

drops (≈1.4 V) and divided by three before it connects to the
inverting input of the Current Sense Comparator. This
guarantees that no pulses appear at the Drive Output (Pin 7,

10) when the error amplifier output is at its lowest state (VOL).
This occurs when the power supply is operating and the load
is removed, or at the beginning of a soft–start interval
(Figures 20, 21).

The minimum allowable Error Amp feedback resistance is
limited by the amplifier’s source current (0.5 mA) and the
output voltage (VOH) required to reach the comparator’s 1.0 V
clamp level with the inverting input at ground. This condition
happens during initial system startup or when the sensed
output is shorted:

R

f(min)

Current Sense Comparator and PWM Latch

The MC34065 operates as a current mode controller,
whereby output switch conduction is initiated by the oscillator
and terminated when the peak inductor current reaches the
threshold level established by the Error Amplifier output.
Thus the error signal controls the peak inductor current on a
cycle–by–cycle basis. The Current Sense Comparator–PWM
Latch configuration used ensures that only a single pulse
appears at the Drive Output during any given oscillator cycle.
The inductor current is converted to a voltage by inserting a
ground–referenced sense resistor RS in series with the
source of output switch Q1. This voltage is monitored by the
Current Sense Input (Pin 6, 11) and compared to a level
derived from the Error Amp output. The peak inductor current
under normal operating conditions is controlled by the
voltage at Pin 5, 12 where:

Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing is
lost. Under these conditions, the Current Sense Comparator
threshold will be internally clamped to 1.0 V. Therefore the
maximum peak switch current is:

When designing a high power switching regulator it may
be desirable to reduce the internal clamp voltage in order to
keep the power dissipation of RS to a reasonable level. A
simple method to adjust this voltage is shown in Figure 19.
The two external diodes are used to compensate the internal
diodes, yielding a constant clamp voltage over temperature.
Erratic operation due to noise pickup can result if there is an
excessive reduction of the I

A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the power
supply to exhibit an instability when the output is lightly
loaded. This spike is due to the power transformer
interwinding capacitance and output rectifier recovery time.
The addition of an RC filter on the Current Sense input with a
time constant that approximates the spike duration will
usually eliminate the instability , refer to Figure 24.

3.0 (1.0 V))1.4 V

≈

Ipk =

V

(Pin 5, 12)

I

pk(max)

0.5 mA

3 R

=

pk(max)

S

1.0 V

= 8800 Ω

– 1.4 V

R

S

clamp voltage.

6

MOTOROLA ANALOG IC DEVICE DATA

MC34065–H, L MC33065–H, L

Undervoltage Lockout

Two Undervoltage Lockout comparators have been
incorporated to guarantee that the IC is fully functional before
the output stages are enabled. The positive power supply
terminal (VCC) and the reference output (V

) are each

ref

monitored by separate comparators. Each has built–in
hysteresis to prevent erratic output behavior as their
respective thresholds are crossed. The VCC comparator
upper and lower thresholds are 14 V/10 V for –H suffix, and

8.4 V/7.6 V for –L suffix. The V

comparator upper and lower

ref

thresholds are 3.6 V/3.4 V respectively. The large hysteresis
and low startup current of the –H suffix version makes it
ideally suited in off–line converter applications where efficient
bootstrap startup techniques are required (Figure 28). The –L
suffix version is intended for lower voltage dc–to–dc
converter applications. The minimum operating voltage for
the –H suffix is 11 V and 8.2 V for the –L suffix.

Figure 15. Representative Block Diagram

Drive Outputs and Drive Ground

Each section contains a single totem–pole output stage
that is specifically designed for direct drive of power
MOSFETs. The Drive Outputs are capable of up to ±400 mA
peak current with a typical rise and fall time of 50 ns with a

1.0 nF load. Additional internal circuitry has been added to
keep the outputs in a sinking mode whenever an
Undervoltage Lockout is active. This characteristic eliminates
the need for an external pull–down resistor. The totem–pole
output has been optimized to minimize cross–conduction
current in high speed operation. The addition of two 10 Ω
resistors, one in series with the source output transistor and
one in series with the sink output transistor, reduces the
cross–conduction current to minimal levels, as shown in
Figure 13.

Although the Drive Outputs were optimized for MOSFETs,
they can easily supply the negative base current required by
bipolar NPN transistors for enhanced turn–off (Figure 25).

Vin= 15V

V

ref

Sync Input

R

T

C

T

Voltage Feedback 1

Compensation 1

Enable Input

Voltage Feedback 2

Compensation 2

VCC16

ref

PWM

S

R

PWM

S
R

R

Q

Q

V

CC

UVLO

+
–

+
–

10

Drive Output 1
7

10

Current Sense 1

6

10

Drive Output 2
10

10

Current Sense 2
11

+
–

Sink Only

=

Positive True Logic

Q1

R

S

Q2

R

S

Reference

15

1

3
2

4

5

14

13

12

2.5V

+
–

Error

Amp 1

+
–

Error

Amp 2

R

R

Oscillator

V

ref

Internal

Bias

20k

1.0mA

2R

1.0V R

µ

A

250

1.0mA
2R

1.0V R

Gnd 8 Drive Gnd 9

Regulator

+

3.6V
–

Current Sense

Comparator 1

–
+

Current Sense

Comparator 2

–
+

+
–

V

UVLO

Latch 1

Latch 2

MOTOROLA ANALOG IC DEVICE DATA

7

Sync Input

Capacitor C

T

Latch 1

“Set” Input

Compensation 1
Current Sense 1

Latch 1

“Reset” Input

Drive Output 1

Drive Output

2

Enable

Latch 2

“Set” Input

Compensation 2
Current Sense 2

Latch 2

“Reset” Input

MC34065–H, L MC33065–H, L

Figure 16. Timing Diagram

Drive Output 2

The outputs do not contain internal current limiting,
therefore an external series resistor may be required to
prevent the peak output current from exceeding the ±400 mA
maximum rating. The sink saturation (VOL) is less than 0.75 V
at 50 mA.

A separate Drive Ground pin is provided and, with proper
implementation, will significantly reduce the level of switching
transient noise imposed on the control circuitry. This
becomes particularly useful when reducing the I

pk(max)

clamp
level. Figure 23 shows the proper ground connections
required for current sensing power MOSFET applications.

Drive Output 2 Enable Pin

This input is used to enable Drive Output 2. Drive Output 1
can be used to control circuitry that must run continuously
such as volatile memory and the system clock, or a remote
controlled receiver, while Drive Output 2 controls the high
power circuitry that is occasionally turned off.

Reference

The 5.0 V bandgap reference is trimmed to ±2.0%
tolerance at TJ = 25°C. The reference has short circuit
protection and is capable of providing in excess of 30 mA for
powering any additional control system circuitry.

Design Considerations

Do not attempt to construct the converter on

wire–wrap or plug–in prototype boards. High frequency

circuit layout techniques are imperative to prevent
pulse–width jitter. This is usually caused by excessive noise
pick–up imposed on the Current Sense or Voltage Feedback
inputs. Noise immunity can be improved by lowering circuit
impedances at these points. The printed circuit layout should
contain a ground plane with low current signal and high
current switch and output grounds returning on separate
paths back to the input filter capacitor. Ceramic bypass
capacitors (0.1 µF) connected directly to VCC and V

may be

ref

required depending upon circuit layout. This provides a low
impedance path for filtering the high frequency noise. All high
current loops should be kept as short as possible using
heavy copper runs to minimize radiated EMI. The Error Amp
compensation circuitry and the converter output
voltage–divider should be located close to the IC and as far
as possible from the power switch and other noise generating
components.

8

MOTOROLA ANALOG IC DEVICE DATA

MC34065–H, L MC33065–H, L

Figure 17. External Clock Synchronization Figure 18. External Duty Cycle Clamp and

Multi–Unit Synchronization

V

15

External
Sync
Input

The external diode clamp is required if the negative Sync current
is greater than –5.0 mA.

220pF

R

T

1

3

C

T

2

4

5

R

Bias

R

20k

Osc.

+
–

EA1

1.0V

2R

R

5.0k

6

5

5.0k

2

5.0k
1

C

D

Drive Output 1 =

max

+
–

+
–

f =

48

R

Q

S

MC1455

1.08

(RA + RB)C

R

RA + R

R

A

7

3

R

B

B

B

PIN FUNCTION DESCRIPTION

Pin Function Description

1 Sync Input A narrow rectangular waveform applied to this input will synchronize the oscillator. A dc voltage

2 C

3 R

T

T

4 Voltage Feedback 1 This pin is the inverting input of Error Amplifier 1. It is normally connected to the switching power

5 Compensation 1 This pin is the output of Error Amplifier 1 and is made available for loop compensation.
6 Current Sense 1 A voltage proportional to the inductor current is connected to this input. PWM 1 uses this information

7 Drive Output 1 This pin directly drives the gate of a power MOSFET Q1. Peak currents up to 400 mA are sourced

8 Gnd This pin is the control circuitry ground return and is connected back to the source ground.
9 Drive Gnd This pin is a separate power ground return that is connected back to the power source. It is used to

10 Drive Output 2 This pin directly drives the gate of a power MOSFET Q2. Peak currents up to 400 mA are sourced

11 Current Sense 2 A voltage proportional to inductor current is connected to this input. PWM 2 uses this information to

12 Compensation 2 This pin is the output of Error Amplifier 2 and is made available for loop compensation.
13 Voltage Feedback 2 This pin is the inverting input of Error Amplifier 2. It is normally connected to the switching power

14 Drive Output 2 Enable A logic low at this input disables Drive Output 2.
15 V
16 V

ref
CC

within the range of 2.4 V to 5.5 V will inhibit the oscillator.
Timing capacitor CT connects from this pin to ground setting the free–running oscillator frequency

range.
Resistor RT connects from this pin to ground precisely setting the charge current for CT. RT must be

between 4.0 k and 16 k.

supply output through a resistor divider.

to terminate conduction of output switch Q1.

and sunk by this pin.

reduce the effects of switching transient noise on the control circuitry.

and sunk by this pin.

terminate conduction of output switch Q2.

supply output through a resistor divider.

This is the 5.0 V reference output. It can provide bias for any additional system circuitry.
This pin is the positive supply of the control IC. The minimum operating voltage range after startup is

11 V to 15.5 V for the –H suffix, 8.2 V to 9.5 V for the –L suffix.

ref

15

1

3

2

+

4

–

5

T o additional MC34065s

D

Drive Output 2 =

max

R

Bias

R

Osc.

EA1

R

A

RA + R

B

20k

2R

R1.0V

MOTOROLA ANALOG IC DEVICE DATA

9

MC34065–H, L MC33065–H, L

Figure 19. Adjustable Reduction of Clamp Level Figure 20. Soft–Start Circuit

V

CC

16

V

ref

15

1

3

2

4

R

2

5

R

1

V

Clamp

R

Bias

R

20k

Osc.

1.0mA

+
–

EA1

1.67

≈

R

2

ǒ

Ǔ

)

1

R

1

5.0V

+
_

V

Clamp

2R

R

1.0V

+ 0.33 x 10–3 (R1)

ref

+
–

–
+

+
–

PWM

Latch 1

S

Q

R

I

≈

pk(max)
Where: 0 ≤ V

+
_

V

Clamp

R

Clamp

S

≤ 1.0 V

Figure 21. Adjustable Reduction of Clamp Level

with Soft–Start

V

ref

15

1
3

2

4

R

2

5

R

MPSA63

1

C

R

R

+
–

EA1

Where: 0

V

Clamp

Osc

Bias

1.0V R

≤

V

Clamp

≈

R

ǒ

R

20k

2R

1.67
2

1

V

Clamp

≤ 1.0 V

)

1

Ǔ

5.0V

+
_

–
+

t

Soft–Start

ref

+
–

= In

PWM

Latch 1

S

Q

R

I

pk(max)

1 –

V

CC

16

+
–

+
_

V

Clamp

≈

R

S

1

V

C

3 V

Clamp

V

in

Q1

7

6

R

S

V

ref

15

1

3

2

4

1.0M

5

C

+
–

t

Soft–Start

R

R

EA1

≈

2100 C in µF

Osc.

Bias

1.0mA

20k

2R

1.0V

R

Figure 22. MOSFET Parasitic Oscillations

V

PWM

Latch 1

S

Q

R

CC

16

+
–

+
_

7

1N5819

6

V

in

5.0V

ref

+
–

+

Q1

7

R

6

S

Series gate resistor Rg may be needed to damp high frequency parasitic

R1R

2

C

)

R

R

2

1

oscillations caused by the MOSFET input capacitance and any series
wiring inductance in the gate–source circuit. Rg will decrease the MOSFET
switching speed. Schottky diode D1 is required if circuit ringing drives the
output pin below ground.

–

–
+

V

in

R

g

D

Q1

1

R

S

Figure 23. Current Sensing Power MOSFET Figure 24. Current Waveform Spike Suppression

V

CC

16

5.0V

ref

+
_

–
+

Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch. For proper operation during over current conditions, a
reduction of the I

+
_

+
_

PWM

Latch 1

S

Q

R

Control Circuitry Ground

pk(max)

+
_

to Pin 8

clamp level must be implemented. Refer to Figures 19 and 21.

V

in

D

SENSEFET

S

G

7

M

6

R

S

1/4W

Power Ground to
Input Source Return

K

Drive Ground

to Pin 9

V

If: SENSEFET = MTP10N10M

Then: V

Pin 6

≈

RS = 200
Pin 6

10

RS Ipk r

r

DM(on)

= 0.075 I

DS(on)

+ R

pk

V

CC

16

PWM

Latch 1

S

R

+
_

+

_

7

Q

6

5.0V

ref

+
_

+

_

S

–
+

The addition of the RC filter will eliminate instability caused by the leading
edge spike on the current waveform.

MOTOROLA ANALOG IC DEVICE DATA

V

in

Q1

R

R

C

S

MC34065–H, L MC33065–H, L

Figure 25. Bipolar Transistor Drive Figure 26. Isolated MOSFET Drive

I

B

+
0
–

The totem–pole outputs can furnish negative base current for enhanced
transistor turn–off, with the addition of capacitor C1.

Base Charge

Removal

V

in

C

1

R

S

Figure 27. Dual Charge Pump Converter

–
+

VCC= 15V

16

5.0V

+

–

V

CC

16

PWM

Latch 1

S

Q

R

Ipk+

+

–

+

_

V

(Pin 6)

Isolation

Boundary

7

D

1

6

*

1.4

N

P

ǒ

Ǔ

N

3R

S

S

+

47

R

C

ref

+
–

V

in

Q1

N

P

N

S

12k

1.0nF

5.0V

15

1

3

2

4

5

14

13

12

2.5V

R

Bias

R

20k

Osc.

1.0mA

µ

250

1.0mA

2R

1.0V

A

2R

1.0V

89

+
–

EA1

+
–

EA2

ref

+
–

+
_

–
+

R

–
+

R

+
–

+
_

PWM

Latch 1

S

Q

R

PWM

Latch 2

S

Q

R
R

10

10

10

10

27 10

7

Connect to Pin 4 for

closed–loop regulation.

6

27 10

+

10

)

+

VO+

1N5819

47

2.5

1N5819

47

≈

2.0 V

+V

CC

+

R

2

ǒ

R

1

+

O

R

2

R

1

Ǔ

)

1

≈

–V

–V

CC

O

Output Load Regulation

11

IO (mA) +VO (V) –VO (V)

1.0

5.0
10
50

28.43

0

27.72

27.04

26.20

20.52

–13.89
–12.90
–12.25
–11.44

–5.80

The capacitor’s equivalent series resistance must limit the Drive Output current to 400 mA. An additional series resistor may be required
when using tantalum or other low ESR capacitors. The positive output can provide excellent line and load regulation by connecting the
R2/R1 resistor divider as shown.

MOTOROLA ANALOG IC DEVICE DATA

11

75k

16.2k

4.7k

5.6k

1.0M

1/2

4N35

47k

47k

92Vac to

138Vac

4.7
nF

100

pF

180

pF

10 Cold

3.0A

15

1
3

2

4

5

14

13

12

<1 Hot

T

0.22

+
–

+
–

R

R

EA1

EA2

Osc.

T1

Bias

1.0V

1.0V

MC34065–H, L MC33065–H, L

Figure 28. 125 Watt Off–Line Converter

MDA

+

970G5

0.05

5.0V

ref

20k

2R

2R

+
_

–
+

R

–
+

R

+
–

PWM

Latch 1

S

Q

R

S

Q

R
R

98

270

+
–

Latch 2

+
_

PWM

56k

16

MC34065–H

MUR415

MUR415

MUR

440

0.001

10

100

0.001

L1

L3

+

1000

1000

+

L2

MPS

A20

+

10k

Output 2

Shutdown

L4

1N4148

0.01

TL

43A

330

1/2

4N35

68k

0.013.3k

330

10

10

10

51k
100

1.3k

9.0V

0.1A

+

RTN

12V

1.0A

+

RTN

+

–12V

1.0A

100V

1.0A

+

RTN

MUR110

10

22

7

10

10

10

MTD
2N50

1.0 k

6

470

pF

10

11

470pF

22

1.0k

T2

3.3

12k

MUR110

3300

pF

1N

4937

220100

10k

330

MTH
8N45

0.082

++

T3

pF

Test Conditions Results

Line Regulation

100 V Output
±12 V Outputs

9.0 V Output

Load Regulation

100 V Output
±12 V Outputs

9.0 V Output

Output Ripple

100 V Output
±12 V Outputs

9.0 V Output

Short Circuit Current

100 V Output
±12 V Outputs

9.0 V Output

Efficiency

Vin = 92 Vac to 138 Vac

IO = 1.0 A
IO = ±1.0 A
IO = 0.1 A

Vin = 115 Vac

IO = 0.25 A to 1.0 A
IO = ±0.25 A to ±1.0 A
IO = 0.08 A to 0.1 A

Vin = 115 Vac

IO = 1.0 A
IO = ±1.0 A
IO = 0.1 A

Vin = 115 Vac, RL = 0.1 Ω

Vin = 115 Vac, PO = 125 W

∆ = 40 mV or ±0.02%
∆ = 32 mV or ±0.13%
∆ = 55 mV or ±0.31%

∆ = 50 mV or ±0.025%

∆ = 320 mV or ±1.2%
∆ = 234 mV or ±1.3%

40 mVpp

100 mVpp

60 mVpp

4.3 A
17 A

Output Hiccups

86%

T1 –

T2 –

T3 –

L1, L3, L4 –

L2 –

468 µH per section at 2.5 A,
Coilcraft E3496A.

Primary: 156 Turns, #34 AWG
Primary Feedback: 19 Turns, #34 AWG
Secondary: 17 Turns, #28 AWG
Core: TDK PC30 EE22–Z
Bobbin: BE22–118CP

Gap: ≈0.001″ for a primary
inductance of 6.8 mH

Primary: 56 Turns, #23 AWG
(2 strands) Bifiliar Wound
Secondary: ±12 V, 4 Turns, #23 AWG
(4 strands) Quadfiliar Wound
Secondary 100 V: 32 Turns, #23 AWG (2
strands) Bifiliar Wound
Core: TDK PC30 EER40 G0.76
Bobbin: BEER40–11 12CP
Gap: ≈0.030″ for a primary

inductance of 212 µH
25 µH at 1.0 A, Coilcraft Z7157.
10 µH at 3.0 A, Coilcraft

PCV–0–010–03.

12

MOTOROLA ANALOG IC DEVICE DATA

MC34065–H, L MC33065–H, L

Figure 29. PC Board Circuit Side and Component View

5 11/16

″

4 1/2

″

(CIRCUIT VIEW)

AC INPUT 9V 100V 12V –12V

*

MOTOROLA ANALOG IC DEVICE DATA

(COMPONENT VIEW)

*100 V and

±

12 V Shutdown

13

MC34065–H, L MC33065–H, L

OUTLINE DIMENSIONS

PLASTIC PACKAGE

CASE 648–08

–A–

916

B

18

F

H

G

D

16 PL

0.25 (0.010) T

–A–

16 9

D16X

M

0.010 (0.25) B

A

T

G14X

C

S

K

M

–B– P8X

81

S

S

C

K

–T–

A

0.010 (0.25)

–T–

SEATING
PLANE

SEATING
PLANE

J

M

DW SUFFIX

PLASTIC PACKAGE

CASE 751G–02

(SOP–8+8L)

M

J

F

M

P SUFFIX

ISSUE R

L

ISSUE A

M

B

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

DIM MIN MAX MIN MAX

A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC

M

R

X 45

_

H 0.050 BSC 1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74

M 0 10 0 10

S 0.020 0.040 0.51 1.01

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.

DIM MIN MAX MIN MAX

A 10.15 10.45 0.400 0.411
B 7.40 7.60 0.292 0.299
C 2.35 2.65 0.093 0.104
D 0.35 0.49 0.014 0.019

F 0.50 0.90 0.020 0.035

G 1.27 BSC 0.050 BSC

J 0.25 0.32 0.010 0.012
K 0.10 0.25 0.004 0.009
M 0 7 0 7

____

P 10.05 10.55 0.395 0.415
R 0.25 0.75 0.010 0.029

MILLIMETERSINCHES

____

INCHESMILLIMETERS

14

MOTOROLA ANALOG IC DEVICE DATA

MC34065–H, L MC33065–H, L

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola
was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.

MOTOROLA ANALOG IC DEVICE DATA

15

MC34065–H, L MC33065–H, L

How to reach us:
USA/EUROPE/ Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,

P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315

MFAX: RMF [e-mail] – TOUCHT ONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

16

◊

MOTOROLA ANALOG IC DEVICE DATA

MC34065–H/D

*MC34065-H/D*