Datasheet MC34151D, MC34151P, MC33151P, MC33151D Datasheet (Motorola)

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Order this document by MC34151/D

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The MC34151/MC33151 are dual inverting high speed drivers specifically
designed for applications that require low current digital circuitry to drive
large capacitive loads with high slew rates. These devices feature low input
current making them CMOS and LSTTL logic compatible, input hysteresis for
fast output switching that is independent of input transition time, and two high
current totem pole outputs ideally suited for driving power MOSFETs. Also
included is an undervoltage lockout with hysteresis to prevent erratic system
operation at low supply voltages.

Typical applications include switching power supplies, dc to dc
converters, capacitor charge pump voltage doublers/inverters, and motor
controllers.

These devices are available in dual–in–line and surface mount packages.

• Two Independent Channels with 1.5 A Totem Pole Output

• Output Rise and Fall Times of 15 ns with 1000 pF Load

• CMOS/LSTTL Compatible Inputs with Hysteresis

• Undervoltage Lockout with Hysteresis

• Low Standby Current

• Efficient High Frequency Operation

• Enhanced System Performance with Common Switching Regulator

Control ICs

• Pin Out Equivalent to DS0026 and MMH0026

HIGH SPEED

DUAL MOSFET DRIVERS

SEMICONDUCTOR

TECHNICAL DATA

P SUFFIX

PLASTIC PACKAGE

8

1

8

1

PIN CONNECTIONS

CASE 626

D SUFFIX

PLASTIC PACKAGE

CASE 751

(SO–8)

Representative Block Diagram

V

CC

6

+

+

–

+

+

Logic Input A

2

+

Logic Input B

4

5.7V

Gnd

3

MOTOROLA ANALOG IC DEVICE DATA

1

Logic Input A

Logic Input B

+

Drive Output A
7

100k

+

2

3

Gnd

45

(Top View)

8N.C.

N.C.

7

Drive Output A

6

V

CC

Drive Output B

ORDERING INFORMATION

Drive Output B
5

100k

Device

MC34151D
MC34151P
MC33151D
MC33151P

 Motorola, Inc. 1996 Rev 0

Operating

Temperature Range

TA = 0° to +70°C

TA = –40° to +85°C

Package

SO–8

Plastic DIP

SO–8

Plastic DIP

1

MAXIMUM RATINGS

Rating Symbol Value Unit

Power Supply Voltage V
Logic Inputs (Note 1) V
Drive Outputs (Note 2)

Totem Pole Sink or Source Current
Diode Clamp Current (Drive Output to VCC)

Power Dissipation and Thermal Characteristics

D Suffix SO–8 Package Case 751

Maximum Power Dissipation @ TA = 50°C
Thermal Resistance, Junction–to–Air

P Suffix 8–Pin Package Case 626

Maximum Power Dissipation @ TA = 50°C

Thermal Resistance, Junction–to–Air
Operating Junction Temperature T
Operating Ambient Temperature

MC34151
MC33151

Storage Temperature Range T

I

MC34151 MC33151

CC

in

I

O

O(clamp)

P

D

R

θJA

P

D

R

θJA

J

T

A

stg

20 V

–0.3 to V

–65 to +150 °C

CC

1.5

1.0

0.56
180

1.0

100

+150 °C

0 to +70

–40 to +85

V
A

W

°C/W

W

°C/W

°C

ELECTRICAL CHARACTERISTICS (V

Characteristics Symbol Min Typ Max Unit

LOGIC INPUTS

Input Threshold Voltage – High State Logic 1

Input Threshold Voltage – Low State Logic 0

Input Current – High State (VIH = 2.6 V)

Input Current – Low State (VIL = 0.8 V)

DRIVE OUTPUT

Output Voltage – Low State (I

Output Voltage – Low State (I
Output Voltage – Low State (I
Output Voltage – High State (I
Output Voltage – High State (I
Output Voltage – High State (I

Output Pull–Down Resistor R

SWITCHING CHARACTERISTICS (TA = 25°C)

Propagation Delay (10% Input to 10% Output, CL = 1.0 nF)

Logic Input to Drive Output Rise
Logic Input to Drive Output Fall

Drive Output Rise Time (10% to 90%) CL = 1.0 nF

Drive Output Rise Time (10% to 90%) CL = 2.5 nF

Drive Output Fall Time (90% to 10%) CL = 1.0 nF

Drive Output Fall Time (90% to 10%) CL = 2.5 nF

TOTAL DEVICE

Power Supply Current

Standby (Logic Inputs Grounded)
Operating (CL = 1.0 nF Drive Outputs 1 and 2, f = 100 kHz)

Operating Voltage V

NOTES: 1. For optimum switching speed, the maximum input voltage should be limited to 10 V or VCC, whichever is less.

2.Maximum package power dissipation limits must be observed.

3.T

=0°C for MC34151 T

low

–40°C for MC33151 +85°C for MC33151

= 10 mA)

Sink

= 50 mA)

Sink

= 400 mA)

Sink
Source
Source
Source

= 10 mA)
= 50 mA)
= 400 mA)

= 12 V, for typical values TA = 25°C, for min/max values TA is the only operating ambient

CC

temperature range that applies [Note 3], unless otherwise noted.)

V

IH

V

IL

I

IH

I

IL

V

OL

= +70°C for MC34151

high

V

OH

PD

t

PLH(in/out)

t

PHL(in/out)

t

r

t

f

I

CC

CC

10.5

10.4

2.6
–

–
–

–
–
–

9.5
– 100 – kΩ

–
–

–
–

–
–

–
–

6.5 – 18 V

1.75

1.58
200

20

0.8

1.1

1.7

11.2

11.1

10.9

35
36

14
31

16
32

6.0

10.5

–

0.8

500
100

1.2

1.5

2.5
–
–
–

100
100

30

–

30

–

mA
10
15

V

µA

V

ns

ns

ns

2

MOTOROLA ANALOG IC DEVICE DATA

Logic Input

MC34151 MC33151

Figure 1. Switching Characteristics T est Circuit Figure 2. Switching Waveform Definitions

12V

4.7 0.1
+

6

+

+

–

+

5.7V

+

2

50 C

+

Drive Output

7

100k

+

Logic Input

tr, tf

L

Drive Output

≤

10 ns

5.0 V

0 V

10%

t

PHL

t

f

90%

90%

t

PLH

10%

t

r

+

4

3

Figure 3. Logic Input Current versus

Input Voltage

2.4
VCC = 12 V

°

C

TA = 25

2.0

1.6

1.2

0.8

, INPUT CURRENT (mA)

in

I

0.4

0

0 2.0 4.0 6.0 8.0 10 12 –55 –25 0 25 50 75 100 125

Vin, INPUT VOLTAGE (V)

5

100k

2.2

2.0

1.8

1.6

1.4

, INPUT THRESHOLD VOLT AGE (V)

1.2

th

V

1.0

Figure 4. Logic Input Threshold V oltage

versus T emperature

VCC = 12 V

Upper Threshold

Low State Output

Lower Threshold

High State Output

TA, AMBIENT TEMPERATURE (°C)

Figure 5. Drive Output Low–to–High Propagation

Delay versus Logic Overdrive V oltage

200

VCC = 12 V
CL = 1.0 nF

160

TA = 25

120

80

40

, DRIVE OUTPUT PROP AGATION DELAY (ns)

0

–1.6 –1.2 –0.8 –0.4 0 0 1.0 2.0 3.0 4.0

Vin, INPUT OVERDRIVE VOLTAGE BELOW LOWER THRESHOLD (V)

PLH(IN/OUT)

t

Overdrive Voltage is with Respect

to the Logic Input Lower Threshold

°

C

V

th(lower)

Figure 6. Drive Output High–to–Low Propagation

Delay versus Logic Input Overdrive V oltage

200

160

120

80

40

, DRIVE OUTPUT PROP AGATION DELAY (ns)

0

Vin, INPUT OVERDRIVE VOLTAGE ABOVE UPPER THRESHOLD (V)

PHL(IN/OUT)

t

Overdrive Voltage is with Respect

to the Logic Input Lower Threshold

V

th(upper)

VCC = 12 V
CL = 1.0 nF
TA = 25

MOTOROLA ANALOG IC DEVICE DATA

°

C

3

90%

Figure 7. Propagation Delay

VCC = 12 V

Logic Input

Vin = 5 V to 0 V
CL = 1.0 nF
TA = 25

MC34151 MC33151

3.0
(Drive Output Driven Above VCC)

2.0

°

C

1.0

0

Figure 8. Drive Output Clamp Voltage

versus Clamp Current

High State Clamp

VCC = 12 V

µ

s Pulsed Load

80
120 Hz Rate

°

C

TA = 25

V

CC

10%

Drive Output

50 ns/DIV

Figure 9. Drive Output Saturation Voltage

versus Load Current

0

–1.0
–2.0
–3.0

3.0

2.0

, OUTPUT SA TURATION VOLTAGE(V)

1.0

sat

V

0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4

IO, OUTPUT LOAD CURRENT (A)

V

CC

Sink Saturation

(Load to VCC)

Source Saturation

(Load to Ground)

VCC = 12 V

µ

s Pulsed Load

80
120 Hz Rate
TA = 25

Gnd

, OUTPUT CLAMP VOL TAGE (V)

0

clamp

V

–1.0

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4

Gnd

IO, OUTPUT LOAD CURRENT (A)

Low State Clamp

(Drive Output Driven Below Ground)

Figure 10. Drive Output Saturation Voltage

versus T emperature

0

Source Saturation

–0.5

(Load to Ground)

–0.7

°

C

–0.9
–1.1

1.9

1.7

1.5

1.0

, OUTPUT SA TURATION VOLTAGE(V)

0.8

V

sat

Sink Saturation

0.6

(Load to VCC)

0

–55 –25 0 25 50 75 100 125

V

CC

TA, AMBIENT TEMPERATURE (°C)

I

= 400 mA

sink

I

sink

Gnd

I

source

I

source

= 10 mA

= 10 mA
= 400 mA

VCC = 12 V

90%

10%

4

Figure 11. Drive Output Rise T ime Figure 12. Drive Output Fall Time

VCC = 12 V
Vin = 5 V to 0 V
CL = 1.0 nF

°

C

TA = 25

10 ns/DIV

VCC = 12 V
Vin = 5 V to 0 V
CL = 1.0 nF

°

C

TA = 25

90%

10%

10 ns/DIV

MOTOROLA ANALOG IC DEVICE DATA

MC34151 MC33151

Figure 13. Drive Output Rise and Fall Time

versus Load Capacitance

80

VCC = 12 V
VIN = 0 V to 5.0 V

60

40

20

f

–t , OUTPUT RISE-FALL TIME(ns)

r

t

0

0.1 1.0 10 0.1 1.0 10

TA = 25

°

C

t

f

t

r

CL, OUTPUT LOAD CAPACITANCE (nF)

Figure 14. Supply Current versus Drive Output

Load Capacitance

80

VCC = 12 V
Both Logic Inputs Driven
0 V to 5.0 V

60

50% Duty Cycle
Both Drive Outputs Loaded

°

C

TA = 25

40

, SUPPLY CURRENT (mA)

20

CC

I

0

f = 500 kHz

CL, OUTPUT LOAD CAPACITANCE (nF)

f = 200 kHz

f = 50 kHz

Figure 15. Supply Current versus Input Frequency Figure 16. Supply Current versus Supply Voltage

80

Both Logic Inputs Driven
0 V to 5.0 V,
50% Duty Cycle

60

Both Drive Outputs Loaded

°

C

TA = 25
1 – VCC = 18 V, CL = 2.5 nF

40

2 – VCC = 12 V, CL = 2.5 nF
3 – VCC = 18 V, CL = 1.0 nF
4 – VCC = 12 V, CL = 1.0 nF

, SUPPLY CURRENT (mA)

20

CC

I

1

2

3

4

8.0

6.0

4.0

, SUPPLY CURRENT (mA)

2.0

CC

I

TA = 25°C

Logic Inputs at V

Low State Drive Outputs

CC

Logic Inputs Grounded

High State Drive Outputs

0

10 k

f, INPUT FREQUENCY (Hz)

100 1.0 M

APPLICATIONS INFORMATION

Description

The MC34151 is a dual inverting high speed driver
specifically designed to interface low current digital circuitry
with power MOSFETs. This device is constructed with
Schottky clamped Bipolar Analog technology which offers a
high degree of performance and ruggedness in hostile
industrial environments.

Input Stage

The Logic Inputs have 170 mV of hysteresis with the input
threshold centered at 1.67 V. The input thresholds are
insensitive to VCC making this device directly compatible with
CMOS and LSTTL logic families over its entire operating
voltage range. Input hysteresis provides fast output switching
that is independent of the input signal transition time,
preventing output oscillations as the input thresholds are
crossed. The inputs are designed to accept a signal
amplitude ranging from ground to VCC. This allows the output
of one channel to directly drive the input of a second channel
for master–slave operation. Each input has a 30 kΩ
pull–down resistor so that an unconnected open input will
cause the associated Drive Output to be in a known high
state.

Output Stage

Each totem pole Drive Output is capable of sourcing and
sinking up to 1.5 A with a typical ‘on’ resistance of 2.4 Ω at

0

0 4.0 8.0 12 16

VCC, SUPPLY VOLTAGE (V)

1.0 A. The low ‘on’ resistance allows high output currents to
be attained at a lower VCC than with comparative CMOS
drivers. Each output has a 100 kΩ pull–down resistor to keep
the MOSFET gate low when VCC is less than 1.4 V. No over
current or thermal protection has been designed into the
device, so output shorting to VCC or ground must be avoided.

Parasitic inductance in series with the load will cause the
driver outputs to ring above VCC during the turn–on transition,
and below ground during the turn–off transition. With CMOS
drivers, this mode of operation can cause a destructive
output latch–up condition. The MC34151 is immune to output
latch–up. The Drive Outputs contain an internal diode to V

CC

for clamping positive voltage transients. When operating with
VCC at 18 V, proper power supply bypassing must be
observed to prevent the output ringing from exceeding the
maximum 20 V device rating. Negative output transients are
clamped by the internal NPN pull–up transistor. Since full
supply voltage is applied across the NPN pull–up during the
negative output transient, power dissipation at high
frequencies can become excessive. Figures 19, 20, and 21
show a method of using external Schottky diode clamps to
reduce driver power dissipation.

Undervoltage Lockout

An undervoltage lockout with hysteresis prevents erratic
system operation at low supply voltages. The UVLO forces
the Drive Outputs into a low state as VCC rises from 1.4 V to

MOTOROLA ANALOG IC DEVICE DATA

5

MC34151 MC33151

the 5.8 V upper threshold. The lower UVLO threshold is 5.3 V ,
yielding about 500 mV of hysteresis.

Power Dissipation

Circuit performance and long term reliability are enhanced
with reduced die temperature. Die temperature increase is
directly related to the power that the integrated circuit must
dissipate and the total thermal resistance from the junction to
ambient. The formula for calculating the junction temperature
with the package in free air is:

TJ =TA + PD (R

where: TJ = Junction Temperature

TA = Ambient Temperature

PD = Power Dissipation

R

Thermal Resistance Junction to Ambient

θJA =

There are three basic components that make up total
power to be dissipated when driving a capacitive load with
respect to ground. They are:

PD =PQ + PC + P

where: PQ = Quiescent Power Dissipation

PC = Capacitive Load Power Dissipation

PT = Transition Power Dissipation

The quiescent power supply current depends on the
supply voltage and duty cycle as shown in Figure 16. The
device’s quiescent power dissipation is:

where: I

PQ = VCC I

= Supply Current with Low State Drive

CCL

CCL

Outputs

I

= Supply Current with High State Drive

CCH

Outputs

D = Output Duty Cycle

The capacitive load power dissipation is directly related to
the load capacitance value, frequency, and Drive Output
voltage swing. The capacitive load power dissipation per
driver is:

PC =VCC (VOH – VOL) CL f

where: VOH = High State Drive Output Voltage

VOL = Low State Drive Output Voltage

CL = Load Capacitance

f = frequency

When driving a MOSFET , the calculation of capacitive load
power PC is somewhat complicated by the changing gate to
source capacitance CGS as the device switches. T o aid in this
calculation, power MOSFET manufacturers provide gate
charge information on their data sheets. Figure 17 shows a
curve of gate voltage versus gate charge for the Motorola
MTM15N50. Note that there are three distinct slopes to the
curve representing different input capacitance values. To

)

θJA

T

(1–D) + I

CCH

(D)

completely switch the MOSFET ‘on’, the gate must be
brought to 10 V with respect to the source. The graph shows
that a gate charge Qg of 110 nC is required when operating
the MOSFET with a drain to source voltage VDS of 400 V.

Figure 17. Gate–T o–Source Voltage

versus Gate Charge

16

MTM15N50
ID = 15 A

°

C

TA = 25

12

VDS = 100 V

8.0

4.0

, GATE–T O–SOURCE VOL TAGE (V)

GS

V

2.0 nF

0

0 40 80 120 160

Qg, GATE CHARGE (nC)

8.9 nF

VDS = 400 V

CGS =

∆

Q

g

∆

V

GS

The capacitive load power dissipation is directly related to the
required gate charge, and operating frequency. The
capacitive load power dissipation per driver is:

P

C(MOSFET)

= VC Qg f

The flat region from 10 nC to 55 nC is caused by the
drain–to–gate Miller capacitance, occuring while the
MOSFET is in the linear region dissipating substantial
amounts of power. The high output current capability of the
MC34151 is able to quickly deliver the required gate charge
for fast power efficient MOSFET switching. By operating the
MC34151 at a higher VCC, additional charge can be provided
to bring the gate above 10 V. This will reduce the ‘on’
resistance of the MOSFET at the expense of higher driver
dissipation at a given operating frequency.

The transition power dissipation is due to extremely short
simultaneous conduction of internal circuit nodes when the
Drive Outputs change state. The transition power dissipation
per driver is approximately:

PT ≈ VCC (1.08 VCC CL f – 8 × 10–4)
PT must be greater than zero.

Switching time characterization of the MC34151 is
performed with fixed capacitive loads. Figure 13 shows that
for small capacitance loads, the switching speed is limited by
transistor turn–on/off time and the slew rate of the internal
nodes. For large capacitance loads, the switching speed is
limited by the maximum output current capability of the
integrated circuit.

6

MOTOROLA ANALOG IC DEVICE DATA

MC34151 MC33151

LAYOUT CONSIDERATIONS

High frequency printed circuit layout techniques are
imperative to prevent excessive output ringing and
overshoot. Do not attempt to construct the driver circuit
on wire–wrap or plug–in prototype boards. When driving
large capacitive loads, the printed circuit board must contain
a low inductance ground plane to minimize the voltage spikes
induced by the high ground ripple currents. All high current
loops should be kept as short as possible using heavy copper
runs to provide a low impedance high frequency path. For

Figure 18. Enhanced System Performance with

Common Switching Regulators

V

CC

0.1

47

6

TL494

or

TL594

+

++

–

+

5.7V

+

2

+

+

4

7

100k100k

5

V

in

optimum drive performance, it is recommended that the initial
circuit design contains dual power supply bypass capacitors
connected with short leads as close to the VCC pin and
ground as the layout will permit. Suggested capacitors are a
low inductance 0.1 µF ceramic in parallel with a 4.7 µF
tantalum. Additional bypass capacitors may be required
depending upon Drive Output loading and circuit layout.

Proper printed circuit board layout is extremely critical

and cannot be over emphasized.

Figure 19. MOSFET Parasitic Oscillations

V

in

+

R

g

D

100k

1

1N5819

3

The MC34151 greatly enhances the drive capabilities of common switching
regulators and CMOS/TTL logic devices.

Figure 20. Direct Transformer Drive Figure 21. Isolated MOSFET Drive

+

+

7

100k100k

+

3

Output Schottky diodes are recommended when driving inductive loads at
high frequencies. The diodes reduce the driver’s power dissipation by
preventing the output pins from being driven above VCC and below ground.

4 X

1N5819

+

5

Series gate resistor Rg may be needed to damp high frequency parasitic
oscillations caused by the MOSFET input capacitance and any series
wiring inductance in the gate–source circuit. Rg will decrease the
MOSFET switching speed. Schottky diode D
power dissipation due to excessive ringing, by preventing the output pin
from being driven below ground.

+

100k

3

5819

can reduce the driver’s

1

Isolation

Boundary

1N

MOTOROLA ANALOG IC DEVICE DATA

7

MC34151 MC33151

Figure 22. Controlled MOSFET Drive Figure 23. Bipolar Transistor Drive

V

in

+

R

g(on)

R

100k

g(off)

In noise sensitive applications, both conducted and radiated EMI can
be reduced significantly by controlling the MOSFET’s turn–on and
turn–off times.

Figure 24. Dual Charge Pump Converter

VCC = 15 V

4.7 0.1
+

6

I

B

+
0

–

+

The totem–pole outputs can furnish negative base current for enhanced
transistor turn–off, with the addition of capacitor C1.

Base Charge

Removal

100k

V

in

C

1

+

+

–

+

5.7V

+

2

+

4

330pF

10k

The capacitor’s equivalent series resistance limits the Drive Output Current
to 1.5 A. An additional series resistor may be required when using tantalum
or other low ESR capacitors.

3

+

7

100k

+

5

100k

6.8 10

6.8 10
+

1N5819

+

47

1N5819

47

Output Load Regulation

IO (mA) +VO (V) –VO (V)

0 27.7 –13.3

1.0 27.4 –12.9
10 26.4 –11.9
20 25.5 –11.2
30 24.6 –10.5
50 22.6 –9.4

+ VO

+

– VO

+

≈

2.0 V

≈

– V

CC

CC

8

MOTOROLA ANALOG IC DEVICE DATA

NOTE 2

–T–

SEATING
PLANE

H

58

–B–

14

F

–A–

C

N

D

K

G

0.13 (0.005) B

M

T

MC34151 MC33151

OUTLINE DIMENSIONS

P SUFFIX

PLASTIC PACKAGE

CASE 626–05

ISSUE K

L

J

M

M

A

M

NOTES:

1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.

2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).

3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

DIM MIN MAX MIN MAX

A 9.40 10.16 0.370 0.400
B 6.10 6.60 0.240 0.260
C 3.94 4.45 0.155 0.175
D 0.38 0.51 0.015 0.020
F 1.02 1.78 0.040 0.070

G 2.54 BSC 0.100 BSC

H 0.76 1.27 0.030 0.050
J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
L 7.62 BSC 0.300 BSC

M ––– 10 ––– 10

N 0.76 1.01 0.030 0.040

INCHESMILLIMETERS

__

–T–

–A–

58

4X P

–B–

14

G

C

SEATING
PLANE

8X D

K

0.25 (0.010)MB

SS

A0.25 (0.010)MTB

D SUFFIX

PLASTIC PACKAGE

CASE 751–05

M

R

X 45

_

M

(SO–8)

ISSUE N

_

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.

DIM MIN MAX MIN MAX

A 4.80 5.00 0.189 0.196
B 3.80 4.00 0.150 0.157

F

J

C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.18 0.25 0.007 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019

INCHESMILLIMETERS

____

MOTOROLA ANALOG IC DEVICE DATA

9

MC34151 MC33151

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola
was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.

How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,

P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 3–14–2 Tatsumi Koto–Ku, T okyo 135, Japan. 03–81–3521–8315

MFAX: RMF [e-mail] – TOUCHT ONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T ., Hong Kong. 852–26629298

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MOTOROLA ANALOG IC DEVICE DATA

MC34151/D

*MC34151/D*