Datasheet MC26LS30D Datasheet (Motorola)

Device

Operating

Temperature Range

Package



SEMICONDUCTOR

TECHNICAL DATA

DUAL DIFFERENTIAL/

QUAD SINGLE–ENDED

LINE DRIVERS

ORDERING INFORMATION

AM26LS30PC
MC26LS30D TA = – 40° to +85°C

Plastic DIP

SO–16

PIN CONNECTIONS

Order this document by AM26LS30/D

PC SUFFIX

PLASTIC PACKAGE

CASE 648

D SUFFIX

PLASTIC PACKAGE

CASE 751B

(SO–16)

FN SUFFIX

PLASTIC PACKAGE

CASE 775

AM26LS30FN PLCC–20

In B/En AB

Mode

NC

Gnd

In C/En CD

Out B
SR–B
NC
SR–C
Out C

Input A

VCCNC

SR–A

Out A

In D

NC

SR–D

Out D

V

EE

4
5
6
7
8

18
17
16
15
14

3 2 1 20 19

9 10 11 12 13

16

1

4

2

5
6
7
8

9

3

10

11

12

13

14

15

Input C/

Enable CD

(Top View)

SR–A
Output A
Output B

Input D

V

EE

SR–D

Output D

Output C

SR–C

SR–B

Gnd

V

CC

Input A

Mode

Input B/

Enable AB

1

MOTOROLA ANALOG IC DEVICE DATA

 

  
 
  

The AM26LS30 is a low power Schottky set of line drivers which can be
configured as two differential drivers which comply with EIA–422–A
standards, or as four single–ended drivers which comply with EIA–423–A
standards. A mode select pin and appropriate choice of power supplies
determine the mode. Each driver can source and sink currents in excess of
50 mA.

In the differential mode (EIA–422–A), the drivers can be used up to
10 Mbaud. A disable pin for each driver permits setting the outputs into a
high impedance mode within a ±10 V common mode range.

In the single–ended mode (EIA–423–A), each driver has a slew rate
control pin which permits setting the slew rate of the output signal so as to
comply with EIA–423–A and FCC requirements and to reduce crosstalk.
When operated from symmetrical supplies (±5.0 V), the outputs exhibit zero
imbalance.

The AM26LS30 is available in a 16–pin plastic DIP and surface mount
package. Operating temperature range is –40° to +85°C.

• Operates as Two Differential EIA–422–A Drivers, or Four Single–Ended

EIA–423–A Drivers

• High Impedance Outputs in Differential Mode

• Short Circuit Current Limit In Both Source and Sink Modes

• ± 10 V Common Mode Range on High Impedance Outputs

• ± 15 V Range on Inputs

• Low Current PNP Inputs Compatible with TTL, CMOS, and MOS

Outputs

• Individual Output Slew Rate Control in Single–Ended Mode

• Replacement for the AMD AM25LS30 and National Semiconductor

DS3691

Representative Block Diagrams

Single–Ended Mode

EIA–423–A

Differential Mode

EIA–422–A

Enable CD

Enable AB

Out D

Out C

Out B

Out A

VCC–1
VEE–8

Input D

Input A

Input A

SR–A
Out A

Gnd–5
Mode–4

SR–B

SR–C

Out D

SR–D

Out C

Out B

Input B

Input C

Input D

 Motorola, Inc. 1995This document contains information on a new product. Specifications and information herein are

subject to change without notice.

AM26LS30

2

MOTOROLA ANALOG IC DEVICE DATA

MAXIMUM OPERATING CONDITIONS

(Pin numbers refer to DIP and SO–16

packages only.)

Rating

Symbol Value Unit

Power Supply Voltage V

CC

V

EE

–0.5, +7.0
–7.0, +0.5

Vdc

Input Voltage (All Inputs) V

in

–0.5, +20 Vdc

Applied Output Voltage when in High Impedance Mode
(VCC = 5.0 V, Pin 4 = Logic 0, Pins 3, 6 = Logic 1)

V

za

±15 Vdc

Output Voltage with VCC, VEE = 0 V V

zb

±15

Output Current I

O

Self limiting –

Junction Temperature T

J

–65, +150 °C

Devices should not be operated at these limits. The “Recommended Operating Conditions” table provides
conditions for actual device operation.

RECOMMENDED OPERATING CONDITIONS

Rating Symbol Min Typ Max Unit

Power Supply Voltage (Differential Mode) V

CC

V

EE

+4.75

–0.5

5.0
0

+5.25

+0.3

Vdc

Power Supply Voltage (Single–Ended Mode) V

CC

V

EE

+4.75
–5.25

+5.0
–5.0

+5.25
–4.75

Input Voltage (All Inputs) V

in

0 – +15 Vdc

Applied Output Voltage (when in High Impedance Mode) V

za

–10 – +10

Applied Output Voltage, VCC = 0 V

zb

–10 – +10

Output Current I

O

–65 – +65 mA

Operating Ambient Temperature (See text) T

A

–40 – +85 °C

All limits are not necessarily functional concurrently.

ELECTRICAL CHARACTERISTICS (EIA–422–A differential mode, Pin 4

p

0.8 V, –40°C tTA t85°C, 4.75 V p VCC p 5.25 V,

VEE = Gnd, unless otherwise noted. Pin numbers refer to DIP and SO–16 packages only.)

Characteristic

Symbol Min Typ Max Unit

Output Voltage (see Figure 1)

Differential, RL = ∞, VCC = 5.25 V
Differential, RL = 100 Ω, VCC = 4.75 V
Change in Differential Voltage, RL = 100 Ω (Note 4)
Offset Voltage, RL = 100 Ω
Change in Offset Voltage*, RL = 100 Ω

V

OD1



V

OD2



∆V

OD2



V

OS

∆VOS

–

2.0
–
–
–

4.2

2.6
10

2.5
10

6.0
–

400

3.0

400

Vdc
Vdc

mVdc

Vdc

mVdc

Output Current (each output)

Power Off Leakage, VCC = 0, –10 V p VO p +10 V
High Impedance Mode, VCC = 5.25 V, –10 V p VO p +10 V
Short Circuit Current (Note 2)

High Output Shorted to Pin 5 (TA = 25°C)
High Output Shorted to Pin 5 (–40°C t TA t+85°C)
Low Output Shorted to +6.0 V (TA = 25°C)
Low Output Shorted to +6.0 V (–40°C t TA t +85°C)

I

OLK
I

OZ

I

SC–

I

SC–

I

SC+

I

SC+

–100
–100

–150
–150

60
50

0
0

–95

–

75

–

+100
+100

–60
–50
150
150

µA

mA

Inputs

Low Level Voltage
High Level Voltage
Current @ Vin = 2.4 V
Current @ Vin = 15 V
Current @ Vin = 0.4 V
Current, 0 p Vin p 15 V, VCC = 0
Clamp Voltage (Iin = –12 mA)

V

IL

V

IH

I

IH

I

IHH

I

IL

I

IX

V

IK

–

2.0
–
–

–200

–

–1.5

–
–
0
0

–8.0

0
–

0.8
–

40

100

–
–
–

Vdc
Vdc

µA

Vdc

Power Supply Current (VCC = +5.25 V, Outputs Open)

(0 p Enable p VCC)

I

CC

– 16 30

mA

NOTES: 1. All voltages measured with respect to Pin 5.

2.Only one output shorted at a time, for not more than 1 second.

3.Typical values established at +25°C, VCC = +5.0 V, VEE = –5.0 V.

4.Vin switched from 0.8 to 2.0 V.

5.Imbalance is the difference between VO2 with Vin t 0.8 V and VO2 with Vin u 2.0 V.

AM26LS30

3

MOTOROLA ANALOG IC DEVICE DATA

TIMING CHARACTERISTICS (EIA–422–A differential mode, Pin 4

p

0.8 V, TA = 25°C, VCC = 5.0 V, VEE = Gnd, (Notes 1 and 3)

unless otherwise noted.)

Characteristic

Symbol Min Typ Max Unit

Differential Output Rise Time (Figure 3) t

r

– 70 200 ns

Differential Output Fall Time (Figure 3) t

f

– 70 200 ns

Propagation Delay Time – Input to Differential Output

Input Low to High (Figure 3)
Input High to Low (Figure 3)

t

PDH

t

PDL

–
–

90
90

200
200

ns

Skew Timing (Figure 3)

t

PDH

to t

PDL

 for Each Driver

Max to Min t

PDH

Within a Package

Max to Min t

PDL

Within a Package

t

SK1

t

SK2

t

SK3

–
–
–

9.0

2.0

2.0

–
–
–

ns

Enable Timing (Figure 4)

Enable to Active High Differential Output
Enable to Active Low Differential Output
Enable to 3–State Output From Active High
Enable to 3–State Output From Active Low

t

PZH

t

PZL

t

PHZ

t

PLZ

–
–
–
–

150
190

80

110

300
350
350
300

ns

ELECTRICAL CHARACTERISTICS (EIA–423–A single–ended mode, Pin 4

q

2.0 V, –40°C t TA t 85°C, 4.75 V p V

CC

,

|V

EE



p

5.25 V, (Notes 1 and 3) unless otherwise noted).

Characteristic

Symbol Min Typ Max Unit

Output Voltage (VCC = VEE = 4.75 V)

Single–Ended Voltage, RL = ∞ (Figure 2)
Single–Ended Voltage, RL = 450 Ω, (Figure 2)
Voltage Imbalance (Note 5), RL = 450 Ω

VO1
VO2

∆VO2

4.0

3.6
–

4.2

3.95

0.05

6.0

6.0

0.4

Vdc

Slew Control Current (Pins 16, 13, 12, 9) I

SLEW

– ±120 – µA

Output Current (Each Output)

Power Off Leakage, VCC = VEE = 0, –6.0 V p VO p +6.0 V
Short Circuit Current (Output Short to Ground, Note 2)

Vin p 0.8 V (TA = 25°C)
Vin p 0.8 V (–40°C t TA t +85°C)
Vin w 2.0 V (TA = 25°C)
Vin w 2.0 V (–40°C t TA t +85°C)

I

OLK

I

SC+

I

SC+

I

SC–

I

SC–

–100

60

50
–150
–150

0

80

–

–95

–

+100

150
150
–60
–50

µA

mA

Inputs

Low Level Voltage
High Level Voltage
Current @ Vin = 2.4 V
Current @ Vin = 15 V
Current @ Vin = 0.4 V
Current, 0 p Vin p 15 V, VCC = 0
Clamp Voltage (Iin = –12 mA)

V

IL

V

IH

I

IH

I

IHH
I

IL

I

IX

V

IK

–

2.0
–
–

–200

–

–1.5

–
–
0
0

–8.0

0
–

0.8
–

40

100

–
–
–

Vdc
Vdc

µA

Vdc

Power Supply Current (Outputs Open)

VCC = +5.25 V, VEE = –5.25 V, Vin = 0.4 V

I

CC

I

EE

–

–22

17

–8.0

30

–

mA

TIMING CHARACTERISTICS (EIA–423–A single–ended mode, Pin 4

q

2.0 V, TA = 25°C, VCC = 5.0 V, VEE = –5.0 V, (Notes 1 and 3)

unless otherwise noted.)

Characteristic

Symbol Min Typ Max Unit

Output Timing (Figure 5)

Output Rise Time, CC = 0
Output Fall Time, CC = 0
Output Rise Time, CC = 50 pF
Output Fall Time, CC = 50 pF

t

r

t

f

t

r

t

f

–
–
–
–

65
65

3.0

3.0

300
300

–
–

ns

µs

Rise Time Coefficient (Figure 16) C

rt

– 0.06 – µs/pF

Propagation Delay Time, Input to Single Ended Output (Figure 5)

Input Low to High, CC = 0
Input High to Low, CC = 0

t

PDH

t

PDL

–
–

100
100

300
300

ns

Skew Timing, CC = 0 (Figure 5)

t

PDH

to t

PDL

 for Each Driver

Max to Min t

PDH

Within a Package

Max to Min t

PDL

Within a Package

t

SK4

t

SK5

t

SK6

–
–
–

15

2.0

5.0

–
–
–

ns

AM26LS30

4

MOTOROLA ANALOG IC DEVICE DATA

Table 1

Inputs Outputs

Operation V

CC

V

EE

Mode A B C D A B C D

Differential

+5.0 Gnd 0

0

0

0

0

0

1

1

0

(EIA–422–A) 0

1

0

0

1

1

0

0

1

0

X

1

0

1

Z

Z

0

1

010001010

000010101

0101X10ZZ

Single–Ended

+5.0 –5.0 1

0

0

0

0

0

0

0

0

(EIA–423–A) 1

1

0

0

0

1

0

0

0

1

0

1

0

0

0

1

0

0

100100010

100010001

X 0 X X X X X X Z Z Z Z

X = Don’t Care
Z = High Impedance (Off)

Figure 1. Differential Output Test Figure 2. Single–Ended Output Test

V

EE

Mode = 0

V

OS

R

L

RL/2

RL/2

C

L

V

in

(0.8 or 2.0 V)

V

CC

V

O

V

CC

V

OD2

Mode = 1

V

in

(0.8 or 2.0 V)

Figure 3. Differential Mode Rise/Fall Time and Data Propagation Delay

NOTES: 1. S.G. set to: f p 1.0 MHz; duty cycle = 50%; tr, tf, p 10 ns.

2.t

SK1

= t

PDH–tPDL

 for each driver.

3.t

SK2

computed by subtracting the shortest t

PDH

from the longest t

PDH

of the 2 drivers within a package.

4.t

SK3

computed by subtracting the shortest t

PDL

from the longest t

PDL

of the 2 drivers within a package.

10%

t

PDH

1.5 V

V

in

0 V

10%

50%

90%

t

f

t

PDL

t

r

90%

50%

V

out

1.5 V

+3.0 V

V

CC

V

in

S.G.

V

OD

500 pF

100

AM26LS30

5

MOTOROLA ANALOG IC DEVICE DATA

Figure 4. Differential Mode Enable Timing

NOTES: 1. S.G. set to: f p 1.0 MHz; duty cycle = 50%; tr, tf, p 10 ns.

2.Above tests conducted by monitoring output current levels.

Figure 5. Single–Ended Mode Rise/Fall Time and Data Propagation Delay

NOTES: 1. S.G. set to: f p 100 kHz; duty cycle = 50%; tr, tf, p10 ns.

2.t

SK4

= t

PDH–tPDL

 for each driver.

3.t

SK5

computed by subtracting the shortest t

PDH

from the longest t

PDH

of the 4 drivers within a package.

4.t

SK6

computed by subtracting the shortest t

PDL

from the longest t

PDL

of the 4 drivers within a package.

V

EE

t

PZH

t

PZL

t

PLZ

t

PHZ

1.5 V

Output
Current

(Vin = Lo)

0.1 VSS/R

L

0.1 VSS/R

L

VSS/R

L

VSS/R

L

0.5 VSS/R

L

0.5 VSS/R

L

R

L

0 or 3.0 V

En

V

SS

500 pF

450

Ω

S.G.

V

CC

450

C

C

+3.0 V

1.5 V
0 V

V

in

V

CC

V

in

+2.5 V

S.G.

500 pF

V

O

(Vin = Hi)

Vin

1.5 V

V

out

10%

50%

90%

t

r

1.5 V

90%

0 V

10%

V

in

50%

t

f

t

PDL

t

PDH

AM26LS30

6

MOTOROLA ANALOG IC DEVICE DATA

V

OD

Single–Ended Mode
Mode = 1
VCC = 5.0 V, VEE = –5.0 V
Vin = 1

4.0

0

3.5

4.5

IOH, OUTPUT CURRENT (mA)

–60–40–30 –50–20–10

3.0

V

OH

, OUTPUT VOLTAGE (V)

–4.75

0

–3.25

–3.75

60504030

–4.25

2010

IOL, OUTPUT CURRENT (mA)

Single–Ended Mode
Mode = 1
VCC = 5.0 V, VEE = –5.0 V
Vin = 0

V

OL

, OUTPUT VOLTAGE (V)

Figure 6. Differential Output Voltage

versus Load Current

Figure 7. Internal Bias Current

versus Load Current

Figure 8. Short Circuit Current

versus Output Voltage

Figure 9. Input Current versus

Input Voltage

(Pin numbers refer to DIP and SO–16 packages only.)

Figure 10. Output Voltage versus

Output Source Current

Figure 11. Output Voltage versus

Output Sink Current

I

O

VCC = 5.25 V

Vza, APPLIED OUTPUT VOLTAGE (V)

Pins 2 to 4, 6, 7
–5.0 V

t

VEE t 0
Differential or
Single–Ended Mode

VCC = 0

+5.0

0

–5.0

–10

–15

–20

–25

1513119.07.05.03.01.0–1.0

1.0

Normally High Output

+100

+60

+20

–20

–60

–100

6.05.04.03.02.00

20

40

30

20

12010080600 40

5.0

4.0

3.0

2.0

1.0

0

6050403020100

0.8 or

2.0 V

IO, OUTPUT CURRENT (mA)

10

Vin, INPUT VOLTAGE (V)

Normally Low Output

VCC = 5.0 V

Differential Mode
Mode = 0, VCC = 5.0 V

Differential Mode
Mode = 0, VCC = 5.0 V

Differential Mode
Mode = 0
Supply Current = Bias Current + Load Current

TOTAL LOAD CURRENT (mA)

, INPUT CURRENT ( A)

V

OD

, OUTPUT VOLTAGE (V)

I

in

µ

I

B

, BIAS CURRENT (mA)

I

SC

, SHORT CIRCUIT CURRENT (mA)

AM26LS30

7

MOTOROLA ANALOG IC DEVICE DATA

I

SC

– (mA) I

SC

+ (mA)

Figure 12. Internal Positive Bias Current

versus Load Current

Figure 13. Internal Negative Bias Current

versus Load Current

Figure 14. Short Circuit Current

versus Output Voltage

Figure 15. Short Circuit Current

versus

Temperature

Figure 16. Rise/Fall Time versus Capacitance

TOTAL LOAD CURRENT (mA)

I

OL

Vin = Lo Vin = Hi

Single Ended Mode
Mode = 1
VCC = 5.0 V, VEE = –5.0 V
Supply Current = Bias Current + I

OH

–80

I

OH

–2400 –160240 160 80

26

22

18

14

10

I

B+

, BIAS CURRENT (mA)

TOTAL LOAD CURRENT (mA)

0 20 85

Single–Ended Mode
Mode = 1
VCC = 5.0 V, VEE = –5.0 V
Supply Current = Bias Current + I

OL

0

TA, AMBIENT TEMPERATURE (

°

C)

10

CC, CAPACITANCE (pF)

Single or Differential Mode
VCC = 5.0 V, VEE = –5.0 V or Gnd

Single–Ended Mode
Mode = 1
VCC = 5.0 V, VEE = –5.0 V

1.0

Vin = Lo Vin = Hi

50

–40

I

OL

–80 –2400 –160240 160 80

–5.0

–20

–15

–10

I

OH

Normally High Output

Single–Ended Mode
Mode = 1
VCC = 5.0 V, VEE = –5.0 V

Normally Low Output

–100

–20

20

–60

60

100

0

Vza, APPLIED OUTPUT VOLTAGE (V)

–2.0–4.0–6.0 2.0 4.0 6.0

Normally Low Output

10 k

10

100

100

1.0 k

40

–110

110

–100

90

70

60–20

1.0 k

–90

Normally High Output to Ground

I

B–

, BIAS CURRENT (mA)

I

SC

, SHORT CIRCUIT CURRENT (mA)

, RISE/FALL TIME ( s)t

r

µ

, t

f

AM26LS30

8

MOTOROLA ANALOG IC DEVICE DATA

APPLICATIONS INFORMATION

(Pin numbers refer to DIP and SO–16 packages only.)

Description

The AM26LS30 is a dual function line driver – it can be
configured as two differential output drivers which comply
with EIA–422–A Standard, or as four single–ended drivers
which comply with EIA–423–A Standard. The mode of
operation is selected with the Mode pin (Pin 4) and
appropriate power supplies (see Table 1). Each of the four
outputs is capable of sourcing and sinking 60 to 70 mA while
providing sufficient voltage to ensure proper data
transmission.

As differential drivers, data rates to 10 Mbaud can be
transmitted over a twisted pair for a distance determined by
the cable characteristics. EIA–422–A Standard provides
guidelines for cable length versus data rate. The advantage
of a differential (balanced) system over a single–ended
system is greater noise immunity, common mode rejection,
and higher data rates.

Where extraneous noise sources are not a problem, the
AM26LS30 may be configured as four single–ended drivers
transmitting data rates to 100 Kbaud. Crosstalk among wires
within a cable is controlled by the use of the slew rate control
pins on the AM26LS30.

Mode Selection
(Differential Mode)

In this mode (Pins 4 and 8 at ground), only a +5.0 V supply
±5% is required at VCC. Pins 2 and 7 are the driver inputs,
while Pins 10, 11, 14 and 15 are the outputs (see Block
Diagram on page 1). The two outputs of a driver are always
complementary and the differential voltage available at each
pair of outputs is shown in Figure 6 for VCC = 5.0 V. The
differential output voltage will vary directly with VCC. A “high”
output can only source current, while a “low” output can only
sink current (except for short circuit current – see Figure 8).

The two outputs will be in a high impedance mode when
the respective Enable input (Pin 3 or 6) is high, or if VCC

p

1.1 V. Output leakage current over a common mode range of
± 10 V is typically less than 1.0 µA.

The outputs have short circuit current limiting, typically,
less than 100 mA over a voltage range of 0 to +6.0 V (see
Figure 8). Short circuits should not be allowed to last
indefinitely as the IC may be damaged.

Pins 9, 12, 13 and 16 are not normally used when in this
mode, and should be left open.

(Single–Ended Mode)

In this mode (Pin 4 ≥ 2.0 V) VCC requires +5.0 V, and V

EE

requires –5.0 V , both ±5.0%. Pins 2, 3, 6, and 7 are inputs for
the four drivers, and Pins 15, 14, 1 1, and 10 (respectively) are
the outputs. The four drivers are independent of each other,
and each output will be at a positive or a negative voltage
depending on its input state, the load current, and the supply
voltage. Figures 10 & 11 indicate the high and low output
voltages for VCC = 5.0 V, and VEE = –5.0 V. The graph of
Figure 10 will vary directly with VCC, and the graph of

Figure 11 will vary directly with VEE. A “high” output can only
source current, while a “low” output can only sink current
(except short circuit current – see Figure 14).

The outputs will be in a high impedance mode only if

VCCp

1.1 V . Changing VEE to 0 V does not set the outputs
to a high impedance mode. Leakage current over a common
mode range of ±10 V is typically less than 1.0 µA.

The outputs have short circuit current limiting, typically

less than 100 mA over a voltage range of ±6.0 V (see Figure

14). Short circuits should not be allowed to last indefinitely as
the IC may be damaged.

Capacitors connected between Pins 9, 12, 13, and 16 and
their respective outputs will provide slew rate limiting of the
output transition. Figure 16 indicates the required capacitor
value to obtain a desired rise or fall time (measured between
the 10% and 90% points). The positive and negative
transition times will be within ≈ ±5% of each other. Each
output may be set to a different slew rate if desired.

Inputs

The five inputs determine the state of the outputs in
accordance with Table 1. All inputs (regardless of the
operating mode) have a nominal threshold of +1.3 V, and
their voltage must be kept within a range of 0 V to +15 V for
proper operation. If an input is taken more than 0.3 V below
ground, excessive currents will flow, and the proper operation
of the drivers will be affected. An open pin is equivalent to a
logic high, but good design practices dictate that inputs
should never be left open. Unused inputs should be
connected to ground. The characteristics of the inputs are
shown in Figure 9.

Power Supplies

VCC requires +5.0 V, ±5%, regardless of the mode of
operation. The supply current is determined by the IC’s
internal bias requirements and the total load current. The
internally required current is a function of the load current and
is shown in Figure 7 for the differential mode.

In the single–ended mode, VEE must be –5.0 V, ±5% in
order to comply with EIA–423–A standards. Figures 12 and
13 indicate the internally required bias currents as a function
of total load current (the sum of the four output loads). The
discontinuity at 0 load current exists due to a change in bias
current when the inputs are switched. The supply currents
vary ≈ ±2.0 mA as VCC and VEE are varied from

4.75 V to

5.25 V.

Sequencing of the supplies during power–up/power–down
is not required.

Bypass capacitors (0.1 µF minimum on each supply pin)
are recommended to ensure proper operation. Capacitors
reduce noise induced onto the supply lines by the switching
action of the drivers, particularly where long P .C. board tracks
are involved. Additionally, the capacitors help absorb
transients induced onto the drivers’ outputs from the external
cable (from ESD, motor noise, nearby computers, etc.).

AM26LS30

9

MOTOROLA ANALOG IC DEVICE DATA

Operating Temperature Range

The maximum ambient operating temperature, listed as
+85°C, is actually a function of the system use (i.e.,
specifically how many drivers within a package are used) and
at what current levels they are operating. The maximum
power which may be dissipated within the package is
determined by:

P

Dmax

+

T

Jmax

*

T

A

R

q

JA

where R

θJA

= package thermal resistance which is typically:
67°C/W for the DIP (PC) package,
120°C/W for the SOIC (D) package,
T

Jmax

= max. allowable junction temperature (150°C)

TA = ambient air temperature near the IC package.

1) Differential Mode Power Dissipation
For the differential mode, the power dissipated within the

package is calculated from:

PD = [(VCC – VOD)  IO]

(each driver)

+ (VCC  IB)

where: VCC = the supply voltage

where: VOD = is taken from Figure 6 for the known
where: VOD = value of I

O

where: IB = the internal bias current (Figure 7)

As indicated in the equation, the first term (in brackets) must
be calculated and summed for each of the two drivers, while
the last term is common to the entire package. Note that the
term (VCC –VOD) is constant for a given value of IO and does
not vary with VCC. For an application involving the following
conditions:

TA = +85°C, IO = –60 mA (each driver), VCC = 5.25 V , the

suitability of the package types is calculated as follows.

The power dissipated is:

PD = [3.0 V  60 mA  2] + (5.25 V  18 mA)
PD = 454 mW

The junction temperature calculates to:

TJ= 85°C + (0.454 W  67°C/W) = 115°C for the

TJ= DIP package,

TJ= 85°C + (0.454 W  120°C/W) = 139°C for the

TJ= SOIC package.

Since the maximum allowable junction temperature is not
exceeded in any of the above cases, either package can be
used in this application.

2) Single–Ended Mode Power Dissipation

For the single–ended mode, the power dissipated within
the package is calculated from:

PD = (IB+  VCC) + (IB–  VEE) +

[(IO  (VCC – VOH)]

(each driver)

The above equation assumes IO has the same magnitude
for both output states, and makes use of the fact that the
absolute value of the graphs of Figures 10 and 11 are nearly
identical. IB+ and IB– are obtained from the right half of
Figures 12 and 13, and (VCC – VOH) can be obtained from
Figure 10. Note that the term (VCC – VOH) is constant for a
given value of IO and does not vary with VCC. For an
application involving the following conditions:

TA = +85°C, IO = –60 mA (each driver), VCC = 5.25 V,
VEE= –5.25 V, the suitability of the package types is
calculated as follows.

The power dissipated is:

PD= (24 mA  5.25 V) + (–3.0 mA  –5.25 V) +

PD= [60 mA  1.45 V  4.0]

PD= 490 mW

The junction temperature calculates to:

TJ= 85°C + (0.490 W  67°C/W) = 118°C for the

TJ= DIP package,

TJ= 85°C + (0.490 W  120°C/W) = 144°C for the

TJ= SOIC package.

Since the maximum allowable junction temperature is not
exceeded in any of the above cases, either package can be
used in this application.

AM26LS30

10

MOTOROLA ANALOG IC DEVICE DATA

SYSTEM EXAMPLES

(Pin numbers refer to DIP and SO–16 packages only.)

Differential System

An example of a typical EIA–422–A system is shown in
Figure 17. Although EIA–422–A does not specifically address
multiple driver situations, the AM26LS30 can be used in this
manner since the outputs can be put into a high impedance
mode. It is, however, the system designer’s responsibility to
ensure the Enable pins are properly controlled so as to
prevent two drivers on the same cable from being “on” at the
same time.

The limit on the number of receivers and drivers which
may be connected on one system is determined by the input
current of each receiver, the maximum leakage current of
each “off” driver, and the DC current through each
terminating resistor. The sum of these currents must not
exceed the capability of the “on” driver (≈60 mA). If the cable
is of any significant length, with receivers at various points
along its length, the common mode voltage may vary along
its length, and this parameter must be considered when
calculating the maximum driver current.

The cable requirements are defined not only by the AC
characteristics and the data rate, but also by the DC
resistance. The maximum resistance must be such that the
minimum voltage across any receiver inputs is never less than
200 mV.

The ground terminals of each driver and receiver in Figure
17 must be connected together by a dedicated wire (or the
shield) in the cable to provide a common reference. Chassis
grounds or power line grounds should not be relied on for this
common connection as they may generate significant
common mode differences. Additionally, they usually do not
provide a sufficiently low impedance at the frequencies
of interest.

Single–Ended System

An example of a typical EIA–423–A system is shown in
Figure 18. Multiple drivers on a single data line are not
possible since the drivers cannot be put into a high
impedance mode. Although each driver is shown connected
to a single receiver, multiple receivers can be driven from a
single driver as long as the total load current of the receivers
and the terminating resistor does not exceed the capability of
the driver (≈60 mA). If the cable is of any significant length,
with receivers at various points along its length, the common
mode voltage may vary along its length, and this parameter
must be considered when calculating the maximum
driver current.

The cable requirements are defined not only by the AC
characteristics and the data rate, but also by the DC
resistance. The maximum resistance must be such that the

minimum voltage across any receiver inputs is never less
than 200 mV.

The ground terminals of each driver and receiver in Figure
18 must be connected together by a dedicated wire (or the
shield) in the cable so as to provide a common reference.
Chassis grounds or power line grounds should not be relied
on for this common connection as they may generate
significant common mode differences. Additionally, they
usually do not provide a sufficiently low impedance at the
frequencies of interest.

Additional Modes of Operation

If compliance with EIA–422–A or EIA–423–A Standard is
not required in a particular application, the AM26LS30 can be
operated in two other modes.

1) The device may be operated in the differential mode
(Pin 4 = 0) with VEE connected to any voltage between
ground and –5.25 V. Outputs in the low state will be
referenced to VEE, resulting in a differential output voltage
greater than that shown in Figure 6. The Enable pins will
operate the same as previously described.

2) The device may be operated in the single–ended mode
(Pin 4 = 1) with VEE connected to any voltage between
ground and –5.25 V. Outputs in the high state will be at a
voltage as shown in Figure 10, while outputs in a low state
will be referenced to VEE.

Termination Resistors

Transmission line theory states that, in order to preserve
the shape and integrity of a waveform traveling along a cable,
the cable must be terminated in an impedance equal to its
characteristic impedance. In a system such as that depicted
in Figure 17, in which data can travel in both directions, both
physical ends of the cable must be terminated. Stubs leading
to each receiver and driver should be as short as possible.

In a system such as that depicted in Figure 18, in which
data normally travels in one direction only, a terminator is
theoretically required only at the receiving end of the cable.
However, if the cable is in a location where noise spikes of
several volts can be induced onto it, then a terminator
(preferably a series resistor) should be placed at the driver
end to prevent damage to the driver.

Leaving off the terminations will generally result in
reflections which can have amplitudes of several volts above
VCC or several volts below ground or VEE. These
overshoots/undershoots can disrupt the driver and/or
receiver, create false data, and in some cases, damage
components on the bus.

AM26LS30

11

MOTOROLA ANALOG IC DEVICE DATA

Figure 17. EIA–422–A Example

NOTES: 1. Terminating resistors RT should be located at the physical ends of the cable.

2.Stubs should be as short as possible.

3.Receivers = AM26LS32, MC3486, SN75173 or SN75175.

4.Circuit grounds must be connected together through a dedicated wire.

Figure 18. EIA–423–A Example

En

TTLR

AM26LS32, MC3486, SN75173, or SN75175

TTL

C

C

D

–

R

T

+

AM26LS30

D

TTL

R

D

R

DTTLTTL

TTL

D

TTL

D

TTL

TTL

TTL

En

R

Twisted

Pair

R

T

D R

T

En

En

TTL

R

En

R

TTL

En

TTL

TTLR

–

R

T

+

TTLR

–

R

T

+

TTL

R

–

R

T

+

TTL

C

C

D

TTL

C

C

D

TTL

C

C

D

AM26LS30

12

MOTOROLA ANALOG IC DEVICE DATA

OUTLINE DIMENSIONS

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

–A–

B

F

C

S

H

G

D

J

L

M

16 PL

SEATING

1 8

916

K

PLANE

–T–

M

A

M

0.25 (0.010) T

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53

F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC

J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30

L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01

____

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

1 8

16 9

SEATING

PLANE

F

J

M

R

X 45

_

G

8 PLP

–B–

–A–

M

0.25 (0.010) B

S

–T–

D

K

C

16 PL

S

B

M

0.25 (0.010) A

S

T

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019

_ _ _ _

PC SUFFIX

PLASTIC PACKAGE

CASE 648–08

ISSUE R

D SUFFIX

PLASTIC PACKAGE

CASE 751B–05

(SO–16)
ISSUE J

AM26LS30

13

MOTOROLA ANALOG IC DEVICE DATA

OUTLINE DIMENSIONS

–M–

–N–

–L–

Y BRK

W

V

D

D

S

L–M

M

0.007 (0.180) N

S

T

S

L–M

M

0.007 (0.180) N

S

T

S

L–M

S

0.010 (0.250) N

S

T

X

G1

B

U

Z

VIEW D–D

20 1

S

L–M

M

0.007 (0.180) N

S

T

S

L–M

M

0.007 (0.180) N

S

T

S

L–M

S

0.010 (0.250) N

S

T

C

G

VIEW S

E

J

R

Z

A

0.004 (0.100)

–T–

SEATING
PLANE

S

L–M

M

0.007 (0.180) N

S

T

S

L–M

M

0.007 (0.180) N

S

T

H

VIEW S

K

K1

F

G1

NOTES:

1. DATUMS –L–, –M–, AND –N– DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.

2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DATUM –T–, SEATING PLANE.

3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.

4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

5. CONTROLLING DIMENSION: INCH.

6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.

7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.385 0.395 9.78 10.03
B 0.385 0.395 9.78 10.03
C 0.165 0.180 4.20 4.57

E 0.090 0.110 2.29 2.79

F 0.013 0.019 0.33 0.48
G 0.050 BSC 1.27 BSC
H 0.026 0.032 0.66 0.81

J 0.020 ––– 0.51 –––
K 0.025 ––– 0.64 –––
R 0.350 0.356 8.89 9.04
U 0.350 0.356 8.89 9.04

V 0.042 0.048 1.07 1.21
W 0.042 0.048 1.07 1.21

X 0.042 0.056 1.07 1.42

Y ––– 0.020 ––– 0.50

Z 2 10 2 10

G1 0.310 0.330 7.88 8.38
K1 0.040 ––– 1.02 –––

_ _ _ _

FN SUFFIX

PLASTIC PACKAGE

CASE 775–02

ISSUE C

AM26LS30

14

MOTOROLA ANALOG IC DEVICE DATA

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters can and do vary in different
applications. All operating parameters, including “T ypicals” must be validated for each customer application by customer’s technical experts. Motorola does
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.

How to reach us:
USA / EUROPE: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki,

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INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

AM26LS30/D

*AM26LS30/D*

◊