Datasheet MC14532BD, MC14532BCL Datasheet (Motorola)

MOTOROLA CMOS LOGIC DATA

1

MC14532B

  

The MC14532B is constructed with complementary MOS (CMOS)
enhancement mode devices. The primary function of a priority encoder is to
provide a binary address for the active input with the highest priority. Eight
data inputs (D0 thru D7) and an enable input (E

in)

are provided. Five outputs
are available, three are address outputs (Q0 thru Q2), one group select (GS)
and one enable output (E

out

).

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low–power TTL Loads or One Low–Power

Schottky TTL Load over the Rated Temperature Range

MAXIMUM RATINGS* (Voltages Referenced to V

SS

)

Symbol

Parameter Value Unit

V

DD

DC Supply Voltage – 0.5 to + 18.0 V

Vin, V

out

Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V

Iin, I

out

Input or Output Current (DC or Transient),
per Pin

± 10 mA

P

D

Power Dissipation, per Package† 500 mW

T

stg

Storage Temperature – 65 to + 150

_

C

T

L

Lead Temperature (8–Second Soldering) 260

_

C

*Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C

TRUTH TABLE

Input Output

EinD7 D6 D5 D4 D3 D2 D1 D0 GS Q2 Q1 Q0 E

out

0 X X X X X X X X 0 0 0 0 0
1 0 0 0 0 0 0 0 0 0 0 0 0 1

1 1 X X X X X X X 1 1 1 1 0
1 0 1 X X X X X X 1 1 1 0 0
1 0 0 1 X X X X X 1 1 0 1 0
1 0 0 0 1 X X X X 1 1 0 0 0

1 0 0 0 0 1 X X X 1 0 1 1 0
1 0 0 0 0 0 1 X X 1 0 1 0 0
1 0 0 0 0 0 0 1 X 1 0 0 1 0
1 0 0 0 0 0 0 0 1 1 0 0 0 0

X = Don’t Care

This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
V

out

should be constrained to the range VSS ≤ (Vin or V

out

) ≤ VDD.

Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.



SEMICONDUCTOR TECHNICAL DATA

 Motorola, Inc. 1995

REV 3
1/94

L SUFFIX

CERAMIC
CASE 620

ORDERING INFORMATION

MC14XXXBCP Plastic
MC14XXXBCL Ceramic
MC14XXXBD SOIC

TA = – 55° to 125°C for all packages.

P SUFFIX

PLASTIC

CASE 648

D SUFFIX

SOIC

CASE 751B

PIN ASSIGNMENT



13

14

15

16

9

10

11

125

4

3

2

1

8

7

6

D2

D3

GS

E

out

V

DD

Q0

D0

D1

D7

D6

D5

D4

V

SS

Q1

Q2

E

in

MOTOROLA CMOS LOGIC DATAMC14532B

2

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

SS

)

V

– 55_C 25_C 125_C

Characteristic

Symbol

V

DD

Vdc

Min Max Min Typ # Max Min Max

Unit

“0” Level

Vin = VDD or 0

V

OL

5.0
10
15

—
—
—

0.05

0.05

0.05

—
—
—

0
0
0

0.05

0.05

0.05

—
—
—

0.05

0.05

0.05

Vdc

“1” Level

Vin = 0 or V

DD

V

OH

5.0
10
15

4.95

9.95

14.95

—
—
—

4.95

9.95

14.95

5.0
10
15

—
—
—

4.95

9.95

14.95

—
—
—

Vdc

“0” Level
(VO = 4.5 or 0.5 Vdc)
(VO = 9.0 or 1.0 Vdc)
(VO = 13.5 or 1.5 Vdc)

V

IL

5.0
10
15

—
—
—

1.5

3.0

4.0

—
—
—

2.25

4.50

6.75

1.5

3.0

4.0

—
—
—

1.5

3.0

4.0

Vdc

“1” Level
(VO = 0.5 or 4.5 Vdc)
(VO = 1.0 or 9.0 Vdc)
(VO = 1.5 or 13.5 Vdc)

V

IH

5.0
10
15

3.5

7.0
11

—
—
—

3.5

7.0
11

2.75

5.50

8.25

—
—
—

3.5

7.0
11

—
—
—

Vdc

I

OH

5.0

5.0
10
15

– 3.0

– 0.64

– 1.6
– 4.2

—
—
—
—

– 2.4

– 0.51

– 1.3
– 3.4

– 4.2
– 0.88
– 2.25

– 8.8

—
—
—
—

– 1.7

– 0.36

– 0.9
– 2.4

—
—
—
—

mAdc

I

OL

5.0
10
15

0.64

1.6

4.2

—
—
—

0.51

1.3

3.4

0.88

2.25

8.8

—
—
—

0.36

0.9

2.4

—
—
—

mAdc

Input Current I

in

15 — ± 0.1 — ±0.00001 ± 0.1 — ± 1.0 µAdc

Input Capacitance

(Vin = 0)

C

in

— — — — 5.0 7.5 — — pF

Quiescent Current

(Per Package)

I

DD

5.0
10
15

—
—
—

5.0
10
20

—
—
—

0.005

0.010

0.015

5.0
10
20

—
—
—

150
300
600

µAdc

Total Supply Current**†

(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)

I

T

5.0
10
15

IT = (1.74 µA/kHz) f + I

DD

IT = (3.65 µA/kHz) f + I

DD

IT = (5.73 µA/kHz) f + I

DD

µAdc

#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**āThe formulas given are for the typical characteristics only at 25_C.
†To calculate total supply current at loads other than 50 pF:

IT(CL) = IT(50 pF) + (CL – 50) Vfk

where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.005.

Output Voltage

Input Voltage

Output Drive Current

(VOH = 2.5 Vdc) Source
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)

(VOL = 0.4 Vdc) Sink
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)

MOTOROLA CMOS LOGIC DATA

3

MC14532B

SWITCHING CHARACTERISTICS* (C

L

= 50 pF, TA = 25_C)

Characteristic

Symbol V

DD

Min Typ # Max Unit

Output Rise and Fall Time

t

TLH

, t

THL

= (1.5 ns/pF) CL + 25 ns

t

TLH

, t

THL

= (0.75 ns/pF) CL + 12.5 ns

t

TLH

, t

THL

= (0.55 ns/pF) CL + 9.5 ns

t

TLH

,

t

THL

5.0
10
15

—
—
—

100

50
40

200
100

80

ns

Propagation Delay Time — Ein to E

out

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 120 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 77 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 55 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

205
110

80

410
220
160

ns

Propagation Delay Time — Ein to GS

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 90 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL 57 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 40 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

175

90
65

350
180
130

ns

Propagation Delay Time — Ein to Q

n

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 195 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 107 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 75 ns

t

PHL

,

t

PLH

5.0
10
15

—
—
—

280
140
100

560
280
200

ns

Propagation Delay Time — Dn to Q

n

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 265 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 137 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 85 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

300
170
110

600
340
220

ns

Propagation Delay Time — Dn to GS

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 195 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 107 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 75 ns

t

PLH

,

t

PHL

5.0
10
15

—
—
—

280
140
100

560
280
200

ns

*The formulas given are for the typical characteristics only at 25_C.
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Output

Under

VGS = V

DD

VDS = V

out

Sink Current

VGS = – V

DD

VDS = V

out

– V

DD

Source Current

Under

Test

D0 thru D7 EinD0 thru D6 D7 E

in

E

out

Q0XX00000111

Q2X001

1

GS

X0011

Figure 1. Typical Sink and Source

Current Characteristics

Figure 2. Typical Power Dissipation Test Circuit

SWITCH

MATRIX

EXTERNAL

POWER

SUPPLY

I

D

E

in
D0
D1

D2
D3
D4
D5
D6
D7

GS

Q2

Q1

Q0

E

out

V

out

PULSE

GENERATOR

(fo)

E

in
D0
D1

D2
D3
D4
D5
D6
D7

V

SS

V

DD

I

D

C

L

C

L

C

L

C

L

C

L

GS

Q2

Q1

Q0

E

out

0.01

µ

F

500

µ

F

E

Q1

0

0

X 0 0 0 1

X

1

1

MOTOROLA CMOS LOGIC DATAMC14532B

4

Figure 3. AC Test Circuit and Waveforms

PROGRAMMABLE

PULSE

GENERATOR

E

in
D0
D1

D2
D3
D4
D5
D6
D7

GS

Q2

Q1

Q0

E

out

V

DD

V

SS

C

L

C

L

C

L

C

L

C

L

NOTE: Input rise and fall times are 20 ns

50%

50%

50%

50%

50%

50%

50%

50%

90%

50%

10%

90%

50%

10%

90%

50%

10%

90%

50%

10%

t

PHL

t

PHL

t

PHL

t

PHL

t

PHL

t

THL

t

THL

t

THL

t

THL

t

PLH

t

PLH

t

PLH

t

PLH

t

PLH

t

PLH

t

PLH

t

TLH

t

TLH

t

TLH

t

TLH

t

TLH

t

PHL

t

PLH

t

THL

90%

50%

10%

t

PLH

t

PHL

t

PHL

t

PHL

D0

D1

D2

D3

D4

D5

D6

D7

E

in

E

out

GS

Q0

Q1

Q2

10

11

12

13

1

2

3

4

5

15

14

9

7

6

PIN
NO.

50%

MOTOROLA CMOS LOGIC DATA

5

MC14532B

LOGIC DIAGRAM

(Positive Logic)

LOGIC EQUATIONS

E

out

= Ein  D0  D1  D2  D3  D4  D5  D6  D7

10

11

12

13

1

2

3

4

5

D0

D1

D2

D3

D4

D5

D6

D7

E

in

9

7

6

14

15

Q0

Q1

Q2

GS

E

out

Q0 = Ein  (D1  D2  D4  D6 + D3  D4  D6 + D5  D6 + D7)
Q1 = Ein  (D2  D

4  D5 + D3  D4  D5 + D6 + D7)
Q2 = Ein  (D4 + D5 + D6 + D7)
GS = Ein  (D0 + D1 + D2 + D3 + D4 + 05 + D6 + D7)

MOTOROLA CMOS LOGIC DATAMC14532B

6

Figure 4. Two MC14532B’s Cascaded for 4–Bit Output

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0

Q1 Q0Q2 Q1 Q0Q2

Q1 Q0Q2Q3

GS

3/4 MC14071B

V

DD

E

in

E

out

E

in

E

out

E

out

= “1”

WITH Din = “0”

[

0.03 µF). The analog 3.0 dB bandwidth would then be

dc to 1.0 kHz.

ANALOG TO DIGITAL CONVERSION

An analog signal is applied to the analog input of the
MC1710. A digital eight–bit word known to represent a digi­tized level less than the analog input is applied to the
MC14512 as in the D to A conversion. The word is increm­ented at rates sufficient to allow steady state to be reached
between incrementations (i.e. 3.0 ms). The output of the
MC1710 will change when the digital input represents the
first digitized level above the analog input. This word is the
digital representation of the analog word.

ANALOG
OUTPUT

CLOCK

INPUT

ANALOG

INPUT

V

DD

X7 X6 X5 X4 X3 X2 X1 X0

MC14512

A
B
C

MC1710

R

C

Z

V

DD

V

SS

E

in

D0 D1 D2 D3 D4 D5 D6 D7

Q2 Q0Q1

STOP
WORD
INCREMENTATION

Q2 Q4Q3Q1 Q2 Q4Q3Q1

C E R C E R

1/2 MC14520B 1/2 MC14520B

DIGITAL INPUT/OUTPUT

8–BIT WORD

TO BE CONVERTED

DIGITAL TO ANALOG CONVERSION

The digital eight–bit word to be converted is applied to
the inputs of the MC14512 with the most significant bit at
X7 and the least significant bit at X0. A clock input of up to

2.5 MHz (at VDD = 10 V) is applied to the MC14520B.
A compromise between I

for t he MC1710 and ∆R

bias

between N and P–channel outputs gives a value of R of
33 k ohms. In order to filter out the switching frequencies,
RC should be about 1.0 ms (if R = 33 k ohms,
C

Figure 5. Digital to Analog and Analog to Digital Converter

MOTOROLA CMOS LOGIC DATA

7

MC14532B

OUTLINE DIMENSIONS

P SUFFIX

PLASTIC DIP PACKAGE

CASE 648–08

ISSUE R

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

–A–

B

F

C

S

H

G

D

J

L

M

16 PL

SEATING

1 8

916

K

PLANE

–T–

M

A

M

0.25 (0.010) T

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01

____

L SUFFIX

CERAMIC DIP PACKAGE

CASE 620–10

ISSUE V

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.

4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.

–A–

–B–

–T–

F

E

G

N

K

C

SEATING
PLANE

16 PLD

S

A

M

0.25 (0.010) T

16 PLJ

S

B

M

0.25 (0.010) T

M

L

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC 1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC 2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC 7.62 BSC
M 0 15 0 15
N 0.020 0.040 0.51 1.01

_ _ _ _

16 9

1 8

MOTOROLA CMOS LOGIC DATAMC14532B

8

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751B–05

ISSUE J

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

1 8

16 9

SEATING

PLANE

F

J

M

R

X 45

_

G

8 PLP

–B–

–A–

M

0.25 (0.010) B

S

–T–

D

K

C

16 PL

S

B

M

0.25 (0.010) A

S

T

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009

M 0 7 0 7

P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019

_ _ _ _

How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,

P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315

MFAX: [e-mail] – TOUCHTONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer .

MC14532B/D

*MC14532B/D*

◊