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MC141622EVK
1
MOTOROLA
1. SUMMARY
The MC141622EVK is a development board for evaluation of the MC141622. In addition to the
MC141622, the MC141622EVK contains all the analog circuit that is necessary for buffering both the
input and output video signal and generation of the 4xfsc clock. By connecting an external signal source,
monitor, and power supply, it is possible to evaluate all the operating modes on the MC141622.
2. SPECIFICATION
Board Dimensions 100 mm (Length) x 150 mm (Width)
Y/C Separation LSI MC141622FU Mount
Video Input Amplifier MC14577 2SC2002 Use
Video Output Amplifier MC14576 Use
Clamp Circuit 2SC2002 2SA953 Use
Clock Generator MC1378P Use
Clock Buffer Amplifier MC14576 Use
Analog Input/Output Interface BNC Connector x3, S Terminal Output Mount
Digital Input/Output Interface 16 Pin Header Mount
Action Mode MC141622 Supports All Operating Modes
Regulator MC7805CT Use
Recommended Supply Voltage + 10 V
Operating Temperature 0 to 50°C
Supply Current 350 mA
Order this document
by MC141622EVK/D
SEMICONDUCTOR TECHNICAL DATA
Motorola, Inc. 1997
REV 3
1/97 TN97012000
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MC141622EVK
MOTOROLA
2
3. BOARD OPERATION
3.1 ACF–II Operating Mode
AFC–II has four operating modes. Any one of these modes can be selected using the digital code input
to MODE 0 and MODE 1 using ROTARY SW. The function of each mode is as follows.
(1) Normal fsc Mode
This is the mode for usual Y/C separation. It separates Y/C from the video signal that is input to the A/D
converter.
The coring parameter of the vertical enhancer can be set up by the digital code that is input to C0 – C3
(block level parameter), C4 – C7 (white level parameter), and D4 – D7 (noise slice level parameter).
The clock is a 3.579545 MHz subcarrier input to the CLK connector; the built–in 4x PLL generates 4xfsc
clock.
(2) Normal 4xfsc Mode
This mode is used for Y/C separation. It separates Y/C from the video signal that is input to the A/D converter.
The coring parameter of the vertical enhancer can be set up by the digital code that is input to C0 – C3
(block level parameter), C4 – C7 (white level parameter), and D4 – D7 (noise slice level parameter).
The clock is 14.31818 MHz which is a 4x subcarrier input to the CLK connector.
(3) Digital Input Comb Filter Mode
This mode uses the A/D converter, filter, and D/A converter as two independent blocks. The digital data
converted by the A/D converter is output on C0 – C7. Data input on D0 – D7 is processed by the ACF–II.
Filtering is performed by the algorithm of ACF–II and the Y/C video is output as analog signals from Y
out
and C
out
. These two blocks can operate with input clock signals that have different frequencies or phases
and can be operated independently by using the CLK(AD) for the A/D converter, and the CLK input for
the D/A converter.
The clock is 14.31818 MHz which is a 4x subcarrier input to the CLK connector and the CLK(AD) connector.
(4) Digital Output Comb Filter Mode
In addition to the normal Y/C analog outputs, the MC141622EVK can provide the Y/C signals as digital
luminance and chrominance signals. The digital luminance data is output on C0 – C7 and the digital
chrominance data is output on D0 – D7. This digital data can be modified by other digital processing.
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MC141622EVK
3
MOTOROLA
The following table is the assignment for the operating mode.
MODE Switching Function
Mode MODE1 MODE0 Rotary SW
Normal fsc Mode L L 0
Normal 4xfsc Mode L H 1
Digital Input Comb Filtering Mode H L 2
Digital Output Comb Filtering Mode H H 3
4. BK FUNCTION
By setting the BK pin (toggle SW1) to the H level, composite video is output on the Y
out
pin and the chro-
minance signal on the C
out
pin.
The following table is the function of the BK pin.
BK Function
BK Pin Y
out
Pin C
out
Pin
L Luminance Chrominance
H Composite Chrominance
4.1 Vertical Enhancer Function
By setting the VH pin (toggle SW2) to the L level, the vertical enhancer feature is enabled. The coring
parameter of the vertical enhancer can be set up every 1 LSB by the digital code that are input to
C0 – C3 (black level parameter), C4 – C7 (white level parameter), and D4 – D7 (noise slice level parameter.
The set up level of the coring parameter and characteristics are as follows.
Coring Characteristics
OUT
IN
WHITE
BLACK
OUT
IN
WHITE LEVEL
(C4 – C7)
(0 – 15 STEP)
OUT
IN
BLACK LEVEL
(C0 – C3)
(0 – 16 STEP)
OUT
IN
NOISE LEVEL
(D4 – D7)
(0 – 15 STEP)
Vertical Enhancer Function
VH Pin Vertical Enhancer
L On
H Of f
Coring Parameter Set Up
C7 C6 C5 C4
C3 C2 C1 C0
Level
D7 D6 D5 D4
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
0
1
2
3
L
L
L
L
H
H
H
H
L
L
H
H
L
H
L
H
4
5
6
7
H
H
H
H
L
L
L
L
L
L
H
H
L
H
L
H
8
9
A
B
H
H
H
H
H
H
H
H
L
L
H
H
L
H
L
H
C
D
E
F
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MC141622EVK
MOTOROLA
4
4.2 Clock Generator Compounding
The clock generator (MC1378P) provides the necessary reference oscillator and phase locks the clock to
the color subcarrier by inputting the composite video signal.
VC1 adjusts the horizontal VCO to synchronize the output of the burst gate (pin 5 on the MC1378P) with
the input video signal. VC2 adjusts the chroma VCO for maximum amplitude output from the clock buffer
(pin 1 on the MC14576).
VR3 adjusts pull–in of the chroma PLL filter. This is usually fixed to the center position. VR4 selects the
dc bias for the clock buffer output and is usually 2.25 V.
4.3 Video Amplifier Adjustment
On the video amplifier (MC14577), the gain is adjusted by VR1. This sets the input range
(3.0 Vp–p) of the A/D converter in MC141622FU.
VR2 is the clamp level adjustment. This adjusts the sync tip clamping of the input video signal to the
video amplifier.
4.4 Outside Interface
The outside interface should provide a composite video input signal to BNC1. The MC141622EVK provides Y/C separation and outputs the luminance from BNC2 and the color signal from BNC3. There is an
S output connector on this board for easy connection to instruments having an S input connector.
BNC4 and BNC5 are for the external input of each CLK and CLK(AD). However, when using these, it is
necessary to modify the board pattern; i.e., cut (J5, J6).
There is no filter for bandwidth limitations on this board beyond that imposed by the bandwidth limitations
of the MC14577 buffer amplifier . To minimize noise resulting from excessive bandwidth, the bandwidth of
input video signal should be limited to no more than one half of the clock frequency.
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MC141622EVK
5
MOTOROLA
5. MC141622EVK CIRCUIT
CLK(AD)
BNCS
40
+
–
CLK
BNC4
+
+
+
+
+
+
+
+
1/2MC14678
+
2/2MC14678
+
+
+
–
+
–
+ +
+ +
+
+
+
+
+
+
39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
1 2 3 4 5 6 7 8 9 1011121314151617181920
0.1
µ
F
1.0
µ
F
470 k
Ω
0.1
µ
F
0.0047 F
160
30 pF
0.02 F
1.8 k
Ω
1 µF
2.2 k
Ω
4 MHz
CER. RES.
680
14.3 MHz17.7 MHz
MC1378P
MC14576
1234
5678
0.1 µF
7.5 m
Ω
1 m
Ω
0.1 µF
47
µ
F
4.7
µ
F
47
µ
F 0.1 µF
0.1
µ
F
33
µ
H
47 k
Ω
x 8
D4D5D6D7C0C1C2C3C4C5C6
C7
PCO
FL IN
REF(DA)
I
GND(AD)
CC
BIAS
Y
outCout
GND(DA)
D3
D2
D1
D0
BK
GND (D)
V
CC(D)
VH
FSC
NC
NC
NC
10 kΩ x 2
47 µF
0.1
µ
F
33
µ
H
TE1
TE0
MODE1
MODE0
CLK(AD)
GND(D)
V
CC(D)
CLC
CL
out
V
in
RBT
RTP
33
µ
H
V
CC(A)
10 V
Y
out
BNC2
C
out
BNC3
1
2
3
4
5
6
7
8
8
4
7 k
Ω
7 k
Ω
9.1 k
Ω
47 µF
47 µF
47
µ
F
0.1
µ
F
0.1
µ
F
47
µ
F
0.1
µ
F
10 k
47 µF
0.1
µ
F
33
µ
H
33
µ
H
0.1
µ
F
10 µF
0.33
µ
F
1 m
Ω
750 k
Ω
0.1
µ
F
4.7
µ
F
MC7805CT
V
CC(A)
(5 V)
V
out
V
in
GND
MC141622
12345 6789101112
15
16
17
18
19
20
13
14
48
39
38
37
36 35 34 33 32 31 30 29 28 27 26 25
24
23
22
21
41
42
43
44
45
46
47
48
ADC GND
DAC GND
DIGITAL GND
TANT ALUM CAPACITOR
MULTI–LAYER CERAMIC CAPACITOR
C2002
MC14677
1
2
3
4
8
47
µ
F
0.1
µ
F
0.1
µ
F
47
µ
F
33
µ
H
160
VIDEO IN
BNC1
1.0
µ
F
CLAMP LEVEL
2.2
k
Ω
A953
C2002
2 k
Ω
10 kΩ x 8
ROTARY SW
47
µ
F
0.1
µ
F
V
CC(D)
5 V
V
CC(D)
5 V
GAIN ADJUST
1 k
Ω
610
47 µF
30 pF
750 k
Ω
1 k
Ω
J6
V
CC(A)
10 V
SW
µ
µ
0.1
µ
F
0.1
µ
F
0.1
µ
F
0.1
µ
F
0.1
µ
F
0.1
µ
F
0.1
µ
F
0.1
µ
F
0.1
µ
F
1.0
µ
F
1.0
µ
F
1.0 µF 0.1 µF
33 µH
0.001 F
µ
+
1.0
µ
F
5
10 k
Ω
x 8
47 k
Ω
x 8
J5
V
CC(D)
5 V
33
µ
H
33
µ
H
0.1 F
µ
Ω
0.1
µ
F
10
µ
F
V
CC(A)
(10 V)
0.1
µ
F
4.7
µ
F
1.0
µ
F
2 k
Ω
2.2
k
Ω
2.2
k
Ω
33 µH
V
CC(DA)
V
CC(AD)
47 k x 4
Ω
610 k
43 k
Ω
200
OV
bias
Page 6
MC141622EVK
MOTOROLA
6
6. MC141622EVK PARTS LIST
Reference
Designation Description
IC1 MC141622FU
IC2 MC14576CP
IC3 MC14577CP
IC4 MC7805CT
IC5 MC14576CP
IC6 MC1378P
TR1 2SC2002
TR2 2SC2002
TR3 2SA953
R1 9.1 kΩ
R2 62 kΩ
R3, R4 75 Ω
R5 3.6 kΩ
R6 750 kΩ
R7, R8 2.0 kΩ
R9 510 Ω
R10 150 Ω
R11 510 kΩ
R12, R13 2.2 kΩ
R14 47 kΩ x 4
R15 47 kΩ x 8
R16 10 kΩ x 8
R17 47 kΩ x 8
R18 10 kΩ x 8
R19, R20 10 kΩ x 4
R21 200 Ω
R22 1.8 kΩ
R23 680 Ω
R24 750 kΩ
R25 2.2 kΩ
R26 7.5 mΩ
R27 1.0 mΩ
R28 150 Ω
R29 470 kΩ
L1 – L9 33 µH
L10 4.7 µH
L1 1 33 µH
VR1 1 kΩ
VR2 2.2 kΩ
VR3 1 kΩ
VR4 1 mΩ
VC1, VC2 30 pF
SW1, SW2 Toggle Switch
DIP SW1, DIP SW2 8 Channel Dip Switch
ROTARY SW 16 Channel Switch
4 MHz Cer. Res
14.32 MHz Crystal
Reference
Designation Description
C1 0.1 µF
C2, C3 47 µF
C4, C5, C6 0.1 µF
C7 47 µF
C8 0.1 µF
C9 10 µF
C10 0.1 µF
C11 10 µF
C12 0.33 µF
C13 1.0 µF
C14, C15 0.1 µF
C16 47 µF
C17 0.1 µF
C18 1.0 µF
C19 47 µF
C20, C21 0.1 µF
C22 47 µF
C23 0.1 µF
C24 47 µF
C25 0.1 µF
C26 47 µF
C27 10 µF
C28 0.1 µF
C29, C30 47 µF
C31 0.1 µF
C32 0.022 µF
C33, C34 1.0 µF
C35 0.1 µF
C36 0.001 µF
C37 47 µF
C38 – C45 0.1 µF
C46 1.0 µF
C47, C48 0.1 µF
C49 – C51 1.0 µF
C52 0.1 µF
C53 47 µF
C54 0.047 µF
C55 – C57 0.1 µF
Page 7
MC141622EVK
7
MOTOROLA
7. MC141622EVK LAYOUT
C57
MC1378P
IC8
C53
C52
C49
C48
7805CT
BNC1
C30
C31
L8
R22
C32
C33
R25
C36
C34
R24
L9
L10
R26
C39
C47
POWER
C24
C23
C20
C19
R16–1
TR2
TR1
R6
C13
C10
C11
C8
C9
C7
J2
IC4
C29
C16
L3
R5
R1
C27
R21
C28
C29
R7
R20
C25
C26
J4
R19
R2
C3
C14R4
SETTING
CLAMP
LEVEL
BNC2
BNC3
BNC4
CLK
MC141622
IC1
BNC5
CLK(AD)
ROTARY
SW
SETTING
VIDEO
AMPLITUDE
VIDEO IN
MC14577
IC3
Y
out
CLK
C
out
ON
OFF
ON
OFF
VR2
VR1
VR3
VR4
R28
C31
VC1
C56
C55
C54
L11
C51
C50
R28
C21
C22
L5
R13
TR3
R12
R11
C18
R9
R8
C17
L4
R27
C38
C37
J6
J3
C15
J1
C6
L1
C2
C1
C4
L4
R3
R4
R15
PIN HEADER
DIP SW2
R16R18
DIP SW1
R17
PIN HEADER
SW1
SW2
L6
J5
VC2
VERTICAL
ENHANCE
BK
MC14576
IC2
R7
C42
C43
C44
C45
C46
C41
C–PORT
D–PORT
4 MHz
14.32
MC14576
IC6
C12
C40
S CONNECTOR
Page 8
MC141622EVK
MOTOROLA
8
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
Mfax is a trademark of Motorola, Inc.
How to reach us:
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MC141622EVK/D
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