Datasheet MC14106BD, MC14106BDR2, MC14106BDT, MC14106BDTR2, MC14106BCP Datasheet (MOTOROLA)

Page 1
MC14106B
Hex Schmitt Trigger
The MC14106B hex Schmitt Trigger is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14106B may be used in place of the MC14069UB hex inverter for enhanced noise immunity or to “square up” slowly changing waveforms.
Increased Hysteresis Voltage Over the MC14584B
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Capable of Driving T wo Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated T emperature Range
Pin–for–Pin Replacement for CD40106B and MM74C14
Can Be Used to Replace the MC14584B or MC14069UB
MAXIMUM RATINGS (Voltages Referenced to V
Symbol Parameter Value Unit
V
DD
Vin, V
Iin, I
P
T
T
stg
T
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, V to the range V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V
DC Supply Voltage Range –0.5 to +18.0 V Input or Output Voltage Range
out
out
D
A
L
(DC or Transient)
Input or Output Current
(DC or Transient) per Pin
Power Dissipation,
per Package (Note 2.) Ambient Temperature Range –55 to +125 °C Storage Temperature Range –65 to +150 °C Lead Temperature
(8–Second Soldering)
v (Vin or V
SS
or VDD). Unused outputs must be left open.
SS
) v VDD.
out
) (Note 1.)
SS
–0.5 to VDD + 0.5 V
±10 mA
500 mW
260 °C
and V
in
should be constrained
out
http://onsemi.com
MARKING
DIAGRAMS
14
PDIP–14
P SUFFIX
CASE 646
SOIC–14
D SUFFIX
CASE 751A
TSSOP–14 DT SUFFIX
CASE 948G
A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week
MC14106BCP
AWLYYWW
1
14
14106B
AWLYWW
1
14
14
106B
ALYW
1
ORDERING INFORMATION
Device Package Shipping
MC14106BCP PDIP–14 2000/Box MC14106BD SOIC–14 MC14106BDR2 SOIC–14 2500/Tape & Reel MC14106BDT TSSOP–14 MC14106BDTR2 TSSOP–14 2500/Tape & Reel
55/Rail
96/Rail
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev . 3
1 Publication Order Number:
MC14106B/D
Page 2
MC14106B
LOGIC DIAGRAM
1
3
5
9
11
13 12
= PIN 14
V
DD
= PIN 7
V
SS
2
4
6
8
10
EQUIVALENT CIRCUIT SCHEMATIC
(1/6 OF CIRCUIT SHOWN)
http://onsemi.com
2
Page 3
MC14106B
V
DD
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
V
Characteristic
Output Voltage “0” Level
= V
V
in
ОООООООО
DD
“1” Level
V
= 0
ОООООООО
in
Hysteresis Voltage
ОООООООО
ОООООООО
Symbol
V
OL
ÎÎ
V
OH
ÎÎ
V
H
ÎÎ
ÎÎ
Vdc
5.0 10
Î
15
5.0 10
Î
15
(6.)
5.0
Î
10 15
Î
Min
— —
Î
4.95
9.95
Î
14.95
0.3
Î
1.2
1.6
Î
SS
– 55_C
)
Max
0.05
0.05
Î
0.05
Î
2.0
Î
3.4
5.0
Î
25_C
Min
— —
ÎÎ
— — —
4.95
9.95
ÎÎ
14.95
0.3
ÎÎ
1.2
1.6
ÎÎ
Typ
Î
5.0
Î
1.1
Î
1.7
2.1
Î
10 15
(3.)
Max
0 0 0
0.05
0.05
ÎÎ
0.05 —
ÎÎ
2.0
ÎÎ
3.4
5.0
ÎÎ
Min
— —
Î
4.95
9.95
Î
14.95
0.3
Î
1.2
1.6
Î
125_C
Max
0.05
0.05
Î
0.05
Î
Î
Î
Threshold Voltage
Positive–Going
ОООООООО
ОООООООО
Negative–Going
ОООООООО
Output Drive Current
(V
= 2.5 Vdc) Source
OH
ОООООООО
(V
= 4.6 Vdc)
OH
ОООООООО
(V
= 9.5 Vdc)
OH
(V
= 13.5 Vdc)
OH
ОООООООО
(VOL = 0.4 Vdc) Sink (V
= 0.5 Vdc)
OL
ОООООООО
(V
= 1.5 Vdc)
OL
Input Current Input Capacitance
(V
= 0)
in
ОООООООО
Quiescent Current
(Per Package)
ОООООООО
Total Supply Current
(Dynamic plus Quiescent,
ОООООООО
Per Package)
ОООООООО
= 50 pF on all outputs, all
(C
L
buffers switching)
ОООООООО
(4.) (5.)
V
T+
ÎÎ
ÎÎ
V
T–
ÎÎ
I
OH
ÎÎ
ÎÎ
ÎÎ
I
OL
ÎÎ
I
in
C
in
ÎÎ
I
DD
ÎÎ
I
T
ÎÎ
ÎÎ
ÎÎ
5.0
Î
10 15
Î
5.0 10
Î
15
5.0
Î
5.0
Î
10 15
Î
5.0 10
Î
15 15 —
Î
5.0 10
Î
15
5.0 10
Î
15
Î
Î
2.2
Î
4.6
6.8
Î
0.9
2.5
Î
4.0
– 3.0
Î
– 0.64
Î
– 1.6 – 4.2
Î
0.64
1.6
Î
4.2 — —
Î
— —
Î
ООООООООООООООО
ООООООООООООООО
ООООООООООООООО
3.6
Î
7.1
10.8
Î
2.8
5.2
Î
7.4
Î
Î
Î
Î
± 0.1
Î
0.25
0.5
Î
1.0
2.2
ÎÎ
4.6
6.8
ÎÎ
0.9
2.5
ÎÎ
4.0
– 2.4
ÎÎ
– 0.51
ÎÎ
– 1.3
– 3.4
ÎÎ
— — —
0.51
1.3
ÎÎ
3.4 —
ÎÎ
— —
ÎÎ
— IT = (1.8 µA/kHz) f + I
IT = (3.6 µA/kHz) f + I IT = (5.4 µA/kHz) f + I
2.9
Î
5.9
8.8
Î
1.9
3.9
Î
5.8
– 4.2
Î
– 0.88
Î
– 2.25
– 8.8
Î
0.88
2.25
Î
8.8
±0.00001
5.0
Î
0.0005
0.0010
Î
0.0015
3.6
ÎÎ
7.1
10.8
ÎÎ
2.8
5.2
ÎÎ
7.4
ÎÎ
ÎÎ
— —
ÎÎ
— —
ÎÎ
± 0.1
7.5
ÎÎ
0.25
0.5
ÎÎ
1.0
DD DD DD
2.2
Î
4.6
6.8
Î
0.9
2.5
Î
4.0
– 1.7
Î
– 0.36
Î
– 0.9 – 2.4
Î
0.36
0.9
Î
2.4 — —
Î
— —
Î
Î
Î
Î
Î
Î
Î
Î
± 1.0
Î
Î
10.8
3. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
4. The formulas given are for the typical characteristics only at 25_C.
5. To calculate total supply current at loads other than 50 pF: I
) = IT(50 pF) + (CL – 50) Vfk
T(CL
where I
6. V
is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001.
T
=
H
VT+ – V
(But maximum variation of VH is specified as less that V
T–
T+ max
– V
T– min
).
— — —
2.0
3.4
5.0
3.6
7.1
2.8
5.2
7.4
— — — —
— — —
7.5 15 30
Unit
Vdc
Î
Vdc
Î
Vdc
Î
Î
Vdc
Î
Î
Vdc
Î
mAdc
Î
Î
Î
mAdc
Î
µAdc
pF
Î
µAdc
Î
µAdc
Î
Î
Î
http://onsemi.com
3
Page 4
MC14106B
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
SWITCHING CHARACTERISTICS (C
= 50 pF, T
L
Characteristic
Output Rise Time
ООООООООООООО
Output Fall Time
ООООООООООООО
ООООООООООООО
Propagation Delay Time
ООООООООООООО
= 25_C)
A
Symbol
t
TLH
ÎÎÎ
t
THL
ÎÎÎ
ÎÎÎ
t
, t
PLH
PHL
ÎÎÎ
V
DD
Vdc
5.0
ÎÎ
10 15
5.0
ÎÎ
10 15
ÎÎ
5.0 10
ÎÎ
15
Min
ÎÎ
— —
ÎÎ
— —
ÎÎ
— —
ÎÎ
(7.)
Typ
100
ÎÎ
50 40
100
ÎÎ
50 40
ÎÎ
125
50
ÎÎ
40
Max
200
ÎÎ
100
80
200
ÎÎ
100
80
ÎÎ
250 100
ÎÎ
80
7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
20 ns20 ns
V
V
t
PLH
V
t
r
V
PULSE
GENERATOR
INPUT
V
DD
14
VSS7
OUTPUT
INPUT
50%
90%
10%
OUTPUT
t
PHL
t
90%
f
50%
10%
C
L
Figure 1. Switching Time Test Circuit and Waveforms
Unit
ns
Î
ns
Î
Î
ns
Î
DD
SS
OH
OL
, OUTPUT VOLTAGE (Vdc)
out
V
V
DD
0
0
V
, INPUT VOLTAGE (Vdc)
in
V
V
T–
T+
V
H
V
DD
Figure 2. T ypical Transfer Characteristics
http://onsemi.com
4
Page 5
MC14106B
APPLICATIONS
V
H
V
in
V
out
(a) Schmitt Triggers will square up
inputs with slow rise and fall times.
V
DD
R
Rs
V
out
C
V
in
V
DD
V
in
V
SS
V
DD
V
out
V
SS
V
out
V
V
H
DD
V
SS
V
DD
V
SS
(b) A Schmitt trigger offers maximum
noise immunity in gate applications.
Figure 3.
V
DD
tw
Rs
C
V
out
R
tw = RC IN
tw
V
DD
V
T+
Useful as Pushbutton/Keyboard Debounce Circuit.
Figure 4. Monostable Multivibrator
http://onsemi.com
5
Page 6
MC14106B
1
f
V
R
C
*t1[
*t2[
1
[
f
*t1 + t2 & t
RCln
RCln
RCln
V
T
)
V
T
V
DD
VDD–V
VDD–V
ǒ
ƪ
VDD–V
+ t
PHL
PLH
–V
T
)
T
V
T
T
Ǔ
ǒ
V
)
T
t1
t2
)
Ǔ
ƫ
T
in
Useful in discriminating against short pulse durations.
R
A
C
V
DD
V
V
T+
in
V
SS
V
DD
V
T+
A
V
SS
V
DD
V
V
T+
out
V
SS
V
out
Figure 5. Astable Multivibrator
V
in
–EDGE +EDGE
Useful as an edge detector circuit.
C
R
tw = RC ln
Figure 7. Differentiator Figure 8. Positive Edge Time Delay Circuit
V
DD
+EDGE
–EDGE
Figure 6. Integrator
V
in
CCC
V
in
tw
V
DD
V
T+
RRR
http://onsemi.com
6
Page 7
MC14106B
P ACKAGE DIMENSIONS
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
ISSUE M
14 8
B
17
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–T–
SEATING PLANE
–T–
SEATING PLANE
N
HG
–A–
14 8
G
D 14 PL
0.25 (0.010) A
A
F
L
C
D
14 PL
0.13 (0.005)
K
J
M
M
DIM MIN MAX MIN MAX
A 0.715 0.770 18.16 18.80 B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 F 0.040 0.070 1.02 1.78 G 0.100 BSC 2.54 BSC H 0.052 0.095 1.32 2.41 J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 L
0.290 0.310 7.37 7.87
M ––– 10 ––– 10 N 0.015 0.039 0.38 1.01
MILLIMETERSINCHES
__
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
–B–
P
7 PL
M
71
0.25 (0.010) B
C
R X 45
K
M
S
B
T
S
M
_
M
F
J
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
DIM MIN MAX MIN MAX
A 8.55 8.75 0.337 0.344 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7
____
P 5.80 6.20 0.228 0.244 R 0.25 0.50 0.010 0.019
INCHESMILLIMETERS
http://onsemi.com
7
Page 8
MC14106B
P ACKAGE DIMENSIONS
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948G–01
ISSUE O
0.10 (0.004)
–T–
SEATING PLANE
–W–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED
0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–.
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C ––– 1.20 ––– 0.047 D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC M 0 8 0 8
____
INCHESMILLIMETERS
14X REFK
S
U
T
S
N
0.25 (0.010)
U0.15 (0.006) T
S
2X L/2
0.10 (0.004) V
14
M
8
M
L
PIN 1 IDENT.
1
S
U0.15 (0.006) T
A
–V–
B
–U–
N
F
7
DETAIL E
K
K1
J
J1
SECTION N–N
C
D
G
H
DETAIL E
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer .
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com
Fax Response Line: 303–675–2167 or 800–344–3810 T oll Free USA/Canada
N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support
German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich T ime)
Email: ONlit–german@hibbertco.com
French Phone: (+1) 303–308–7141 (M–F 1:00pm to 5:00pm Toulouse T ime)
Email: ONlit–french@hibbertco.com
English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time)
Email: ONlit@hibbertco.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
*Available from Germany, France, Italy, England, Ireland
CENTRAL/SOUTH AMERICA:
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
Email: ONlit–spanish@hibbertco.com
ASIA/PACIFIC : LDC for ON Semiconductor – Asia Support
Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)
T oll Free from Hong Kong & Singapore:
001–800–4422–3781
Email: ONlit–asia@hibbertco.com
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, T okyo, Japan 141–8549
Phone: 81–3–5740–2745 Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local Sales Representative.
http://onsemi.com
8
MC14106B/D
Loading...