Datasheet MC14106BD, MC14106BCP, MC14106BCL Datasheet (Motorola)

MOTOROLA CMOS LOGIC DATA

255

MC14106B

  

The MC14106B hex Schmitt Trigger is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
These devices find primary use where low power dissipation and/or high
noise immunity is desired. The MC14106B may be used in place of the
MC14069UB hex inverter for enhanced noise immunity or to “square up”
slowly changing waveforms.

• Increased Hysteresis Voltage Over the MC14584B

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low–power TTL Loads or One Low–power

Schottky TTL Load Over the Rated Temperature Range

• Pin–for–Pin Replacement for CD40106B and MM74C14

• Can Be Used to Replace the MC14584B or MC14069UB

MAXIMUM RATINGS* (Voltages Referenced to V

SS

)

Symbol

Parameter

Value

Unit

V

DD

DC Supply Voltage

– 0.5 to + 18.0

V

Vin, V

out

Input or Output Voltage (DC or Transient)

– 0.5 to VDD + 0.5

V

Iin, I

out

Input or Output Current (DC or Transient),
per Pin

± 10

mA

P

D

Power Dissipation, per Package†

500

mW

T

stg

Storage Temperature

– 65 to + 150

_

C

T

L

Lead Temperature (8–Second Soldering)

260

_

C

*Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C

EQUIVALENT CIRCUIT SCHEMATIC

(1/6 OF CIRCUIT SHOWN)

This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
V

out

should be constrained to the range VSS ≤ (Vin or V

out

) ≤ VDD.

Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.



SEMICONDUCTOR TECHNICAL DATA

 Motorola, Inc. 1995

REV 3
1/94



L SUFFIX

CERAMIC

CASE 632

ORDERING INFORMATION

MC14XXXBCP Plastic
MC14XXXBCL Ceramic
MC14XXXBD SOIC

TA = – 55° to 125°C for all packages.

P SUFFIX

PLASTIC

CASE 646

D SUFFIX

SOIC

CASE 751A

LOGIC DIAGRAM

13 12

10

8

6

4

2

11

9

5

3

1

VDD = PIN 14

VSS = PIN 7

MOTOROLA CMOS LOGIC DATAMC14106B

256

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

SS

)

V

– 55_C

25_C

125_C

Characteristic

Symbol

V

DD

Vdc

Min

Max

Min

Typ #

Max

Min

ÎÎÎ

ÎÎÎ

ÎÎÎ

Max

Unit

Output Voltage

“0” Level

Vin = V

DD

V

OL

5.0
10
15

—
—
—

0.05

0.05

0.05

—
—
—

0
0
0

0.05

0.05

0.05

—
—
—

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

0.05

0.05

0.05

Vdc

“1” Level

Vin = 0

V

OH

5.0
10
15

4.95

9.95

14.95

—
—
—

4.95

9.95

14.95

5.0
10
15

—
—
—

4.95

9.95

14.95

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

—
—
—

Vdc

Hysteresis Voltage

V

H

†

5.0
10
15

0.3

1.2

1.6

2.0

3.4

5.0

0.3

1.2

1.6

1.1

1.7

2.1

2.0

3.4

5.0

0.3

1.2

1.6

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

2.0

3.4

5.0

Vdc

Threshold Voltage

Positive–Going

V

T+

5.0
10
15

2.2

4.6

6.8

3.6

7.1

10.8

2.2

4.6

6.8

2.9

5.9

8.8

3.6

7.1

10.8

2.2

4.6

6.8

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

3.6

7.1

10.8

Vdc

Negative–Going

V

T–

5.0
10
15

0.9

2.5

4.0

2.8

5.2

7.4

0.9

2.5

4.0

1.9

3.9

5.8

2.8

5.2

7.4

0.9

2.5

4.0

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

2.8

5.2

7.4

Vdc

Output Drive Current

(VOH = 2.5 Vdc) Source
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)

I

OH

5.0

5.0
10
15

– 3.0

– 0.64

– 1.6
– 4.2

—
—
—
—

– 2.4

– 0.51

– 1.3
– 3.4

– 4.2
– 0.88
– 2.25

– 8.8

—
—
—
—

– 1.7

– 0.36

– 0.9
– 2.4

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

—
—
—
—

mAdc

(VOL = 0.4 Vdc) Sink
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)

I

OL

5.0
10
15

0.64

1.6

4.2

—
—
—

0.51

1.3

3.4

0.88

2.25

8.8

—
—
—

0.36

0.9

2.4

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

—
—
—

mAdc

Input Current

I

in

15

—

± 0.1

—

±0.00001

± 0.1

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

± 1.0

µAdc

Input Capacitance

(Vin = 0)

C

in

—

—

—

—

5.0

7.5

—

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

—

pF

Quiescent Current

(Per Package)

I

DD

5.0
10
15

—
—
—

0.25

0.5

1.0

—
—
—

0.0005

0.0010

0.0015

0.25

0.5

1.0

—
—
—

ÎÎÎ

ÎÎÎ

ÎÎÎ

ÎÎÎ

7.5
15
30

µAdc

Total Supply Current**†

(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)

I

T

5.0
10
15

IT = (1.8 µA/kHz) f + I

DD

IT = (3.6 µA/kHz) f + I

DD

IT = (5.4 µA/kHz) f + I

DD

µAdc

#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
**The formulas given are for the typical characteristics only at 25_C.
†To calculate total supply current at loads other than 50 pF:

IT(CL) = IT(50 pF) + (CL – 50) Vfk
where IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.001.
†VH = VT+ – VT– (But maximum variation of VH is specified as less that VT+

max

– VT–

min

).

MOTOROLA CMOS LOGIC DATA

257

MC14106B

SWITCHING CHARACTERISTICS (C

L

= 50 pF, TA = 25_C)

Characteristic

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Symbol

V

DD

Vdc

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

Min

Typ #

Max

Unit

Output Rise Time

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

t

TLH

5.0
10
15

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

—
—
—

100

50
40

200
100

80

ns

Output Fall Time

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

t

THL

5.0
10
15

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

—
—
—

100

50
40

200
100

80

ns

Propagation Delay Time

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

t

PLH

, t

PHL

5.0
10
15

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

ÎÎÎÎ

—
—
—

125

50
40

250
100

80

ns

#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Figure 1. Switching Time Test Circuit and Waveforms

PULSE

GENERATOR

INPUT

OUTPUT

V

DD

VSS7

C

L

14

V

DD

V

SS

V

OH

V

OL

20 ns20 ns

INPUT

OUTPUT

t

PHL

t

PLH

90%

50%

10%

90%

50%

10%

t

f

t

r

V

out

, OUTPUT VOLTAGE (Vdc)

V

DD

0

V

DD

0

Vin, INPUT VOLTAGE (Vdc)

V

T–VT+

V

H

Figure 2. Typical Transfer Characteristics

Figure 3.

(b) A Schmitt trigger offers maximum

noise immunity in gate applications.

V

in

V

out

V

H

V

in

V

out

V

DD

V

SS

V

DD

V

SS

V

DD

V

SS

V

DD

V

SS

V

in

V

out

V

H

(a) Schmitt Triggers will square up

inputs with slow rise and fall times.

APPLICATIONS

MOTOROLA CMOS LOGIC DATAMC14106B

258

Figure 4. Monostable Multivibrator

V

DD

V

DD

R

C

V

out

tw

Rs

Rs

C

R

V

out

tw

Useful as Pushbutton/Keyboard Debounce Circuit.

tw = RC IN

V

DD

V

T+

Figure 5. Astable Multivibrator

C

R

1

f

t1

t2

* t

1

[

RCln

V

T

)

V

T

–

* t2[

RCln

V

DD

– V

T

–

VDD– V

T

)

1

f

[

RCln

ƪ

ǒ

VDD– V

T

–

VDD– V

T

)

Ǔ

ǒ

V

T

)

V

T

–

Ǔ

ƫ

*t1 + t2 & t

PHL

+ t

PLH

Figure 6. Integrator

R

A

V

in

V

out

C

V

SS

V

T+

V

DD

V

in

V

SS

V

T+

V

DD

A

V

SS

V

T+

V

DD

V

out

Useful in discriminating against short pulse durations.

Figure 7. Differentiator Figure 8. Positive Edge Time Delay Circuit

C

R

–EDGE +EDGE

V

DD

V

in

+EDGE

–EDGE

tw

tw = RC ln

V

DD

V

T+

Useful as an edge detector circuit.

C C C

R R R

V

in

V

in

MOTOROLA CMOS LOGIC DATA

259

MC14106B

OUTLINE DIMENSIONS

L SUFFIX

CERAMIC DIP PACKAGE

CASE 632–08

ISSUE Y

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.750 0.785 19.05 19.94
B 0.245 0.280 6.23 7.11
C 0.155 0.200 3.94 5.08
D 0.015 0.020 0.39 0.50
F 0.055 0.065 1.40 1.65
G 0.100 BSC 2.54 BSC
J 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC 7.62 BSC
M 0 15 0 15
N 0.020 0.040 0.51 1.01

____

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.

4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.

–A–

–B–

C

14 PLD

GF N

K

14 PLJ

M

L

S

B

M

0.25 (0.010) T

S

A

M

0.25 (0.010) T

–T–

SEATING
PLANE

1 7

14 9

P SUFFIX

PLASTIC DIP PACKAGE

CASE 646–06

ISSUE L

NOTES:

1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.

2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.

3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.

4. ROUNDED CORNERS OPTIONAL.

1 7

14 8

B

A

F

H G D

K

C

N

L

J

M

SEATING
PLANE

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.715 0.770 18.16 19.56
B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53

F 0.040 0.070 1.02 1.78
G 0.100 BSC 2.54 BSC
H 0.052 0.095 1.32 2.41

J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43

L 0.300 BSC 7.62 BSC
M 0 10 0 10
N 0.015 0.039 0.39 1.01

_ _ _ _

MOTOROLA CMOS LOGIC DATAMC14106B

260

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

–A–

–B–

G

P

7 PL

14 8

71

M

0.25 (0.010) B

M

S

B

M

0.25 (0.010) A

S

T

–T–

F

R

X 45

SEATING
PLANE

D 14 PL

K

C

J

M

_

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009

M 0 7 0 7

P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019

_ _ _ _

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MC14106B/D

*MC14106B/D*

◊