Datasheet MC14076BD, MC14076BCP, MC14076BCL Datasheet (Motorola)

MOTOROLA CMOS LOGIC DATA

1

MC14076B

 !    

The MC14076B 4–Bit Register consists of four D–type flip–flops operating synchronously from a common clock. OR gated output–disable inputs force the outputs into a high–impedance state for use in bus organized systems. OR gated data–disable inputs cause the Q outputs to be fed back to the D inputs of the flip–flops. Thus they are inhibited from changing state while the clocking process remains u ndisturbed. An asynchronous master root is provided to clear all four flip–flops simultaneously independent of the clock or disable inputs.

• Three–State Outputs with Gated Control Lines

• Fully Independent Clock Allows Unrestricted Operation for the Two

Modes: Parallel Load and Do Nothing

• Asynchronous Master Reset

• Four Bus Buffer Registers

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low–Power TTL Loads or One Low–Power

Schottky TTL Load Over the Rated Temperature Range

MAXIMUM RATINGS* (Voltages Referenced to V

SS

)

Symbol

Parameter

Value

Unit

V

DD

DC Supply Voltage

– 0.5 to + 18.0

V

Vin, V

out

Input or Output Voltage (DC or Transient)

– 0.5 to VDD + 0.5

V

Iin, I

out

Input or Output Current (DC or Transient), per Pin

± 10

mA

P

D

Power Dissipation, per Package†

500

mW

T

stg

Storage Temperature

– 65 to + 150

_

C

T

L

Lead Temperature (8–Second Soldering)

260

_

C

*Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C

FUNCTION TABLE

Inputs

Data Disable

Data

Output

Reset

Clock

A B

Data

D

Output

Q

1 X X X X 0 0 0 X X X Q

n

0 1 X X Q

n

0 X 1 X Q

n

0 0 0 0 0 0 0 0 1 1

When either output disable A or B (or both) is (are) high the output is disabled to the high–impedance state; however sequential operation of the flip–flops is not affected. X = Don’t Care.



SEMICONDUCTOR TECHNICAL DATA

 Motorola, Inc. 1995

REV 3 1/94

    "   



L SUFFIX

CERAMIC

CASE 620

ORDERING INFORMATION

MC14XXXBCP Plastic MC14XXXBCL Ceramic MC14XXXBD SOIC

TA = – 55° to 125°C for all packages.

P SUFFIX

PLASTIC

CASE 648

D SUFFIX

SOIC

CASE 751B

BLOCK DIAGRAM

15 14 13 12 11 10

9 7 2 1

3

4

5

6

RESET D0 D1 D2 D3 B A CLOCK B A

DATA DISABLE

OUTPUT DISABLE

VDD = PIN 16

VSS = PIN 8

Q0

Q1

Q2

Q3

MOTOROLA CMOS LOGIC DATAMC14076B

2

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

SS

)

V

– 55_C

25_C

125_C

Characteristic

Symbol

V

DD

Vdc

Min

Max

Min

Typ #

Max

Min

ÎÎÎ

Max

Unit

Output Voltage

“0” Level

Vin = VDD or 0

V

OL

5.0 10 15

— — —

0.05

— — —

0 0 0

0.05

— — —

ÎÎÎ

0.05

Vdc

“1” Level

Vin = 0 or V

DD

V

OH

5.0 10 15

4.95

9.95

14.95

— — —

4.95

9.95

14.95

5.0 10 15

— — —

4.95

9.95

14.95

ÎÎÎ

— — —

Vdc

Input Voltage

“0” Level (VO = 4.5 or 0.5 Vdc) (VO = 9.0 or 1.0 Vdc) (VO = 13.5 or 1.5 Vdc)

V

IL

5.0 10 15

— — —

1.5

3.0

4.0

— — —

2.25

4.50

6.75

1.5

3.0

4.0

— — —

ÎÎÎ

1.5

3.0

4.0

Vdc

“1” Level (VO = 0.5 or 4.5 Vdc) (VO = 1.0 or 9.0 Vdc) (VO = 1.5 or 13.5 Vdc)

V

IH

5.0 10 15

3.5

7.0 11

— — —

3.5

7.0 11

2.75

5.50

8.25

— — —

3.5

7.0 11

ÎÎÎ

— — —

Vdc

Output Drive Current

(VOH = 2.5 Vdc) Source (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc)

I

OH

5.0

5.0 10 15

– 3.0

– 0.64

– 1.6 – 4.2

— — — —

– 2.4

– 0.51

– 1.3 – 3.4

– 4.2 – 0.88 – 2.25

– 8.8

— — — —

– 1.7

– 0.36

– 0.9 – 2.4

ÎÎÎ

— — — —

mAdc

(VOL = 0.4 Vdc) Sink (VOL = 0.5 Vdc) (VOL = 1.5 Vdc)

I

OL

5.0 10 15

0.64

1.6

4.2

— — —

0.51

1.3

3.4

0.88

2.25

8.8

— — —

0.36

0.9

2.4

ÎÎÎ

— — —

mAdc

Input Current

I

in

15

—

± 0.1

—

±0.00001

± 0.1

—

ÎÎÎ

± 1.0

µAdc

Input Capacitance

(Vin = 0)

C

in

—

5.0

7.5

—

ÎÎÎ

—

pF

Quiescent Current

(Per Package)

I

DD

5.0 10 15

— — —

5.0 10 20

— — —

0.005

0.010

0.015

5.0 10 20

— — —

ÎÎÎ

150 300 600

µAdc

Total Supply Current**†

(Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching)

I

T

5.0 10 15

IT = (0.75 µA/kHz) f + I

DD

IT = (1.50 µA/kHz) f + I

DD

IT = (2.25 µA/kHz) f + I

DD

µAdc

Three–State Leakage Current

I

TL

15

—

± 0.1

—

± 0.0001

± 0.1

—

ÎÎÎ

± 3.0

µAdc

#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. **The formulas given are for the typical characteristics only at 25_C. †To calculate total supply current at loads other than 50 pF:

IT(CL) = IT(50 pF) + (CL – 50) Vfk

where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.

MOTOROLA CMOS LOGIC DATA

3

MC14076B

SWITCHING CHARACTERISTICS* (C

L

= 50 pF, TA = 25_C)

Characteristic

ÎÎÎÎ

Symbol

V

DD

Vdc

ÎÎÎÎ

Min

Typ #

Max

Unit

Output Rise and Fall Time

t

TLH

, t

THL

= (1.5 ns/pF) CL + 25 ns

t

TLH

, t

THL

= (0.75 ns/pF) CL + 12.5 ns

t

TLH

, t

THL

= (0.55 ns/pF) CL + 9.5 ns

ÎÎÎÎ

t

TLH

, t

THL

5.0 10 15

ÎÎÎÎ

— — —

100

50 40

200 100

80

ns

Propagation Delay Time

Clock to Q

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 215 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 92 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 65 ns

ÎÎÎÎ

t

PLH

, t

PHL

5.0 10 15

ÎÎÎÎ

— — —

300 125

90

600 250 180

ns

Reset to Q

t

PLH

, t

PHL

= (1.7 ns/pF) CL + 215 ns

t

PLH

, t

PHL

= (0.66 ns/pF) CL + 92 ns

t

PLH

, t

PHL

= (0.5 ns/pF) CL + 65 ns

ÎÎÎÎ

5.0 10 15

ÎÎÎÎ

— — —

300 125

90

600 250 180

3–State Propagation Delay, Output “1” or “0”

to High Impedance

ÎÎÎÎ

t

PHZ

, t

PLZ

5.0 10 15

ÎÎÎÎ

— — —

150

60 45

300 120

90

ns

3–State Propagation Delay, High Impedance

to “1” or “0” Level

ÎÎÎÎ

t

PZH

, t

PZL

5.0 10 15

ÎÎÎÎ

— — —

200

80 60

400 160 120

ns

Clock Pulse Width

ÎÎÎÎ

t

WH

5.0 10 15

ÎÎÎÎ

260 110

80

130

55 40

— — —

ns

Reset Pulse Width

ÎÎÎÎ

t

WH

5.0 10 15

ÎÎÎÎ

370 150 110

185

75 55

— — —

ns

Data Setup Time

ÎÎÎÎ

t

su

5.0 10 15

ÎÎÎÎ

30 10

4

15

5 2

— — —

ns

Data Hold Time

ÎÎÎÎ

t

h

5.0 10 15

ÎÎÎÎ

130

60 50

65 30 25

— — —

ns

Data Disable Setup Time

ÎÎÎÎ

t

su

5.0 10 15

ÎÎÎÎ

220

80 50

110

40 25

— — —

ns

Clock Pulse Rise and Fall Time

ÎÎÎÎ

t

TLH

, t

THL

5.0 10 15

ÎÎÎÎ

— — —

15

5 4

µs

Clock Pulse Frequency

ÎÎÎÎ

f

cl

5.0 10 15

ÎÎÎÎ

— — —

3.6

9.0 12

1.8

4.5

6.0

MHz

*The formulas given are for the typical characteristics only at 25_C. #Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and V

out

should be constrained to the range VSS ≤ (Vin or V

out

) ≤ VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.

MOTOROLA CMOS LOGIC DATAMC14076B

4

Figure 1. Timing Diagram

INPUT RISE AND FALL 20 ns

D

INPUT

INFORMATION

V

DD

V

SS

V

SS

V

OH

V

OL

V

DD

Q OUTPUT

90%

50%

10%

t

su

t

h

t

su

t

h

20 ns

90%

10%

50%

90%

10%

t

TLH

t

PHL

t

THL

50%

t

WH

t

WL

f

cl

RESET = 0 DATA DISABLE A AND B = 0 OUTPUT DISABLE A AND B = 0

Figure 2. Three–State Propagation Delay

Waveshape and Circuit

MC14076B

OTHER INPUTS

OUTPUT

DISABLE

A OR B

ANY Q

OUTPUT

RL = 1 k

Ω

C

L

VDD FOR t

PLZ

AND t

PZL

VSS FOR t

PHZ

AND t

PZH

OUTPUT DISABLE

A OR B

ANY Q

OUTPUT

ANY Q

OUTPUT

20 ns 20 ns

V

DD

V

SS

V

OH

90%

50%

10%

t

PLZ

t

PZL

90%

t

PZH

t

PHZ

90%

10%

≈

2.5 V @ VDD = 5 V, 10 V, AND 15 V

≈

2 V @ VDD = 5 V

≈

6 V @ VDD = 10 V

≈

10 V @ VDD = 15 V

V

OL

OUTPUTS

CONNECTED

OUTPUTS

DISCONNECTED

OUTPUTS

CONNECTED

t

PLH

EQUIVALENT

FUNCTIONAL BLOCK DIAGRAM

OUTPUT DISABLE A OUTPUT DISABLE B

D0

1 2

14

DATA DISABLE A DATA DISABLE B910

D1 13

CLOCK 7

D2 12

D3 11

RESET 15

6 Q3

5 Q2

4 Q1

3 Q0

D Q

R

C

Q

D Q

R

C

Q

D Q

R

C

Q

D Q

R

C

Q

PIN ASSIGNMENT

13

14

15

16

9

10

11

125

4

3

2

1

8

7

6

D2

D1

D0

R

V

DD

A

B

D3

Q1

B

A

V

SS

C

Q3

Q2

Q0

OUTPUT

DISABLE

DATA DISABLE

{

}

MOTOROLA CMOS LOGIC DATA

5

MC14076B

OUTLINE DIMENSIONS

P SUFFIX

PLASTIC DIP PACKAGE

CASE 648–08

ISSUE R

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

–A–

B

F

C

S

H

G

D

J

L

M

16 PL

SEATING

1 8

916

K

PLANE

–T–

M

A

M

0.25 (0.010) T

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53

F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01

____

L SUFFIX

CERAMIC DIP PACKAGE

CASE 620–10

ISSUE V

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.

4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY.

–A–

–B–

–T–

F

E

G

N

K

C

SEATING PLANE

16 PLD

S

A

M

0.25 (0.010) T

16 PLJ

S

B

M

0.25 (0.010) T

M

L

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.750 0.785 19.05 19.93 B 0.240 0.295 6.10 7.49 C ––– 0.200 ––– 5.08 D 0.015 0.020 0.39 0.50 E 0.050 BSC 1.27 BSC F 0.055 0.065 1.40 1.65 G 0.100 BSC 2.54 BSC H 0.008 0.015 0.21 0.38 K 0.125 0.170 3.18 4.31 L 0.300 BSC 7.62 BSC M 0 15 0 15 N 0.020 0.040 0.51 1.01

_ _ _ _

16 9

1 8

MOTOROLA CMOS LOGIC DATAMC14076B

6

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751B–05

ISSUE J

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

1 8

16 9

SEATING

PLANE

F

J

M

R

X 45

_

G

8 PLP

–B–

–A–

M

0.25 (0.010) B

S

–T–

D

K

C

16 PL

S

B

M

0.25 (0.010) A

S

T

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019

F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7

P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019

_ _ _ _

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Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer .

MC14076B/D

*MC14076B/D*

◊

Datasheet MC14076BD, MC14076BCP, MC14076BCL Datasheet (Motorola)

Specifications and Main Features

Frequently Asked Questions

User Manual