Datasheet MC14069UBFEL, MC14069UBFL1, MC14069UBFL2, MC14069UBFR1, MC14069UBD Datasheet (MOTOROLA)

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 3

1 Publication Order Number:

MC14069UB/D

MC14069UB

Hex Inverter

The MC14069UB hex inverter is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. These inverters find primary use where low power dissipation and/or high noise immunity is desired. Each of the six inverters is a single stage to minimize propagation delays.

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Capable of Driving Two Low–Power TTL Loads or One Low–Power

Schottky TTL Load Over the Rated Temperature Range

• Triple Diode Protection on All Inputs

• Pin–for–Pin Replacement for CD4069UB

• Meets JEDEC UB Specifications

MAXIMUM RATINGS (Voltages Referenced to V

SS

) (Note 2.)

Symbol

Parameter Value Unit

V

DD

DC Supply Voltage Range –0.5 to +18.0 V

Vin, V

out

Input or Output Voltage Range

(DC or Transient)

–0.5 to VDD + 0.5 V

Iin, I

out

Input or Output Current

(DC or Transient) per Pin

±10 mA

P

D

Power Dissipation,

per Package (Note 3.)

500 mW

T

A

Ambient Temperature Range –55 to +125 °C

T

stg

Storage Temperature Range –65 to +150 °C

T

L

Lead Temperature

(8–Second Soldering)

260 °C

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C T o 125_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

out

should be constrained

to the range V

SS

v (Vin or V

out

) v VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V

SS

or VDD). Unused outputs must be left open.

http://onsemi.com

A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week

Device Package Shipping

ORDERING INFORMATION

MC14069UBCP PDIP–14 2000/Box MC14069UBD SOIC–14

2750/Box MC14069UBDR2 SOIC–14 2500/Tape & Reel MC14069UBDT TSSOP–14

MC14069UBF SOEIAJ–14

96/Rail

See Note 1.

MARKING

DIAGRAMS

1

14

PDIP–14

P SUFFIX

CASE 646

MC14069UBCP

AWLYYWW

SOIC–14

D SUFFIX

CASE 751A

TSSOP–14 DT SUFFIX

CASE 948G

1

14

14069U

AWLYWW

14

069U

ALYW

1

14

SOEIAJ–14

F SUFFIX

CASE 965

1

14

MC14069U

AWLYWW

MC14069UBFEL SOEIAJ–14 See Note 1.

1. For ordering information on the EIAJ version of

the SOIC packages, please contact your local ON Semiconductor representative.

MC14069UBDTR2 TSSOP–14 2500/Tape & Reel

MC14069UBDTEL TSSOP–14 2000/Tape & Reel

MC14069UB

http://onsemi.com

2

PIN ASSIGNMENT

11

12

13

14

8

9

105

4

3

2

1

7

6

OUT 5

IN 5

OUT 6

IN 6

V

DD

OUT 4

IN 4

OUT 2

IN 2

OUT 1

IN 1

V

SS

OUT 3

IN 3

CIRCUIT SCHEMATIC

(1/6 OF CIRCUIT SHOWN)

LOGIC DIAGRAM

13

11

9

5

3

1

12

10

8

6

4

2

V

DD

= PIN 14

V

SS

= PIN 7

V

DD

V

SS

OUTPUTINPUT*

*Double diode protection on all

inputs not shown.

Figure 1. Switching Time Test Circuit and Waveforms

PULSE

GENERATOR

V

DD

VSS7

INPUT

OUTPUT

C

L

14

20 ns 20 ns

V

DD

V

SS

V

OH

V

OL

t

THL

t

TLH

OUTPUT

INPUT

t

PHL

t

PLH

90% 50% 10%

MC14069UB

http://onsemi.com

3

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

SS

)

Symbo

V

– 55_C

25_C

125_C

Characteristic

Symbo

l

V

DD

Vdc

Min

Max

Min

Typ

(4.)

Max

Min

Max

Unit

ООООООООО

Î

Output Voltage “0” Level

V

in

= V

DD

Î

V

OL

Î

5.0 10 15

Î

— — —

Î

0.05

ÎÎ

Î

— — —

Î

0 0 0

ÎÎ

Î

0.05

Î

— — —

Î

0.05

Î

Vdc

ООООООООО

Î

Vin = 0 “1” Level

Î

V

OH

Î

5.0 10 15

Î

4.95

9.95

14.95

Î

— — —

ÎÎ

Î

4.95

9.95

14.95

Î

5.0 10 15

ÎÎ

Î

— — —

Î

4.95

9.95

14.95

Î

— — —

Î

Vdc

ООООООООО

Î

ООООООООО

Î

Input Voltage “0” Level

(V

O

= 4.5 Vdc)

(V

O

= 9.0 Vdc)

(V

O

= 13.5 Vdc)

Î

V

IL

Î

5.0 10 15

Î

— — —

Î

1.0

2.0

2.5

ÎÎ

Î

ÎÎ

Î

— — —

Î

2.25

4.50

6.75

ÎÎ

Î

ÎÎ

Î

1.0

2.0

2.5

Î

— — —

Î

1.0

2.0

2.5

Î

Vdc

ООООООООО

Î

ООООООООО

Î

“1” Level

(V

O

= 0.5 Vdc)

(V

O

= 1.0 Vdc)

(V

O

= 1.5 Vdc)

Î

V

IH

Î

5.0 10 15

Î

4.0

8.0

12.5

Î

— — —

ÎÎ

Î

ÎÎ

Î

4.0

8.0

12.5

Î

2.75

5.50

8.25

ÎÎ

Î

ÎÎ

Î

— — —

Î

4.0

8.0

12.5

Î

— — —

Î

Vdc

ООООООООО

Î

ООООООООО

Î

ООООООООО

Î

Output Drive Current

(V

OH

= 2.5 Vdc) Source

(V

OH

= 4.6 Vdc)

(V

OH

= 9.5 Vdc)

(V

OH

= 13.5 Vdc)

Î

I

OH

Î

5.0

5.0 10 15

Î

– 3.0

– 0.64

– 1.6 – 4.2

Î

— — — —

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

– 2.4

– 0.51

– 1.3 – 3.4

Î

– 4.2 – 0.88 – 2.25

– 8.8

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

— — — —

Î

– 1.7

– 0.36

– 0.9 – 2.4

Î

— — — —

Î

mAdc

ООООООООО

Î

(VOL = 0.4 Vdc) Sink (V

OL

= 0.5 Vdc)

(V

OL

= 1.5 Vdc)

Î

I

OL

Î

5.0 10 15

Î

0.64

1.6

4.2

Î

— — —

ÎÎ

Î

0.51

1.3

3.4

Î

0.88

2.25

8.8

ÎÎ

Î

— — —

Î

0.36

0.9

2.4

Î

— — —

Î

mAdc

Input Current

I

in

15

—

± 0.1

—

±0.00001

± 0.1

—

± 1.0

µAdc

ООООООООО

Î

Input Capacitance

(V

in

= 0)

Î

C

in

Î

—

Î

—

Î

—

ÎÎ

Î

—

Î

5.0

ÎÎ

Î

7.5

Î

—

Î

—

Î

pF

ООООООООО

Î

Quiescent Current

(Per Package)

Î

I

DD

Î

5.0 10 15

Î

— — —

Î

0.25

0.5

1.0

ÎÎ

Î

— — —

Î

0.0005

0.0010

0.0015

ÎÎ

Î

0.25

0.5

1.0

Î

— — —

Î

7.5 15 30

Î

µAdc

ООООООООО

Î

ООООООООО

Î

Total Supply Current

(5.) (6.)

(Dynamic plus Quiescent, Per Gate) (C

L

= 50 pF)

Î

I

T

Î

5.0 10 15

ООООООООООООООО

Î

ООООООООООООООО

Î

IT = (0.3 µA/kHz) f + IDD/6 I

T

= (0.6 µA/kHz) f + IDD/6

I

T

= (0.9 µA/kHz) f + IDD/6

Î

µAdc

ООООООООО

Î

ООООООООО

Î

Output Rise and Fall Times

(5.)

(CL = 50 pF)

t

TLH

, t

THL

= (1.35 ns/pF) C

L

+ 33 ns

t

TLH

, t

THL

= (0.60 ns/pF) C

L

+ 20 ns

t

TLH

, t

THL

= (0.40 ns/pF) C

L

+ 20 ns

Î

t

TLH

,

t

THL

Î

5.0 10 15

Î

— — —

Î

— — —

ÎÎ

Î

ÎÎ

Î

— — —

Î

100

50 40

ÎÎ

Î

ÎÎ

Î

200 100

80

Î

— — —

Î

— — —

Î

ns

ООООООООО

Î

ООООООООО

Î

ООООООООО

Î

Propagation Delay Times

(5.)

(CL = 50 pF)

t

PLH

, t

PHL

= (0.90 ns/pF) CL + 20 ns

t

PLH

, t

PHL

= (0.36 ns/pF) CL + 22 ns

t

PLH

, t

PHL

= (0.26 ns/pF) CL + 17 ns

Î

t

PLH

,

t

PHL

Î

5.0 10 15

Î

— — —

Î

— — —

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

— — —

Î

65 40 30

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

125

75 55

Î

— — —

Î

— — —

Î

ns

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. The formulas given are for the typical characteristics only at 25_C.

6. To calculate total supply current at loads other than 50 pF: I

T(CL

) = IT(50 pF) + (CL – 50) Vfk

where: I

T

is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.

MC14069UB

http://onsemi.com

4

P ACKAGE DIMENSIONS

P SUFFIX

PLASTIC DIP PACKAGE

CASE 646–06

ISSUE M

17

14 8

B

A

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A 0.715 0.770 18.16 18.80 B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 F 0.040 0.070 1.02 1.78 G 0.100 BSC 2.54 BSC H 0.052 0.095 1.32 2.41 J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 L M ––– 10 ––– 10 N 0.015 0.039 0.38 1.01

__

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

F

HG

D

K

C

SEATING PLANE

N

–T–

14 PL

M

0.13 (0.005)

L

M

J

0.290 0.310 7.37 7.87

MC14069UB

http://onsemi.com

5

P ACKAGE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

–A–

–B–

G

P

7 PL

14 8

71

M

0.25 (0.010) B

M

S

B

M

0.25 (0.010) A

S

T

–T–

F

R

X 45

SEATING PLANE

D 14 PL

K

C

J

M

_

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 8.55 8.75 0.337 0.344 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019

F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7

P 5.80 6.20 0.228 0.244 R 0.25 0.50 0.010 0.019

____

MC14069UB

http://onsemi.com

6

P ACKAGE DIMENSIONS

DT SUFFIX

PLASTIC TSSOP PACKAGE

CASE 948G–01

ISSUE O

DIM MIN MAX MIN MAX

INCHESMILLIMETERS

A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C ––– 1.20 ––– 0.047 D 0.05 0.15 0.002 0.006

F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024

J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC M 0 8 0 8

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED

0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED

0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–.

____

S

U0.15 (0.006) T

2X L/2

S

U

M

0.10 (0.004) V

S

T

L

–U–

SEATING PLANE

0.10 (0.004)

–T–

SECTION N–N

DETAIL E

J

J1

K

K1

DETAIL E

F

M

–W–

0.25 (0.010)

8

14

7

1

PIN 1 IDENT.

H

G

A

D

C

B

S

U0.15 (0.006) T

–V–

14X REFK

N

MC14069UB

http://onsemi.com

7

P ACKAGE DIMENSIONS

F SUFFIX

PLASTIC EIAJ SOIC PACKAGE

CASE 965–01

ISSUE O

H

E

A

1

DIM MIN MAX MIN MAX

INCHES

––– 2.05 ––– 0.081

MILLIMETERS

0.05 0.20 0.002 0.008

0.35 0.50 0.014 0.020

0.18 0.27 0.007 0.011

9.90 10.50 0.390 0.413

5.10 5.45 0.201 0.215

1.27 BSC 0.050 BSC

7.40 8.20 0.291 0.323

0.50 0.85 0.020 0.033

1.10 1.50 0.043 0.059 0

0.70 0.90 0.028 0.035

––– 1.42 ––– 0.056

A

1

H

E

Q

1

L

E

_

10

_

0

_

10

_

L

E

Q

1

_

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).

0.13 (0.005)

M

0.10 (0.004)

D

Z

E

1

14 8

7

e

A

b

VIEW P

c

L DETAIL P

M

A

b c D E e

0.50

M

Z

MC14069UB

http://onsemi.com

8

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer .

PUBLICATION ORDERING INFORMATION

CENTRAL/SOUTH AMERICA:

Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)

Email: ONlit–spanish@hibbertco.com

ASIA/PACIFIC : LDC for ON Semiconductor – Asia Support

Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)

T oll Free from Hong Kong & Singapore:

001–800–4422–3781

Email: ONlit–asia@hibbertco.com

JAPAN: ON Semiconductor, Japan Customer Focus Center

4–32–1 Nishi–Gotanda, Shinagawa–ku, T okyo, Japan 141–8549

Phone: 81–3–5740–2745 Email: r14525@onsemi.com

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local Sales Representative.

MC14069UB/D

NORTH AMERICA Literature Fulfillment:

Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA

Phone: 303–675–2175 or 800–344–3860 T oll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com

Fax Response Line: 303–675–2167 or 800–344–3810 T oll Free USA/Canada

N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support

German Phone: (+1) 303–308–7140 (M–F 1:00pm to 5:00pm Munich Time)

Email: ONlit–german@hibbertco.com

French Phone: (+1) 303–308–7141 (M–F 1:00pm to 5:00pm Toulouse T ime)

Email: ONlit–french@hibbertco.com

English Phone: (+1) 303–308–7142 (M–F 12:00pm to 5:00pm UK Time)

Email: ONlit@hibbertco.com

EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781

*Available from Germany, France, Italy , England, Ireland

Datasheet MC14069UBFEL, MC14069UBFL1, MC14069UBFL2, MC14069UBFR1, MC14069UBD Datasheet (MOTOROLA)

Specifications and Main Features

Frequently Asked Questions

User Manual