Datasheet MC14060BDTR2, MC14060BF, MC14060BFEL, MC14060BFR2, MC14060BDR2 Datasheet (MOTOROLA)

...
Page 1
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1 Publication Order Number:
MC14060B/D
MC14060B
14-Bit Binary Counter and Oscillator
The MC14060B is a 14–stage binary ripple counter with an on–chip oscillator buffer. The oscillator configuration allows design of either RC or crystal oscillator circuits. Also included on the chip is a reset function which places all outputs into the zero state and disables the oscillator. A negative transition on Clock will advance the counter to the next state. Schmitt trigger action on the input line permits very slow input rise and fall times. Applications include time delay circuits, counter controls, and frequency dividing circuits.
Fully static operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 V to 18 V
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
Buffered Outputs Available from Stages 4 Through 10 and
12 Through 14
Common Reset Line
Pin–for–Pin Replacement for CD4060B
MAXIMUM RATINGS (Voltages Referenced to V
SS
) (Note 2.)
Symbol
Parameter Value Unit
V
DD
DC Supply Voltage Range –0.5 to +18.0 V
Vin, V
out
Input or Output Voltage Range
(DC or Transient)
–0.5 to VDD + 0.5 V
Iin, I
out
Input or Output Current
(DC or Transient) per Pin
±10 mA
P
D
Power Dissipation,
per Package (Note 3.)
500 mW
T
A
Ambient Temperature Range –55 to +125 °C
T
stg
Storage Temperature Range –65 to +150 °C
T
L
Lead Temperature
(8–Second Soldering)
260 °C
2. Maximum Ratings are those values beyond which damage to the device
may occur.
3. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C T o 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, V
in
and V
out
should be constrained
to the range V
SS
v (Vin or V
out
) v VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V
SS
or VDD). Unused outputs must be left open.
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A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week
Device Package Shipping
ORDERING INFORMATION
MC14060BCP PDIP–16 2000/Box MC14060BD SOIC–16 2400/Box MC14060BDR2 SOIC–16 2500/Tape & Reel
1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.
MARKING
DIAGRAMS
1
16
PDIP–16
P SUFFIX
CASE 648
MC14060BCP
AWLYYWW
SOIC–16
D SUFFIX
CASE 751B
1
16
14060B
AWLYWW
SOEIAJ–16
F SUFFIX
CASE 966
1
16
MC14060B
AWLYWW
MC14060BDT TSSOP–16 96/Rail MC14060BDTR2 TSSOP–16 2500/Tape & Reel MC14060BF SOEIAJ–16 See Note 1. MC14060BFEL SOEIAJ–16 See Note 1.
TSSOP–16 DT SUFFIX
CASE 948F
14
060B
ALYW
1
16
Page 2
MC14060B
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2
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
RESET
Q9
Q8
Q10
V
DD
OUT 2
OUT 1
CLOCK
Q6
Q13
Q12
V
SS
Q4
Q7
Q5
Q14
TRUTH TABLE
Clock Reset Output State
L No Change L Advance to next state
X H All Outputs are low
X = Don’t Care
LOGIC DIAGRAM
OUT 2 OUT 1
CLOCK
RESET
12
11
10
9
Q4 Q5 Q12 Q13 Q14
57123
CQ
R
CQ
CQ
R
CQ
CQ
R
CQ
CQ
R
CQ
CQ
R
CQ
CQ
R
CQ
Q6 = PIN 4 Q7 = PIN 6
Q8 = PIN 14 Q9 = PIN 13
Q10 = PIN 15 VDD = PIN 16
V
SS
= PIN 8
Page 3
MC14060B
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3
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
SS
)
V
DD
– 55_C
25_C
125_C
Characteristic
Symbol
DD
Vdc
Min
Max
Min
Typ
(4.)
Max
Min
Max
Unit
ОООООООО
Î
ОООООООО
Î
Output Voltage “0” Level
V
in
= VDD or 0
ÎÎ
Î
ÎÎ
Î
V
OL
Î
Î
Î
Î
5.0 10 15
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
0.05
0.05
0.05
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
0 0 0
Î
Î
Î
Î
0.05
0.05
0.05
Î
Î
Î
Î
— — —
Î
Î
Î
Î
0.05
0.05
0.05
Î
Î
Î
Î
V
ОООООООО
Î
Vin = 0 or V
DD
“1” Level
ÎÎ
Î
V
OH
Î
Î
5.0 10 15
Î
Î
4.95
9.95
14.95
ÎÎ
Î
— — —
Î
Î
4.95
9.95
14.95
ÎÎ
Î
5.0 10 15
Î
Î
— — —
Î
Î
4.95
9.95
14.95
Î
Î
— — —
Î
Î
V
ОООООООО
Î
ОООООООО
Î
Input Voltage “0” Level
(V
O
= 4.5 or 0.5 V)
(V
O
= 9.0 or 1.0 V)
(V
O
= 13.5 or 1.5 V)
ÎÎ
Î
ÎÎ
Î
V
IL
Î
Î
Î
Î
5.0 10 15
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
1.5
3.0
4.0
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
2.25
4.50
6.75
Î
Î
Î
Î
1.5
3.0
4.0
Î
Î
Î
Î
— — —
Î
Î
Î
Î
1.5
3.0
4.0
Î
Î
Î
Î
V
ОООООООО
Î
(VO = 0.5 or 4.5 V) “1” Level (V
O
= 1.0 or 9.0 V)
(V
O
= 1.5 or 13.5 V)
ÎÎ
Î
V
IH
Î
Î
5.0 10 15
Î
Î
3.5
7.0
11.0
ÎÎ
Î
— — —
Î
Î
3.5
7.0
11.0
ÎÎ
Î
2.75
5.50
8.25
Î
Î
— — —
Î
Î
3.5
7.0
11.0
Î
Î
— — —
Î
Î
V
ОООООООО
Î
ОООООООО
Î
Input Voltage “0” Level
(V
O
= 4.5 Vdc) (For Input 11
(V
O
= 9.0 Vdc) and Output 10)
(V
O
= 13.5 Vdc)
ÎÎ
Î
ÎÎ
Î
V
IL
Î
Î
Î
Î
5.0 10 15
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
1.0
2.0
2.5
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
2.25
4.50
6.75
Î
Î
Î
Î
1.0
2.0
2.5
Î
Î
Î
Î
— — —
Î
Î
Î
Î
1.0
2.0
2.5
Î
Î
Î
Î
Vdc
ОООООООО
Î
ОООООООО
Î
(VO = 0.5 Vdc) “1” Level (V
O
= 1.0 Vdc)
(V
O
= 1.5 Vdc)
ÎÎ
Î
ÎÎ
Î
V
IH
Î
Î
Î
Î
5.0 10 15
Î
Î
Î
Î
4.0
8.0
12.5
ÎÎ
Î
ÎÎ
Î
— — —
Î
Î
Î
Î
4.0
8.0
12.5
ÎÎ
Î
ÎÎ
Î
2.75
5.50
8.25
Î
Î
Î
Î
— — —
Î
Î
Î
Î
4.0
8.0
12.5
Î
Î
Î
Î
— — —
Î
Î
Î
Î
Vdc
ОООООООО
Î
ОООООООО
Î
Output Drive Current
(V
OH
= 2.5 V) (Except Source
(V
OH
= 4.6 V) Pins 9 and 10)
(V
OH
= 9.5 V)
(V
OH
= 13.5 V)
ÎÎ
Î
ÎÎ
Î
I
OH
Î
Î
Î
Î
5.0
5.0 10 15
Î
Î
Î
Î
– 3.0
– 0.64
– 1.6 – 4.2
ÎÎ
Î
ÎÎ
Î
— — — —
Î
Î
Î
Î
– 2.4
– 0.51
– 1.3 – 3.4
ÎÎ
Î
ÎÎ
Î
– 4.2 – 0.88 – 2.25
– 8.8
Î
Î
Î
Î
— — — —
Î
Î
Î
Î
– 1.7
– 0.36
– 0.9 – 2.4
Î
Î
Î
Î
— — — —
Î
Î
Î
Î
mA
ОООООООО
Î
ОООООООО
Î
(VOL = 0.4 V) Sink (V
OL
= 0.5 V)
(V
OL
= 1.5 V)
ÎÎ
Î
ÎÎ
Î
I
OL
Î
Î
Î
Î
5.0 10 15
Î
Î
Î
Î
0.64
1.6
4.2
ÎÎ
Î
ÎÎ
Î
— — —
Î
Î
Î
Î
0.51
1.3
3.4
ÎÎ
Î
ÎÎ
Î
0.88
2.25
8.8
Î
Î
Î
Î
— — —
Î
Î
Î
Î
0.36
0.9
2.4
Î
Î
Î
Î
— — —
Î
Î
Î
Î
mA
Input Current
I
in
15
± 0.1
±0.00001
± 0.1
± 1.0
µA
Input Capacitance (Vin = 0)
C
in
5.0
7.5
pF
ОООООООО
Î
ОООООООО
Î
Quiescent Current
(Per Package)
ÎÎ
Î
ÎÎ
Î
I
DD
Î
Î
Î
Î
5.0 10 15
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
5.0 10 20
Î
Î
Î
Î
— — —
ÎÎ
Î
ÎÎ
Î
0.005
0.010
0.015
Î
Î
Î
Î
5.0 10 20
Î
Î
Î
Î
— — —
Î
Î
Î
Î
150 300 600
Î
Î
Î
Î
µA
ОООООООО
Î
ОООООООО
Î
Total Supply Current
(5.) (6.)
(Dynamic plus Quiescent, Per Package) (C
L
= 50 pF on all outputs,
all buffers switching)
ÎÎ
Î
ÎÎ
Î
I
T
Î
Î
Î
Î
5.0 10 15
ООООООООООООООО
Î
ООООООООООООООО
Î
IT = (0.25 µA/kHz) f + I
DD
IT = (0.54 µA/kHz) f + I
DD
IT = (0.85 µA/kHz) f + I
DD
Î
Î
Î
Î
µA
4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
5. The formulas given are for the typical characteristics only at 25_C.
6. To calculate total supply current at loads other than 50 pF: I
T(CL
) = IT(50 pF) + (CL – 50) Vfk
where: I
T
is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.002.
Page 4
MC14060B
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4
SWITCHING CHARACTERISTICS (C
L
= 50 pF, T
A
= 25_C)
ООООООООООООО
Î
Characteristic
ÎÎÎ
Î
Symbol
ÎÎ
Î
V
DD
Vdc
ÎÎ
Î
Min
ÎÎ
Î
Typ
(7.)
ÎÎ
Î
Max
Î
Î
Unit
ООООООООООООО
Î
Output Rise Time (Counter Outputs)
ÎÎÎ
Î
t
TLH
ÎÎ
Î
5.0 10 15
ÎÎ
Î
— — —
ÎÎ
Î
40 25 20
ÎÎ
Î
200 100
80
Î
Î
ns
ООООООООООООО
Î
Output Fall Time (Counter Outputs)
ÎÎÎ
Î
t
THL
ÎÎ
Î
5.0 10 15
ÎÎ
Î
— — —
ÎÎ
Î
50 30 20
ÎÎ
Î
200 100
80
Î
Î
ns
ООООООООООООО
Î
Propagation Delay Time
Clock to Q4
ÎÎÎ
Î
t
PLH
t
PHL
ÎÎ
Î
5.0 10 15
ÎÎ
Î
— — —
ÎÎ
Î
415 175 125
ÎÎ
Î
740 300 200
Î
Î
ns
ООООООООООООО
Î
ООООООООООООО
Î
Clock to Q14
ÎÎÎ
Î
ÎÎÎ
Î
ÎÎ
Î
ÎÎ
Î
5.0 10 15
ÎÎ
Î
ÎÎ
Î
— — —
ÎÎ
Î
ÎÎ
Î
1.5
0.7
0.4
ÎÎ
Î
ÎÎ
Î
2.7
1.3
1.0
Î
Î
Î
Î
µs
ООООООООООООО
Î
Clock Pulse Width
ÎÎÎ
Î
t
wH
ÎÎ
Î
5.0 10 15
ÎÎ
Î
100
40 30
ÎÎ
Î
65 30 20
ÎÎ
Î
— — —
Î
Î
ns
ООООООООООООО
Î
Clock Pulse Frequency
ÎÎÎ
Î
f
φ
ÎÎ
Î
5.0 10 15
ÎÎ
Î
— — —
ÎÎ
Î
5 14 17
ÎÎ
Î
3.5 8
12
Î
Î
MHz
ООООООООООООО
Î
ООООООООООООО
Î
Clock Rise and Fall Time
ÎÎÎ
Î
ÎÎÎ
Î
t
TLH
t
THL
ÎÎ
Î
ÎÎ
Î
5.0 10 15
ОООООООО
Î
ОООООООО
Î
No Limit
Î
Î
Î
Î
ns
ООООООООООООО
Î
Reset Pulse Width
ÎÎÎ
Î
t
w
ÎÎ
Î
5.0 10 15
ÎÎ
Î
120
60 40
ÎÎ
Î
40 15 10
ÎÎ
Î
— —
Î
Î
ns
ООООООООООООО
Î
Propagation Delay Time Reset to On
ÎÎÎ
Î
t
PHL
ÎÎ
Î
5.0 10 15
ÎÎ
Î
— — —
ÎÎ
Î
170
80 60
ÎÎ
Î
350 160 100
Î
Î
ns
7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
Figure 1. Power Dissipation Test Circuit
and Waveform
Figure 2. Switching Time Test Circuit
and Waveforms
PULSE
GENERATOR
I
D
V
DD
500 µF 0.01 µF
CLOCK
NC NC
Q4 Q5
Qn
R
OUT1 OUT2
V
SS
C
L
C
L
C
L
20 ns 20 ns
CLOCK
90% 50% 10%
50% DUTY CYCLE
V
DD
V
SS
PULSE
GENERATOR
V
DD
CLOCK
NC NC
Q4 Q5 Qn
R
OUT1 OUT2
V
SS
C
L
C
L
C
L
20 ns20 ns
CLOCK
Q
t
TLH
t
THL
t
PLH
t
PHL
t
WH
90%
50%
10%
90% 50% 10%
Page 5
MC14060B
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5
Figure 3. Oscillator Circuit Using RC Configuration
CLOCK 11
RESET
R
S
C
tc
R
tc
10 OUT 1 9 OUT 2
f
[
1
2.3RtcC
tc
if 1 kHz f 100 kHz and 2R
tc
< RS < 10R
tc
(f in Hz, R in ohms, C in farads) The formula may vary for other frequencies. Recommended
maximum value for the resistors in 1 MΩ.
TYPICAL RC OSCILLATOR CHARACTERISTICS
Figure 4. RC Oscillator Stability Figure 5. RC Oscillator Frequency as a
Function of R
TC
and C
–8.0
–12
–16
–4.0
0
4.0
8.0
1251007550250–25–55
T
A
, AMBIENT TEMPERATURE (°C)
FREQUENCY DEVIA TION (%)
VDD = 15 V
1.0 V
5.0 V
RTC = 56 k C = 1000 pF
RS= 0, f =10.15kHz @ VDD= 10, TA=25°C R
S
= 120 k, f=7.8kHz @ VDD= 10 V, TA=25°C
f, OSCILLATOR FREQUENCY (kHz)
100
50 20
10
5 2
1
0.5
0.2
0.1
1.0 k 10 k 100 k 1.0 M R
TC
, RESISTANCE (OHMS)
0.0001 0.001 0.01 0.1 C, CAPACITANCE (µF)
VDD = 10 V
f AS A FUNCTION
OF R
TC
(C = 1000 pF)
(R
S
2RTC)
f AS A FUNCTION
OF C
(R
TC
= 56 kΩ)
(R
S
= 120 k)
Figure 6. Typical Crystal Oscillator Circuit
CLOCK
11
RESET
9 OUT 210 OUT 1
18M
R
O
C
S
C
T
ОООООООО
Î
Characteristic
Î
Î
500 kHz
Circuit
Î
Î
32 kHz Circuit
Î
Î
Unit
ОООООООО
Î
ОООООООО
Î
Crystal Characteristics
Resonant Frequency Equivalent Resistance, R
S
Î
Î
Î
Î
500
1.0
Î
Î
Î
Î
32
6.2
Î
Î
Î
Î
kHz
k
ОООООООО
Î
ОООООООО
Î
External Resistor/Capacitor Values
R
O
C
T
C
S
Î
Î
Î
Î
47 82 20
Î
Î
Î
Î
750
82 20
Î
Î
Î
Î
k
pF pF
ОООООООО
Î
ОООООООО
Î
ОООООООО
Î
ОООООООО
Î
ОООООООО
Î
ОООООООО
Î
ОООООООО
Î
Frequency Stability
Frequency Changes as a Function of VDD (TA = 25_C)
V
DD
Change from 5.0 V to 10V
V
DD
Change from 10 V to 15 V Frequency Change as a Function of Temperature (V
DD
= 10 V)
T
A
Change from – 55_C to
+25_C Complete Oscillator
(8.)
TA Change from + 25_C to
+125_C Complete Oscillator
(8.)
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
+ 6.0 + 2.0
+ 100
– 160
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
+ 2.0 + 2.0
+ 120
– 560
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
Î
ppm ppm
ppm
ppm
8. Complete oscillator includes crystal, capacitors, and resistors.
Figure 7. Typical Data for Crystal Oscillator Circuit
Page 6
MC14060B
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6
P ACKAGE DIMENSIONS
PDIP–16
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
B
F
C
S
H
G
D
J
L
M
16 PL
SEATING
18
916
K
PLANE
–T–
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01
____
SOIC–16
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
R
X 45
_
G
8 PLP
–B–
–A–
M
0.25 (0.010) B
S
–T–
D
K
C
16 PL
S
B
M
0.25 (0.010) A
S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019 F 0.40 1.25 0.016 0.049 G 1.27 BSC 0.050 BSC J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7 P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019
____
Page 7
MC14060B
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7
P ACKAGE DIMENSIONS
TSSOP–16
DT SUFFIX
PLASTIC TSSOP PACKAGE
CASE 948F–01
ISSUE O
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C ––– 1.20 ––– 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.18 0.28 0.007 0.011 J 0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC 0.252 BSC M 0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED
0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE –W–.
____
SECTION N–N
SEATING PLANE
IDENT.
PIN 1
1
8
16
9
DETAIL E
J
J1
B
C
D
A
K
K1
H
G
DETAIL E
F
M
L
2X L/2
–U–
S
U0.15 (0.006) T
S
U0.15 (0.006) T
S
U
M
0.10 (0.004) V
S
T
0.10 (0.004)
–T–
–V–
–W–
0.25 (0.010)
16X REFK
N
N
Page 8
MC14060B
http://onsemi.com
8
P ACKAGE DIMENSIONS
H
E
A
1
DIM MIN MAX MIN MAX
INCHES
––– 2.05 ––– 0.081
MILLIMETERS
0.05 0.20 0.002 0.008
0.35 0.50 0.014 0.020
0.18 0.27 0.007 0.011
9.90 10.50 0.390 0.413
5.10 5.45 0.201 0.215
1.27 BSC 0.050 BSC
7.40 8.20 0.291 0.323
0.50 0.85 0.020 0.033
1.10 1.50 0.043 0.059 0
0.70 0.90 0.028 0.035
––– 0.78 ––– 0.031
A
1
H
E
Q
1
L
E
_
10
_
0
_
10
_
L
E
Q
1
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.
4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.
5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).
M
L
DETAIL P
VIEW P
c
A
b
e
M
0.13 (0.005)
0.10 (0.004)
1
16 9
8
D
Z
E
A
b c D E e
L
M
Z
SOEIAJ–16
F SUFFIX
PLASTIC EIAJ SOIC PACKAGE
CASE 966–01
ISSUE O
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