Datasheet MC14016BDR2, MC14016BF, MC14016BFEL, MC14016BCP, MC14016BD Datasheet (MOTOROLA)

MC14016B

Quad Analog Switch/ Quad Multiplexer

The MC14016B quad bilateral switch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each MC14016B consists of four independent switches capable of controlling either digital or analog signals. The quad bilateral switch is used in signal gating, chopper, modulator, demodulator and CMOS logic implementation.

• Diode Protection on All Inputs

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Linearized Transfer Characteristics

• Low Noise — 12 nV/√Cycle, f ≥ 1.0 kHz typical

• Pin–for–Pin Replacements for CD4016B, CD4066B (Note improved

transfer characteristic design causes more parasitic coupling capacitance than CD4016)

• For Lower R

The MC14066B

• This Device Has Inputs and Outputs Which Do Not Have ESD

Protection. Antistatic Precautions Must Be T aken.

MAXIMUM RATINGS (Voltages Referenced to V

Symbol Parameter Value Unit

V

DD

Vin, V

out

I

in

I

SW

P

D

T

A

T

stg

T

L

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V to the range V

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V

or VDD). Unused outputs must be left open.

SS

, Use The HC4016 High–Speed CMOS Device or

ON

) (Note 2.)

SS

DC Supply Voltage Range –0.5 to +18.0 V Input or Output Voltage Range

(DC or Transient)

Input Current (DC or Transient)

per Control Pin Switch Through Current ±25 mA Power Dissipation,

per Package (Note 3.) Ambient Temperature Range –55 to +125 °C Storage Temperature Range –65 to +150 °C Lead Temperature

(8–Second Soldering)

v (Vin or V

SS

) v VDD.

out

–0.5 to VDD + 0.5 V

±10 mA

500 mW

260 °C

should be constrained

out

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MARKING

DIAGRAMS

14

PDIP–14

P SUFFIX

CASE 646

SOIC–14

D SUFFIX

CASE 751A

SOEIAJ–14

F SUFFIX

CASE 965

A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week

MC14016BCP

AWLYYWW

1

14

14016B

AWLYWW

1

14

MC14016B

AWLYWW

1

ORDERING INFORMATION

Device Package Shipping

MC14016BCP PDIP–14 2000/Box MC14016BD SOIC–14 MC14016BDR2 SOIC–14 2500/Tape & Reel MC14016BF SOEIAJ–14 MC14016BFEL SOEIAJ–14 See Note 1.

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

55/Rail

See Note 1.

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev . 3

1 Publication Order Number:

MC14016B/D

MC14016B

PIN ASSIGNMENT

IN 1 OUT 1 OUT 2

IN 2

CONTROL 2 CONTROL 3

V

SS

BLOCK DIAGRAM

CONTROL 1

IN 1

CONTROL 2

IN 2

CONTROL 3

IN 3

CONTROL 4

IN 4

1 2 3 4

6 7

14 13 12 11 105

9 8

V

DD

CONTROL 1 CONTROL 4 IN 4 OUT 4 OUT 3

IN 3

13

2

1

OUT 1

5

3

4

OUT 2

6

9

8

OUT 3

12

10

11

OUT 4

V

= PIN 14

DD

V

= PIN 7

SS

Control Switch

0 = V

SS

1 = V

DD

LOGIC DIAGRAM

(1/4 OF DEVICE SHOWN)

CONTROL

LOGIC DIAGRAM RESTRICTIONS

V

≤ Vin ≤ V

SS

VSS ≤ V

DD

≤ V

out

DD

Off On

OUT

IN

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2

MC14016B

ÎÎÎÎ

V

DD

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ÎÎ

Î

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

Characteristic

Input Voltage

Control Input

ООООООООО

ОООООООООÎÎÎÎÎ

Input Current Control Input Capacitance

ООООООООО

Control Switch Input

ООООООООО

Switch Output

ООООООООО

Feed Through

Quiescent Current

(Per Package)

ООООООООО

“ON” Resistance

ООООООООО

(V

= VDD, RL = 10 kΩ)

C

= + 5.0 Vdc)

(V

in

ООООООООО

(V

= – 5.0 Vdc) VSS = – 5.0 Vdc

in

ООООООООО

(V

= ± 0.25 Vdc)

in

(5.)

(Vin = + 7.5 Vdc) (V

= – 7.5 Vdc) VSS = – 7.5 Vdc

in

ООООООООО

= ± 0.25 Vdc)

(V

in

(Vin = + 10 Vdc) (V

= + 0.25 Vdc) VSS = 0 Vdc

ООООООООО

in

= + 5.6 Vdc)

(V

in

(Vin = + 15 Vdc)

ООООООООО

(V

= + 0.25 Vdc) VSS = 0 Vdc

in

= + 9.3 Vdc)

(V

in

ООООООООО

∆ “ON” Resistance

Figure

Î

ÎÎÎÎÎÎ

Î

1

— —

2,3

4,5,6

—

Symbol

V

IL

ÎÎ

V

IH

I

in

C

in

ÎÎ

I

DD

ÎÎ

R

ON

ÎÎ

∆R

ON

V Vdc

5.0 10

Î

15

5.0 10

Î

15 15

Î

— —

Î

—

Î

—

5.0 10

Î

15

Î

5.0

7.5

10

Î

15

Î

SS

)

Min

— — —

—

— — — —

— — —

– 55_C

Î

±0.1

Î

0.25

Î

Max

— — —

— — — —

0.5

1.0

600 600 600

360 360 360

600 600 600

360 360 360

Min

— —

Î

—

3.0

8.0

Î

13

—

Î

— —

Î

—

Î

— —

—

Î

— —

Î

— —

Î

—

Î

— —

—

Î

— —

—

Î

— —

Î

— —

Î

25_C

(4.)

Typ

1.5

ÎÎ

1.5

2.0

6.0

ÎÎ

11

±0.00001

ÎÎ

5.0

ÎÎ

5.0

ÎÎ

0.2

0.0005

0.0010

ÎÎ

0.0015

ÎÎ

300

ÎÎ

300

ÎÎ

280 240

240

ÎÎ

180 260

310

ÎÎ

310 260

ÎÎ

260 300

ÎÎ

Max

0.9

Î

0.9 —

—

Î

—

±0.1

Î

— —

Î

—

Î

—

0.25

0.5

Î

1.0

Î

660

Î

660

Î

660 400

400

Î

400 660

660

Î

660 400

Î

400 400

Î

Min

— — —

—

— — — —

— — —

— — — — —

— — —

125_C

Î

Between any 2 circuits in a common

ООООООООО

package (V

= VDD)

C

ООООООООО

(V

= ± 5.0 Vdc, VSS = – 5.0 Vdc)

in

ООООООООО

(V

= ± 7.5 Vdc, VSS = – 7.5 Vdc)

in

Input/Output Leakage Current

(V

= VSS)

C

ООООООООО

= + 7.5, V

(V

in

(V

= – 7.5, V

ООООООООО

in

= – 7.5 Vdc)

out

= + 7.5 Vdc)

out

Î

—

Î

ÎÎ

—

ÎÎ

5.0

7.5

Î

—

Î

—

Î

— —

Î

— —

±0.1 ±0.1

Î

—

Î

—

Î

— —

Î

ÎÎ

15

ÎÎ

10

ÎÎ

±0.0015 ±0.0015

ÎÎ

Î

—

Î

—

Î

±0.1

± 0.1——

Î

—

Î

—

Î

NOTE: All unused inputs must be returned to VDD or VSS as appropriate for the circuit application.

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

5. For voltage drops across the switch (∆V current out of the switch may contain both V Maximum Ratings are exceeded. (See first page of this data sheet.) Reference Figure 14.

) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn; i.e., the

switch

and switch input components. The reliability of the device will be unaffected unless the

DD

Max

— — —

± 1.0

— — — —

7.5 15 30

840 840 840

520 520 520

840 840 840

520 520 520

— —

± 1.0 ± 1.0

Unit

Vdc

Î

Vdc

Î

µAdc

pF

Î

µAdc

Î

Ohms

Î

Ohms

Î

µAdc

Î

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3

MC14016B

Î

–50dB)

(6.)

(C

= 50 pF, TA = 25_C)

L

Figure

10,11

12,13

Symbol

Î

—

Î

7

Î

8

Î

9

Î

t

PLH

t

PHZ

t

PLZ

t

PZH

t

PHL

PZL

—

,

ÎÎ

—

Î

ÎÎ

—

Î

ÎÎÎÎÎÎ

—

Î

12

Î

—

Î

—

Î

ÎÎ

BW

Î

—

Î

—

Î

ÎÎ

V

DD

Vdc

5.0 10 15

5.0

5.0 10 15

5.0

Min

Î

— — —

Î

—

Î

— —

Î

— —

Î

— —

Î

— —

Î

— —

—

Î

— —

Î

—

Î

—

Î

— —

Î

— —

Î

—

Î

—

Î

— —

Î

—

Î

—

(7.)

Typ

ÎÎ

15

7.0

6.0

ÎÎ

34

ÎÎ

20 15

ÎÎ

30 50

ÎÎ

100

– 80

ÎÎ

24 25

ÎÎ

30 12

12

ÎÎ

15

0.16

ÎÎ

2.3

ÎÎ

0.2

ÎÎ

0.1

0.05

ÎÎ

54 40

ÎÎ

38

ÎÎ

37

ÎÎ

1250

140

ÎÎ

18

ÎÎ

2.0

Max

Î

45 15 12

Î

90

Î

45 35

Î

— —

Î

— —

Î

— —

Î

— —

—

Î

— —

Î

—

Î

—

Î

— —

Î

— —

Î

—

Î

—

Î

— —

Î

—

Î

—

ELECTRICAL CHARACTERISTICS

ОООООООООООООО

Propagation Delay Time (VSS = 0 Vdc)

V

to V

in

out

(VC = VDD, RL = 10 kΩ)

ОООООООООООООО

Control to Output

(V

v 10 Vdc, RL = 10 kΩ)

in

ОООООООООООООО

Crosstalk, Control to Output (VSS = 0 Vdc)

(V

= VDD, Rin = 10 kΩ, R

C

ОООООООООООООО

f = 1.0 kHz)

Crosstalk between any two switches (VSS = 0 Vdc)

(R

= 1.0 kΩ, f = 1.0 MHz,

L

ОООООООООООООО

crosstalk+20log

ОООООООООООООО

Noise Voltage (VSS = 0 Vdc)

(V

= VDD, f = 100 Hz)

C

ОООООООООООООО

(VC = VDD, f = 100 kHz)

ОООООООООООООО

Second Harmonic Distortion (VSS = – 5.0 Vdc)

ОООООООООООООО

(V

= 1.77 Vdc, RMS Centered @ 0.0 Vdc,

in

= 10 kΩ, f = 1.0 kHz)

R

L

ОООООООООООООО

Insertion Loss (VC = VDD, Vin = 1.77 Vdc,

V

= – 5.0 Vdc, RMS centered = 0.0 Vdc, f = 1.0 MHz)

SS

ОООООООООООООО

I

+

20log

loss

ОООООООООООООО

(RL = 1.0 kΩ)

ОООООООООООООО

(R

= 10 kΩ)

L

= 100 kΩ)

(R

L

ОООООООООООООО

(R

= 1.0 MΩ)

L

Bandwidth (– 3.0 dB)

(V

= VDD, Vin = 1.77 Vdc, VSS = – 5.0 Vdc,

ОООООООООООООО

C

RMS centered @ 0.0 Vdc)

ОООООООООООООО

= 1.0 kΩ)

(R

L

(R

= 10 kΩ)

ОООООООООООООО

L

(R

= 100 kΩ)

L

ОООООООООООООО

(R

= 1.0 MΩ)

L

OFF Channel Feedthrough Attenuation

(V

= – 5.0 Vdc)

SS

ОООООООООООООО

(V

= VSS, 20 log

C

ОООООООООООООО

(RL = 1.0 kΩ)

ОООООООООООООО

(R

= 10 kΩ)

L

= 100 kΩ)

(R

L

ОООООООООООООО

(R

= 1.0 MΩ)

L

Characteristic

V

10

V

out

)

10

V

in

V

10

V

out1 out2

out

in

= 10 kΩ,

out

)

+

6. The formulas given are for typical characteristics only at 25_C.

7. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

Unit

ÎÎ

ns

ÎÎ

ns

ÎÎ

mV

ÎÎ

dB

ÎÎ

nV/√Cycle

ÎÎ

%

ÎÎ

dB

ÎÎ

MHz

ÎÎ

kHz

ÎÎ

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4

MC14016B

00

V

C

I

S

VIL: VC is raised from VSS until VC = VIL.

: at VC = VIL: IS = ±10 µA with Vin = VSS, V

V

IL

: When VC = VIH to VDD, the switch is ON and the RON specifications are met.

V

IH

V

DD

I

D

V

PULSE

GENERATOR

P

= VDD x I

D

TO ALL 4 CIRCUITS

f

c

D

DD

V

SS

out

CONTROL

INPUT

V

in

Figure 2. Quiescent Power Dissipation

T est Circuit

V

in

V

out

= VDD or Vin = VDD, V

out

Figure 1. Input Voltage Test Circuit

10,000

= 25°C

T

µW)

1000

A

100

10 k

, POWER DISSIPATION (P

10

D

1.0

Figure 3. T ypical Power Dissipation per Circuit

= VSS.

out

VDD = 15 Vdc

, FREQUENCY (Hz)

f

c

(1/4 of device shown)

10 Vdc

5.0 Vdc

50 M10 M1.0 M100 k10 k5.0 k

TYPICAL RON versus INPUT VOLTAGE

7

RL = 10 kΩ T

600

= 25°C

A

500

400

VC = VDD = 5.0 Vdc V

= –5.0 Vdc

SS

300

200

, “ON” RESISTANCE (OHMS)R ON

100

0 –10 –8.0 –4.0 0 4.0 8.0 10

V

, INPUT VOLTAGE (Vdc)

in

VC = VDD = 7.5 Vdc V

= –7.5 Vdc

SS

Figure 4. VSS = – 5.0 V and – 7.5 V Figure 5. VSS = 0 V

7

VSS = 0 Vdc

600

R

L

T

A

500

400

VC = VDD = 10 Vdc

300

200

, “ON” RESISTANCE (OHMS)R

VC = VDD = 15 Vdc

ON

100

0

0 2.0 6.0 10 14 18 20

V

, INPUT VOLTAGE (Vdc)

in

= 10 kΩ = 25°C

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5

MC14016B

V

out

RLC

L

V

in

V

out

R

V

C

V

in

L

20 ns 20 ns

t

PHL

90%

50%

V

in

t

PLH

V

out

10%

50%

V

DD

V

SS

Figure 6. RON Characteristics

T est Circuit

V

out

V

C

V

in

20 ns

t

PZH

t

PZL

50%

V

C

V

out

V

out

10%

90%

10%

90%

10%

t

V

PHZ

t

PLZ

R

C

L

X

V

DD

V

SS

Vin = V Vx = V

Figure 8. T urn–On Delay Time Test Circuit

and Waveforms

Figure 7. Propagation Delay T est Circuit

and Waveforms

V

out

V

C

DD

SS

V

in

10 k 15 pF

1 k

SS

DD

Figure 9. Crosstalk T est Circuit

35 30

VDD = 15 Vdc

25

10 Vdc

5.0 Vdc

VC = V

20

15

OUT

DD

IN

QUAN–TECH

MODEL

2283

OR EQUIV

10

NOISE VOLTAGE (nV/ CYCLE)

5.0 0

f, FREQUENCY (Hz)

Figure 10. Noise V oltage Test Circuit Figure 11. Typical Noise Characteristics

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6

100 k10 k1.0k10010

2

.0

0 –2.0 –4.0

–6.0

–8.0

TYPICAL INSERTION LOSS (dB)

–10 –12

Figure 12. T ypical Insertion Loss/Bandwidth

RL = 1 MΩ AND 100 kΩ

10 kΩ

1.0 kΩ

f

, INPUT FREQUENCY (Hz)

in

Characteristics

–3.0 dB (RL = 1.0 MΩ )

–3.0 dB (RL = 10 kΩ )

–3.0 dB (RL = 1.0 kΩ )

CONTROL

SECTION

OF IC

MC14016B

100 M10 M1.0 M100 k10 k

V

C

+ 2.5 Vdc

V

in

0.0 Vdc – 2.5 Vdc

Figure 13. Frequency Response T est Circuit

ON SWITCH

out

R

L

LOAD

V

SOURCE

Figure 14. ∆V Across Switch

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7

MC14016B

APPLICATIONS INFORMATION

Figure A illustrates use of the Analog Switch. The 0–to–5

V Digital Control signal is used to directly control a 5 V

p–p

analog signal.

The digital control logic levels are determined by V

and VSS. The VDD voltage is the logic high voltage; the V

DD

SS

voltage is logic low . For the example, VDD = +5 V logic high at the control inputs; VSS = GND = 0 V logic low.

The maximum analog signal level is determined by V

DD

and VSS. The analog voltage must not swing higher than VDD or lower than VSS.

+5 V

V

SS

SWITCH

+5 V

EXTERNAL

CMOS

DIGITAL

CIRCUITRY

5 V

p–p

ANALOG SIGNAL

0–TO–5 V DIGITAL

CONTROL SIGNALS

SWITCH

IN

V

DD

MC14016B

OUT

The example shows a 5 V

margin at either peak. If voltage transients above V

signal which allows no

p–p

DD

and/or below VSS are anticipated on the analog channels, external diodes (Dx) are recommended as shown in Figure B. These diodes should be small signal types able to absorb the maximum anticipated current surges during clipping.

The absolute maximum potential difference between

V

and VSS is 18.0 V. Most parameters are specified up to

DD

15 V which is the recommended maximum difference between VDD and VSS.

+5.0 V

5 V

p–p

ANALOG SIGNAL

+2.5 V

GND

Figure A. Application Example

V

DD

D

x

SWITCH

IN

D

x

V

SS

SWITCH

OUT

V

DD

D

V

SS

Figure B. External Germanium or Schottky Clipping Diodes

x

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8

MC14016B

P ACKAGE DIMENSIONS

P SUFFIX

PLASTIC DIP PACKAGE

CASE 646–06

ISSUE M

14 8

B

17

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

–T–

SEATING PLANE

N

HG

A

F

L

C

D

14 PL

0.13 (0.005)

K

J

M

DIM MIN MAX MIN MAX

A 0.715 0.770 18.16 18.80 B 0.240 0.260 6.10 6.60 C 0.145 0.185 3.69 4.69 D 0.015 0.021 0.38 0.53 F 0.040 0.070 1.02 1.78 G 0.100 BSC 2.54 BSC H 0.052 0.095 1.32 2.41 J 0.008 0.015 0.20 0.38 K 0.115 0.135 2.92 3.43 L

0.290 0.310 7.37 7.87

M ––– 10 ––– 10 N 0.015 0.039 0.38 1.01

MILLIMETERSINCHES

__

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9

–T–

SEATING PLANE

–A–

14 8

G

D 14 PL

0.25 (0.010) A

MC14016B

P ACKAGE DIMENSIONS

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751A–03

ISSUE F

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)

–B–

P

7 PL

M

71

0.25 (0.010) B

C

X 45

R

K

M

S

B

T

S

M

_

M

F

J

PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

DIM MIN MAX MIN MAX

A 8.55 8.75 0.337 0.344 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019

F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7

____

P 5.80 6.20 0.228 0.244 R 0.25 0.50 0.010 0.019

INCHESMILLIMETERS

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10

14 8

1

Z

D

e

b

0.13 (0.005)

M

E

7

A

0.10 (0.004)

H

A

1

MC14016B

P ACKAGE DIMENSIONS

F SUFFIX

PLASTIC EIAJ SOIC PACKAGE

CASE 965–01

ISSUE O

L

E

VIEW P

_

M

L DETAIL P

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE

Q

1

c

MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE.

4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.

5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018).

MILLIMETERS

DIM MIN MAX MIN MAX

––– 2.05 ––– 0.081

A

0.05 0.20 0.002 0.008

1

0.35 0.50 0.014 0.020

b

0.18 0.27 0.007 0.011

c

9.90 10.50 0.390 0.413

D

5.10 5.45 0.201 0.215

E

1.27 BSC 0.050 BSC

e

H

7.40 8.20 0.291 0.323

E

0.50 0.85 0.020 0.033

0.50 L

1.10 1.50 0.043 0.059

E

0

M

_

Q

0.70 0.90 0.028 0.035

1

––– 1.42 ––– 0.056

Z

INCHES

10

_

10

0

_

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11

MC14016B

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability , including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer .

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MC14016B/D

Datasheet MC14016BDR2, MC14016BF, MC14016BFEL, MC14016BCP, MC14016BD Datasheet (MOTOROLA)

Specifications and Main Features

Frequently Asked Questions

User Manual