Page 1
Order this document by MC12034A/D
SEMICONDUCTOR
TECHNICAL DATA
MECL PLL COMPONENTS
÷32/33, ÷64/65
DUAL MODULUS PRESCALER
P SUFFIX
PLASTIC PACKAGE
CASE 626
PIN CONNECTIONS
D SUFFIX
PLASTIC PACKAGE
CASE 751
(SO–8)
8
1
1
8
IN
(Top View)
8
IN
V
CC
SW
OUT
NC
MC
Gnd
7
6
5
1
2
3
4
Device
Operating
Temp Range
Package
ORDERING INFORMATION
MC12034AD
MC12034AP
TA = –40° to +85°C
SO–8
Plastic
MC12034BD
MC120348BP
SO–8
Plastic
The MC12034A can be used with CMOS synthesizers requiring positive
edges to trigger internal counters such as Motorola’s MC145xxx series in a
PLL to provide tuning signals up to 2.0 GHz in programmable frequency
steps.
The MC12034B can be used with CMOS synthesizers requiring negative
edges to trigger internal counters such as Fujitsu’s MB87001.
A Divide Ratio Control (SW) permits selection of a 32/33 or 64/65 divide
ratio as desired.
The Modulus Control (MC) selects the proper divide number after SW has
been biased to select the desired divide ratio.
• 2.0 GHz Toggle Frequency
• Supply Voltage 4.5 to 5.5 V
• MC12034A for Positive Edge Triggered Synthesizers
• 12mA Maximum, –40 to 85°C, V
CC
= 5.5 Vdc
• Modulus Control Input is Compatible with Standard CMOS and TTL
• Low–Power 8.5 mA Typical
FUNCTIONAL TABLE
SW MC Divide Ratio
H H 32
H L 33
L H 64
L L 65
NOTES: 1.SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin,
but this is not recommended due to increased power consumption.
2.MC: H = 2.0 V to VCC, L = GND to 0.8 V.
Design Criteria Value Unit
Internal Gate Count * 67 ea
Internal Gate Propagation Delay 200 ps
Internal Gate Power Dissipation 0.75 mW
Speed Power Product 0.15 pJ
NOTE: *Equivalent to a two–input NAND gate.
MAXIMUM RATINGS
Characteristic Symbol Range Unit
Power Supply Voltage, Pin 2 V
CC
–0.5 to +7.0 Vdc
Operating Temperature Range T
A
–40 to +85 °C
Storage Temperature Range T
stg
–65 to +150 °C
Modulus Control Input, Pin 6 MC –0.5 to +6.5 Vdc
NOTES: 1.ESD data available upon request.
2.This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this high
impedance circuit. For proper operation, Vin and V
out
should be constrained
to the range GND ≤ (Vin or V
out
) ≤ VCC.
Motorola, Inc. 1997 Rev 3
Page 2
MC12034A MC12034B
2
MOTOROLA RF/IF DEVICE DATA
ELECTRICAL CHARACTERISTICS
(VCC = 4.5 to 5.5 Vdc, TA = –40 to 85°C, unless otherwise noted.)
Characteristic
Symbol Min Typ Max Unit
Toggle Frequency (Sine Wave) f
t
0.5 2.4 2.0 GHz
Supply Current Output Unloaded (Pin 2) I
CC
– 8.5 12 mA
Modulus Control Input High (MC) V
IH1
2.0 – V
CC
V
Modulus Control Input Low (MC) V
IL1
– – 0.8 V
Divide Ratio Control Input High (SW) V
IH2
V
CC
V
CC
V
CC
Vdc
Divide Ratio Control Input Low (SW) V
IL2
OPEN OPEN OPEN –
Output Voltage Swing (CL = 12 pF, RL = 1.1 kΩ) V
out
1.0 1.6 – V
pp
Modulus Setup Time MC to Out t
SET
– 8.0 10.0 ns
Input Voltage Sensitivity 500–2000 MHz V
in
100 – 1500 mVpp
Output Current (CL = 12 pF, RL = 1.1 kΩ) I
O
– – 3.5 mA
Figure 1. Logic Diagram (MC12034A)
DQ
A
CQB
DQ
B
CQB
DQ
C
C
QB
M
In
In
MC
SW
D
C
D
Q
QB
D
C
E
QB
Q
D
C
F
Q
QB
D
C
G
QB
Q
D
C
H
QB
Q
S
Out
Figure 2. Modulus Setup Time
PROP. DELAY
IN
OUT
MC
MC SETUP
MC RELEASE
Modulus setup time MC to out is the MC
setup or MC release plus the prop. delay.
Figure 3. Typical Output Waveform
500 m
20 ns
≈
Page 3
MC12034A MC12034B
3
MOTOROLA RF/IF DEVICE DATA
Figure 4. AC Test Circuit
SINE WAVE GENERATOR
50
Ω
C1
C2
MC INPUT
C3
VCC = 4.5 Vdc to 5.5 Vdc
C
L
R
L
V
CC
SW
IN
IN
MC GND
OUT
C1 = C2 = 1000 pF
C3 = 0.1
µ
F
CL = 12 pF (INCLUDING SCOPE
CL = AND JIG CAPACITANCE)
RL = 1.1 k
Ω
EXTERNAL COMPONENTS
Figure 5. Input Signal Amplitude versus Input Frequency
Figure 6. Output Amplitude versus Input Frequency
15
10
5
0
–5
–10
–15
–20
–25
–30
–35
–40
–45
–50
1250.0
710.0
400.0
225.0
125.0
71.0
40.0
22.5
12.8
7.10
4.00
2.25
1.25
0.71
0 260 520 780 1040 1300 1560 1820 2080 2340 2600
2000
1600
1200
800
400
0
FREQUENCY (MHz)
AMPLITUDE (dBm)
mVrms
FREQUENCY (MHz)
mVpp
0 260 520 780 1040 1300 1560 1820 2080 2340 2600
Divide Ratio = 65
Page 4
MC12034A MC12034B
4
MOTOROLA RF/IF DEVICE DATA
P SUFFIX
PLASTIC PACKAGE
CASE 626–05
ISSUE K
D SUFFIX
PLASTIC PACKAGE
CASE 751–06
(SO–8)
ISSUE T
NOTES:
1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).
3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
14
58
F
NOTE 2
–A–
–B–
–T–
SEATING
PLANE
H
J
G
D
K
N
C
L
M
M
A
M
0.13 (0.005) B
M
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 9.40 10.16 0.370 0.400
B 6.10 6.60 0.240 0.260
C 3.94 4.45 0.155 0.175
D 0.38 0.51 0.015 0.020
F 1.02 1.78 0.040 0.070
G 2.54 BSC 0.100 BSC
H 0.76 1.27 0.030 0.050
J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
L 7.62 BSC 0.300 BSC
M ––– 10 ––– 10
N 0.76 1.01 0.030 0.040
__
SEATING
PLANE
1
4
58
A0.25MCB
SS
0.25MB
M
h
q
C
X 45
_
L
DIM MIN MAX
MILLIMETERS
A 1.35 1.75
A1 0.10 0.25
B 0.35 0.49
C 0.19 0.25
D 4.80 5.00
E
1.27 BSCe
3.80 4.00
H 5.80 6.20
h
0 7
L 0.40 1.25
q
0.25 0.50
__
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. DIMENSIONS ARE IN MILLIMETER.
3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.
D
E
H
A
B
e
B
A1
C
A
0.10
OUTLINE DIMENSIONS
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MC12034A/D
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