Datasheet MC10EP57DTR2, MC10EP57DT Datasheet (MOTOROLA)

MC10EP57

4:1 Differential Multiplexer

The MC10EP57 is a fully differential 4:1 multiplexer. By leaving
the SEL1 line open (pulled LOW via the input pulldown resistors) the
device can also be used as a differential 2:1 multiplexer with SEL0
input selecting between D0 and D1. The fully differential architecture
of the EP57 makes it ideal for use in low skew applications such as
clock distribution.

The SEL1 is the most significant select line. The binary number
applied to the select inputs will select the same numbered data input
(i.e., 00 selects D0).

Multiple VBB outputs are provided for single-ended or AC coupled
interfaces. In these scenarios, the VBB output should be connected to
the data bar inputs and bypassed via a 0.01µF capacitor to ground.
Note that the VBB output can source/sink up to 0.5mA of current
without upsetting the voltage level. All VCC and VEE pins must be
externally connected to power supply to guarantee proper operation

http://onsemi.com

20

1

TSSOP–20
DT SUFFIX

CASE 948E

MARKING DIAGRAM

• 350ps Typical Propagation Delays

• Typical Frequency 3.0GHz

• 20–Lead TSSOP Package

• PECL mode: 3.0V to 5.5V V

• ECL mode: 0V V

with VEE = –3.0V to –5.5V

CC

with VEE = 0V

CC

• Internal Input Resistors: Pulldown on D, D

• Q Output will default LOW with inputs open or at V

EE

• ESD Protection: >2KV HBM, >100V MM

• V

BB

Outputs

• New Differential Input Common Mode Range

• Moisture Sensitivity Level 1, Indefinite T ime Out of Drypack.

For Additional Information, See Application Note AND8003/D

• Useful as Either 4:1 or 2:1 Multiplexer

• Flammability Rating: UL–94 code V–0 @ 1/8”,

Oxygen Index 28 to 34

• T ransistor Count = 584 devices

SEL0

VCCSEL1

1920

V

CC

1718 16 15 14 13 12

Q

4:1

Q VCCV

BB1VBB2VEE

11

MC10

EP57

ALYW

*For additional information, see Application Note
AND8002/D

PIN DESCRIPTION

PIN

D0–3, D0–3

SEL0, 1 ECL Mux Select Inputs

V

, V

BB1

BB2

Q, Q
V

CC

V

EE

FUNCTION TABLE

SEL1

L
L
H
H

SEL0

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week

FUNCTION

ECL Diff. Data Inputs

ECL Reference Output Voltage

ECL Data Outputs

Positive Supply

Negative, 0 Supply

DATA OUT

L

H

L

H

D0, D0
D1, D1
D2, D2
D3, D3

43

21

D0

CC

Figure 1. 20–Lead TSSOP (Top View) and Logic Diagram

 Semiconductor Components Industries, LLC, 2000

April, 2000 – Rev. 2

56789

D1D1 D2D0

D2V

D3 V

ORDERING INFORMATION

Device Package Shipping

10

D3

EE

1 Publication Order Number:

MC10EP57DT TSSOP 75 Units/Rail
MC10EP57DTR2 TSSOP 2500 Tape & Reel

MC10EP57/D

MC10EP57

MAXIMUM RATINGS*

Symbol Parameter Value Unit

V

EE

V

CC

V

I

V

I

I

out

I

BB

T

A

T

stg

θ

JA

θ

JC

T

sol

* Maximum Ratings are those values beyond which damage to the device may occur.

{

Use for inputs of same package only.

DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = –5.5V to –3.0V) (Note 4.)

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE

V

OH

V

OL

V

IH

V

IL

V

BB

V

IHCMR

I

IH

I

IL

NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

1. VCC = 0V, VEE = V

2. All loading with 50 ohms to VCC–2.0 volts.

3. V

4. Input and output parameters vary 1:1 with VCC.

Power Supply Current
(Note 1.)

Output HIGH Voltage
(Note 2.)

Output LOW Voltage
(Note 2.)

Input HIGH Voltage
Single Ended

Input LOW Voltage
Single Ended

Output Voltage Reference –1550 –1450 –1350 –1500 –1400 –1300 –1450 –1350 –1250 mV
Input HIGH Voltage Common Mode

Range (Note 3.)
Input HIGH Current 150 150 150 µA
Input LOW Current

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

min varies 1:1 with VEE, max varies 1:1 with VCC.

IHCMR

Power Supply (VCC = 0V) –6.0 to 0 VDC
Power Supply (VEE = 0V) 6.0 to 0 VDC
Input Voltage (VCC = 0V, VI not more negative than VEE) –6.0 to 0 VDC
Input Voltage (VEE = 0V, VI not more positive than VCC) 6.0 to 0 VDC
Output Current Continuous

VBB Sink/Source Current
Operating Temperature Range –40 to +85 °C
Storage Temperature –65 to +150 °C
Thermal Resistance (Junction–to–Ambient) Still Air

Thermal Resistance (Junction–to–Case) 23 to 41 ±5% °C/W
Solder Temperature (<2 to 3 Seconds: 245°C desired) 265 °C

SEL, D

to V

EEmin

EEmax

{

–40°C 25°C 85°C

40 52 65 40 52 65 40 52 65 mA

–1135 –1060 –885 –1070 –945 –820 –1010 –885 –760 mV

–1995 –1810 –1685 –1995 –1745 –1620 –1995 –1685 –1560 mV

–1210 –885 –1145 –820 –1085 –760 mV

–1935 –1610 –1870 –1545 –1810 –1485 mV

VEE+2.0 0.0 VEE+2.0 0.0 VEE+2.0 0.0 V

0.5

D

, all other pins floating.

–150

Surge

500lfpm

0.5

–150

50

100

± 0.5 mA

140
100

0.5

–150

mA

°C/W

µA

http://onsemi.com

2

MC10EP57

DC CHARACTERISTICS, LVPECL (VCC = 3.3V ± 0.3V, VEE = 0V) (Note 8.)

–40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE

V

OH

V

OL

V

IH

V

IL

V

BB

V

IHCMR

I

IH

I

IL

NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

5. VCC = 3.3V, VEE = 0V, all other pins floating.

6. All loading with 50 ohms to VCC–2.0 volts.

7. V

8. Input and output parameters vary 1:1 with VCC.

Power Supply Current
(Note 5.)

Output HIGH Voltage
(Note 6.)

Output LOW Voltage
(Note 6.)

Input HIGH Voltage
Single Ended

Input LOW Voltage
Single Ended

Output Voltage Reference 1750 1850 1950 1800 1900 2000 1850 1950 2050 mV
Input HIGH Voltage Common Mode

Range (Note 7.)
Input HIGH Current 150 150 150 µA
Input LOW Current

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

min varies 1:1 with VEE, max varies 1:1 with VCC.

IHCMR

SEL, D

D

40 52 65 40 52 65 40 52 65 mA

2165 2240 2415 2230 2355 2480 2290 2415 2540 mV

1305 1490 1615 1305 1555 1680 1305 1615 1740 mV

2090 2415 2155 2480 2215 2540 mV

1365 1690 1430 1755 1490 1815 mV

2.0 3.3 2.0 3.3 2.0 3.3 V

0.5

–150

0.5

–150

0.5

–150

µA

DC CHARACTERISTICS, PECL (VCC = 5.0V ± 0.5V, VEE = 0V) (Note 12.)

–40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE

V

OH

V

OL

V

IH

V

IL

V

BB

V

IHCMR

I

IH

I

IL

NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

9. VCC = 5.0V, VEE = 0V, all other pins floating.

10.All loading with 50 ohms to VCC–2.0 volts.

11. V

12.Input and output parameters vary 1:1 with VCC.

Power Supply Current
(Note 9.)

Output HIGH Voltage
(Note 10.)

Output LOW Voltage
(Note 10.)

Input HIGH Voltage
Single Ended

Input LOW Voltage
Single Ended

Output Voltage Reference 3450 3550 3650 3500 3600 3700 3550 3650 3750 mV
Input HIGH Voltage Common Mode

Range (Note 11.)
Input HIGH Current 150 150 150 µA
Input LOW Current

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

min varies 1:1 with VEE, max varies 1:1 with VCC.

IHCMR

SEL, D

D

40 52 65 40 52 65 40 52 65 mA

3865 3940 4115 3930 4055 4180 3990 4115 4240 mV

3005 3190 3315 3005 3255 3380 3005 3315 3440 mV

3790 4115 3855 4180 3915 4240 mV

3065 3390 3130 3455 3190 3515 mV

2.0 5.0 2.0 5.0 2.0 5.0 V

0.5

–150

0.5

–150

0.5

–150

µA

http://onsemi.com

3

MC10EP57

AC CHARACTERISTICS (VCC = 0V; VEE = –3.0V to –5.5V) or (VCC = 3.0V to 5.5V; VEE =

–40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

f

max

t

PLH

t

PHL

t

SKEW

t

JITTER

V

PP

tr, t

13.F

14.Within–Device Skew is defined as identical transitions on similar paths through a device.

15.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays

are measured from the cross point of the inputs to the cross point of the outputs.

Maximum Toggle
Frequency (Note 13.)

,

Propagation Delay to
Output Differential D–>Q, Q

Within–Device Skew (Note 14.)
Duty Cycle Skew (Note 15.)

Cycle–to–Cycle Jitter TBD TBD TBD ps
Input Voltage Swing (Diff.) 150 800 1200 150 800 1200 150 800 1200 mV
Output Rise/Fall Times Q, Q

f

(20% – 80%)

guaranteed for functionality only.

max

COM_SEL, SEL–>Q, Q

250
300

70 120 170 70 140 200 70 150 220 ps

350
400

450
500

100 100 100 ps

275
320

3.0 GHz

375
420

475
520

0V)

320
320

420
450

520

ps

575

http://onsemi.com

4

L

U0.15 (0.006) T

2X

L/2

PIN 1
IDENT

U0.15 (0.006) T

C

0.100 (0.004)

–T–

MC10EP57

P ACKAGE DIMENSIONS

TSSOP–20

DT SUFFIX

20 PIN PLASTIC TSSOP PACKAGE

CASE 948E–02

ISSUE A

20X REFK

S

110

S

0.10 (0.004) V

M

A

–V–

G

H

SEATING
PLANE

D

S

U

T

1120

B

–U–

S

JJ1

N

N

DETAIL E

K

K1

SECTION N–N

0.25 (0.010)

M

F

DETAIL E

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS. MOLD
FLASH OR GATE BURRS SHALL NOT EXCEED

0.15 (0.006) PER SIDE.

4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL NOT
EXCEED 0.25 (0.010) PER SIDE.

5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN
EXCESS OF THE K DIMENSION AT MAXIMUM
MATERIAL CONDITION.

6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.

7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE –W–.

MILLIMETERS

–W–

DIMAMIN MAX MIN MAX

B 4.30 4.50 0.169 0.177
C 1.20 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC 0.026 BSC
H 0.27 0.37 0.011 0.015
J 0.09 0.20 0.004 0.008

J1 0.09 0.16 0.004 0.006

K 0.19 0.30 0.007 0.012

K1 0.19 0.25 0.007 0.010

L 6.40 BSC 0.252 BSC
M 0 8 0 8

6.60 0.260

6.40 0.252
––– –––

____

INCHES

http://onsemi.com

5

Notes

MC10EP57

http://onsemi.com

6

Notes

MC10EP57

http://onsemi.com

7

MC10EP57

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes

without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability ,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly , any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer .

PUBLICATION ORDERING INFORMATION

NORTH AMERICA Literature Fulfillment:

Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA

Phone: [phone] or 800–344–3860 Toll Free USA/Canada
Fax: [phone] or 800–344–3867 Toll Free USA/Canada
Email: [e-mail]

Fax Response Line: 303–675–2167 or 800–344–3810 T oll Free USA/Canada

N. American Technical Support: 800–282–9855 Toll Free USA/Canada
EUROPE: LDC for ON Semiconductor – European Support

German Phone: [phone] (M–F 1:00pm to 5:00pm Munich T ime)

Email: ONlit–[e-mail]

French Phone: [phone] (M–F 1:00pm to 5:00pm Toulouse Time)

Email: ONlit–[e-mail]

English Phone: [phone] (M–F 12:00pm to 5:00pm UK Time)

Email: [e-mail]

EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781

*Available from Germany, France, Italy, England, Ireland

CENTRAL/SOUTH AMERICA:

Spanish Phone: [phone] (Mon–Fri 8:00am to 5:00pm MST)

Email: ONlit–[e-mail]

ASIA/PACIFIC : LDC for ON Semiconductor – Asia Support

Phone: [phone] (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)

T oll Free from Hong Kong & Singapore:

001–800–4422–3781

Email: ONlit–[e-mail]

JAPAN: ON Semiconductor, Japan Customer Focus Center

4–32–1 Nishi–Gotanda, Shinagawa–ku, T okyo, Japan 141–8549

Phone: [phone]
Email: [e-mail]

ON Semiconductor Website: http://onsemi.com

For additional information, please contact your local
Sales Representative.

http://onsemi.com

8

MC10EP57/D