Datasheet MC10EP32D, MC10EP32DR2 Datasheet (MOTOROLA)

MC10EP32

B

2 Divider

The MC10EP32 is an integrated B2 divider. The differential clock
inputs and the VBB allow a differential, single–ended or AC coupled
interface to the device. If used, the VBB output should be bypassed to
ground with a 0.01µF capacitor.

The reset pin is asynchronous and is asserted on the rising edge.
Upon power–up, the internal flip–flops will attain a random state; the
reset allows for the synchronization of multiple EP32’s in a system.

• 250ps T ypical Propagation Delay

• 3 GHz T ypical Toggle Frequency

• PECL mode: 3.0V to 5.5V V

• ECL mode: 0V V

with VEE = –3.0V to –5.5V

CC

• Internal Input Resistors: Pulldown on D, D

• Q Output will default LOW with inputs open or at V

• ESD Protection: >4KV HBM, >200V MM

• V

BB

Output

• New Differential Input Common Mode Range

• Moisture Sensitivity Level 1, Indefinite Time Out of Drypack

• Flammability Rating: UL–94 code V–0 @ 1/8”,

Oxygen Index 28 to 34

• Transistor Count = 78 devices

with VEE = 0V

CC

EE

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1

SO–8
D SUFFIX
CASE 751

MARKING DIAGRAM

8

HEP32

ALYW

1
*For additional information, see Application Note
AND8002/D

A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week

CLK

1

R

2

B

2

RESET

3

V

Figure 1. 8–Lead Pinout (Top View) and Logic Diagram

45

BB

78Q

6

V

CC

QCLK

V

EE

PIN DESCRIPTION

PIN

CLK, CLK

Reset ECL Asynchronous Reset

V

BB

Q, Q ECL Data Outputs
V

CC

V

EE

TRUTH TABLE

CLK

Z = LOW to HIGH Transition
Z
F = Divide by 2 Function

CLK

X
Z

= HIGH to LOW Transition

X
Z

ORDERING INFORMATION

Device Package Shipping

FUNCTION

ECL Clock Inputs

Reference Voltage Output

Positive Supply

Negative, 0 Supply

RESET

Z
L

Q

L
F

Q

H

F

 Semiconductor Components Industries, LLC, 1999

December, 1999 – Rev. 1

MC10EP32D SOIC 98 Units/Rail

MC10EP32DR2 SOIC 2500 Tape & Reel

1 Publication Order Number:

MC10EP32/D

MC10EP32

MAXIMUM RATINGS*

Symbol Parameter Value Unit

V

EE

V

CC

V

I

V

I

I

out

I

BB

T

A

T

stg

θ

JA

θ

JC

T

sol

* Maximum Ratings are those values beyond which damage to the device may occur.

{

Use for inputs of same package only.

Power Supply (VCC = 0V) –6.0 to 0 VDC
Power Supply (VEE = 0V) 6.0 to 0 VDC
Input Voltage (VCC = 0V, VI not more negative than VEE) –6.0 to 0 VDC
Input Voltage (VEE = 0V, VI not more positive than VCC) 6.0 to 0 VDC
Output Current Continuous

VBB Sink/Source Current
Operating Temperature Range –40 to +85 °C
Storage Temperature –65 to +150 °C
Thermal Resistance (Junction–to–Ambient) Still Air

Thermal Resistance (Junction–to–Case) 41 to 44 ± 5% °C/W
Solder Temperature (<2 to 3 Seconds: 245°C desired) 265 °C

{

Surge

500lfpm

50

100

± 0.5 mA

190
130

mA

°C/W

CLK

RESET

t

RR

Q

Figure 2. Timing Diagram

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MC10EP32

DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = –5.5V to –3.0V) (Note 4.)

–40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE

V

OH

V

OL

V

IH

V

IL

V

BB

V

IHCMR

I

IH

I

IL

NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

1. VCC = 0V, VEE = V

2. All loading with 50 ohms to VCC–2.0 volts.

3. V

4. Input and output parameters vary 1:1 with VCC.

Power Supply Current
(Note 1.)

Output HIGH Voltage
(Note 2.)

Output LOW Voltage
(Note 2.)

Input HIGH Voltage
Single Ended

Input LOW Voltage
Single Ended

Output Voltage Reference –1510 –1410 –1310 –1445 –1345 –1245 –1385 –1285 –1 185 mV
Input HIGH Voltage Common Mode

Range (Note 3.)
Input HIGH Current 150 150 150 µA
Input LOW Current CLK

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

min varies 1:1 with VEE, max varies 1:1 with VCC.

IHCMR

EEmin

to V

CLK

, all other pins floating.

EEmax

23 30 37 23 30 37 23 30 37 mA

–1135 –1060 –885 –1070 –945 –820 –1010 –885 –760 mV

–1935 –1810 –1685 –1870 –1745 –1620 –1810 –1685 –1560 mV

–1210 –885 –1145 –820 –1085 –760 mV

–1935 –1610 –1870 –1545 –1810 –1485 mV

VEE+2.0 0.0 VEE+2.0 0.0 VEE+2.0 0.0 V

0.5

–150

0.5

–150

0.5

–150

µA

DC CHARACTERISTICS, LVPECL (VCC = 3.3V ± 0.3V, VEE = 0V) (Note 8.)

–40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE

V

OH

V

OL

V

IH

V

IL

V

BB

V

IHCMR

I

IH

I

IL

NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

5. VCC = 3.3V, VEE = 0V, all other pins floating.

6. All loading with 50 ohms to VCC–2.0 volts.

7. V

8. Input and output parameters vary 1:1 with VCC.

Power Supply Current
(Note 5.)

Output HIGH Voltage
(Note 6.)

Output LOW Voltage
(Note 6.)

Input HIGH Voltage
Single Ended

Input LOW Voltage
Single Ended

Output Voltage Reference 1790 1890 1990 1855 1955 2055 1915 2015 21 15 mV
Input HIGH Voltage Common Mode

Range (Note 7.)
Input HIGH Current 150 150 150 µA
Input LOW Current CLK

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

min varies 1:1 with VEE, max varies 1:1 with VCC.

IHCMR

CLK

23 30 37 23 30 37 23 30 37 mA

2165 2240 2415 2230 2355 2480 2290 2415 2540 mV

1365 1490 1615 1430 1555 1680 1490 1615 1740 mV

2090 2415 2155 2480 2215 2540 mV

1365 1690 1430 1755 1490 1815 mV

2.0 3.3 2.0 3.3 2.0 3.3 V

0.5

–150

0.5

–150

0.5

–150

µA

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MC10EP32

DC CHARACTERISTICS, PECL (VCC = 5.0V ± 0.5V, VEE = 0V) (Note 12.)

–40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

IEE

V

OH

V

OL

V

IH

V

IL

V

BB

V

IHCMR

I

IH

I

IL

NOTE: 10EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The

9. VCC = 5.0V, VEE = 0V, all other pins floating.

10.All loading with 50 ohms to VCC–2.0 volts.

11. V

12.Input and output parameters vary 1:1 with VCC.

Power Supply Current
(Note 9.)

Output HIGH Voltage
(Note 10.)

Output LOW Voltage
(Note 10.)

Input HIGH Voltage
Single Ended

Input LOW Voltage
Single Ended

Output Voltage Reference 3490 3590 3690 3555 3655 3755 3615 3715 3815 mV
Input HIGH Voltage Common Mode

Range (Note 11.)
Input HIGH Current 150 150 150 µA
Input LOW Current CLK

circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500lfpm is maintained.

min varies 1:1 with VEE, max varies 1:1 with VCC.

IHCMR

CLK

23 30 37 23 30 37 23 30 37 mA

3865 3940 4115 3930 4055 4180 3990 4115 4240 mV

3065 3190 3315 3130 3255 3380 3190 3315 3440 mV

3790 4115 3855 4180 3915 4240 mV

3065 3390 3130 3455 3190 3515 mV

2.0 5.0 2.0 5.0 2.0 5.0 V

0.5

–150

0.5

–150

0.5

–150

µA

AC CHARACTERISTICS (VCC = 0V; VEE = –3.0V to –5.5V) or (VCC = 3.0V to 5.5V; VEE =

–40°C 25°C 85°C

Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit

f

max

t

PLH

t

PHL

t

RR

t

SKEW

t

PW

t

JITTER

V

PP

t

r

t

f

13.F

14.Skew is measured between outputs under identical transitions. Duty cycle skew is defined only for differential operation when the delays
are measured from the cross point of the inputs to the cross point of the outputs.

Maximum Toggle Frequency
(Note 13.)

,

Propagation Delay to
Output Differential CLK–>Q, Q

Set/Reset Recovery 200 175 200 175 200 175 ps
Duty Cycle Skew (Note 14.) 5.0 5.0 20 5.0 20 ps
Minimum Pulse Width RESET 550 475 550 475 550 475 ps
Cycle–to–Cycle Jitter TBD TBD TBD ps
Input Voltage Swing (Diff.) 150 800 1200 150 800 1200 150 800 1200 mV
Output Rise/Fall Times Q, Q

(20% – 80%)

guaranteed for functionality only. VOL and VOH levels are guaranteed at DC only.

max

RESET–>Q, Q

2.5 3.0 2.5 3.0 2.5 3.0 GHz

100
100

50 100 150 70 120 170 70 130 200 ps

220
220

300
300

100
100

250
250

350
350

0V)

180
180

290
290

400

ps

400

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MC10EP32

P ACKAGE DIMENSIONS

SO–8

D SUFFIX

PLASTIC SOIC PACKAGE

CASE 751–06

ISSUE T

C

A

E

B

A1

D

58

0.25MB

1

H

4

e

M

h

X 45

_

q

C

A

SEATING
PLANE

0.10

L

B

SS

A0.25MCB

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.

2. DIMENSIONS ARE IN MILLIMETER.

3. DIMENSION D AND E DO NOT INCLUDE MOLD
PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.

5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS
OF THE B DIMENSION AT MAXIMUM MATERIAL
CONDITION.

MILLIMETERS

DIM MIN MAX

A 1.35 1.75

A1 0.10 0.25

B 0.35 0.49
C 0.19 0.25
D 4.80 5.00
E

3.80 4.00

1.27 BSCe

H 5.80 6.20
h

0.25 0.50

L 0.40 1.25

0 7

q

__

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Notes

MC10EP32

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Notes

MC10EP32

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MC10EP32

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MC10EP32/D

8