The MC10EP116/100EP116 is a 6-bit differential line receiver
based on the EP16 device. The 3.0GHz bandwidth provided by the
high frequency outputs makes the device ideal for buffering of very
high speed oscillators.
A VBB pin is available to AC couple an input signal to the device.
More information on AC coupling can be found in the design
handbook interfacing with ECLinPS on our website.
The design incorporates two stages of gain, internal to the device,
making it an excellent choice for use in high bandwidth amplifier
applications.
The differential inputs have internal clamp structures which will
force the Q output of a gate in an open input condition to go to a LOW
state. Thus, inputs of unused gates can be left open and will not affect
the operation of the rest of the device. Note that the input clamp will
take affect only if both inputs fall 2.5V below VCC. All VCC and V
pins must be externally connected to power supply to guarantee proper
operation.
• 230ps Typical Propagation Delay
• High Bandwidth to 3.0 GHz Typical
• PECL mode: 3.0V to 5.5V V
• ECL mode: 0V V
with VEE = –3.0V to –5.5V
CC
with VEE = 0V
CC
• Internal Input Resistors: Pulldown on D, Pulldown and Pullup on D
• Q Output will default LOW with inputs open or at V
EE
• ESD Protection: 2KV HBM, 100V MM
• V
BB
Output
• New Differential Input Common Mode Range
• Moisture Sensitivity Level 2
For Additional Information, See Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
• Transistor Count: 729 devices
EE
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32–LEAD TQFP
FA SUFFIX
CASE 873A
MARKING DIAGRAM*
MC10
EP116
AWLYYWW
32
1
*For additional information, see Application Note
AND8002/D
PIN DESCRIPTION
PIN
D[0:5], D[0:5]
Q[0:5], Q[0:5]ECL Differential Data Outputs
VBB
VCCPositive Supply
VEENegative, 0 Supply
A= Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
FUNCTION
ECL Differential Data Inputs
Reference Voltage Output
LOGIC DIAGRAM
D
0
D
0
D
1
D
1
D
2
D
2
D
3
D
3
D
4
D
4
D
5
D
5
V
BB
Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev . 3
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Q
5
Q
5
1Publication Order Number:
MC10EP1 16FATQFP250 Units/Tray
MC10EP1 16FAR2TQFP2000 Tape & Reel
ORDERING INFORMATION
DevicePackageShipping
MC10EP116/D
Page 2
D4
D3
D3
VEE
D2
D2
D1
D1
MC10EP116
2423222120191817
25
26
27
28
MC10EP116
29
30
31
32
12345678
VCCQ4Q4Q5Q5D5D4 D5
16
15
14
13
12
11
10
9
VCC
Q3
Q3
VCC
VCC
Q2
Q2
VCC
D0
VEEQ1Q1Q0Q0VBBD0
Figure 1. 32–Lead LQFP Pinout (Top View)
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
MAXIMUM RATINGS*
SymbolParameterValueUnit
V
EE
V
CC
V
I
V
I
I
out
I
BB
T
A
T
stg
θ
JA
θ
JC
T
sol
* Maximum Ratings are those values beyond which damage to the device may occur.
{
Use for inputs of same package only.
Power Supply (VCC = 0V)–6.0 to 0VDC
Power Supply (VEE = 0V)6.0 to 0VDC
Input Voltage (VCC = 0V, VI not more negative than VEE)–6.0 to 0VDC
Input Voltage (VEE = 0V, VI not more positive than VCC)6.0 to 0VDC
Output CurrentContinuous
VBB Sink/Source Current
Operating Temperature Range–40 to +85°C
Storage Temperature–65 to +150°C
Thermal Resistance (Junction–to–Ambient)Still Air
Thermal Resistance (Junction–to–Case)12 to 17°C/W
Solder Temperature (<2 to 3 Seconds: 245°C desired)265°C
{
Surge
500lfpm
50
100
± 0.5mA
80
55
mA
°C/W
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2
Page 3
MC10EP116
DC CHARACTERISTICS, ECL/LVECL (VCC = 0V; VEE = –5.5V to –3.0V) (Note 4.)
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DATUM PLANE –AB– IS LOCATED AT BOTTOM
OF LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DATUMS –T–, –U–, AND –Z– TO BE
DETERMINED AT DATUM PLANE –AB–.
5. DIMENSIONS S AND V TO BE DETERMINED AT
SEATING PLANE –AC–.
6. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION. ALLOWABLE PROTRUSION
IS 0.250 (0.010) PER SIDE. DIMENSIONS A AND B
DO INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –AB–.
7. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. DAMBAR PROTRUSION SHALL
NOT CAUSE THE D DIMENSION TO EXCEED
0.520 (0.020).
8. MINIMUM SOLDER PLATE THICKNESS SHALL
BE 0.0076 (0.0003).
9. EXACT SHAPE OF EACH CORNER MAY VARY
FROM DEPICTION.
MILLIMETERS
DIMAMINMAXMINMAX
7.000 BSC0.276 BSC
A13.500 BSC0.138 BSC
B7.000 BSC0.276 BSC
B13.500 BSC0.138 BSC
C 1.400 1.600 0.055 0.063
D 0.300 0.450 0.012 0.018
E 1.350 1.450 0.053 0.057
F 0.300 0.400 0.012 0.016
G0.800 BSC0.031 BSC
H 0.050 0.150 0.002 0.006
J 0.090 0.200 0.004 0.008
K 0.500 0.700 0.020 0.028
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without further notice to any products herein. SCILLC makes no warranty , representation or guarantee regarding the suitability of its products for any particular
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8
MC10EP116/D
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