Datasheet MC10E404FNR2, MC100E404FN, MC10E404FN, MC100E404FNR2 Datasheet (Motorola)

Page 1
LOGIC DIAGRAM
25 24 23 22 21 20 19
18 17 16 15 14 13 12
5 6 7 8 9 10 11
26 27 28
2 3 4
D3a D
3
a D3b D3b V
CCOQ3
Q
3
Q
2
Q
2
V
CC
Q
1
Q
1
Q
0
Q
0
D1a D1a D0b
D2b D2b D
2
a
V
EE
D2a D
1
b
D1b
D0b D
0
a D0a V
CCO
D0a D
0
a
D0b D
0
b
D1a D
1
a
D1b D
1
b
D2a D
2
a
D2b D
2
b
D3a D
3
a
D3b D
3
b
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
1
Pinout: 28-Lead PLCC
(Top View)
* All VCC and V
CCO
pins are tied together on the die.

SEMICONDUCTOR TECHNICAL DATA
2–1
REV 2
Motorola, Inc. 1996
12/93
  
The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper and lower level gate inputs.
Because a negative 2-input NAND function is equivalent to a 2-input OR function, the differential inputs and outputs of the device also allow for its use as a fully differential 2 input OR/NOR function.
The output RISE/FALL times of this device are significantly faster than most other standard ECLinPS devices resulting in an increased bandwidth.
The differential inputs have clamp structures which will force the Q output of a gate in an open input condition to go to a LOW state. Thus, inputs of unused gates can be left open and will not affect the operation of the rest of the device. Note that the input clamp will take affect only if both inputs fall 2.5V below VCC.
Differential D and Q
700ps Max. Propagation Delay
High Frequency Outputs
Extended 100E V
EE
Range of – 4.2V to – 5.46V
Internal 75k Input Pulldown Resistors
PIN NAMES
Pin Function
D[0:4], D[0:4] Differential Data Inputs Q[0:4], Q[0:4] Differential Data Outputs
FUNCTION TABLE
Da Db Q Da Db Q
L L L L L L
L H L L H H H L L H L H H H H H H H


QUAD DIFFERENTIAL
AND/NAND
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
Page 2
MC10E404 MC100E404
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–2
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
I
IH
Input HIGH Current 150 150 150 µA
I
EE
Power Supply Current mA
10E 106 127 106 127 106 127
100E 106 127 106 127 122 146 VPP(DC) Input Sensitivity 50 50 50 mV 1 V
CMR
Common Mode Range –1.5 0 –1.5 0 –1.5 0 V 2
1. Differential input voltage required to obtain a full ECL swing on the outputs.
2. V
CMR
is referenced to the most positive side of the differential input signal. Normal operation is obtained when the input signals are within the
V
CMR
range and the input swing is greater than VPP
MIN
and < 1.0V.
AC CHARACTERISTICS (VEE= VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
t
PLH
Propagation Delay to Output ps
t
PHL
Da (Diff) 350 475 650 350 475 650 350 475 650
Da (SE) 300 475 700 300 475 700 300 475 700
Db (Diff) 375 500 675 375 500 675 375 500 675
Db (SE) 325 500 725 325 500 725 325 500 725 t
SKEW
Within-Device Skew 50 50 50 ps 1 VPP(AC) Minimum Input Swing 150 150 150 mV 2 t
r
Rise/Fall Time t
f
20 - 80% 150 400 150 400 150 400 ps
1. Within-device skew is defined as identical transitions on similar paths through a device.
2. Minimum input swing for which AC parameters are guaranteed.
Page 3
MC10E404 MC100E404
2–3 MOTOROLAECLinPS and ECLinPS Lite
DL140 — Rev 4
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 776–02
ISSUE D
0.007 (0.180) T L
–M
SNSM
0.007 (0.180) T L
–M
SNSM
0.007 (0.180) T L
–M
SNSM
0.010 (0.250) T L
–M
SNSS
0.007 (0.180) T L
–M
SNSM
0.010 (0.250) T L
–M
SNSS
0.007 (0.180) T L
–M
SNSM
0.007 (0.180) T L
–M
SNSM
0.004 (0.100)
SEATING PLANE
-T-
12.32
12.32
4.20
2.29
0.33
0.66
0.51
0.64
11.43
11.43
1.07
1.07
1.07 — 2
°
10.42
1.02
12.57
12.57
4.57
2.79
0.48
0.81 — —
11.58
11.58
1.21
1.21
1.42
0.50
10
°
10.92 —
1.27 BSC
A B C E F G H J K R U V W X Y
Z G1 K1
MIN MINMAX MAX
INCHES MILLIMETERS
DIM
NOTES:
1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE.
2. DIM G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE.
3. DIM R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
VIEW S
B
U
Z
G1
X
VIEW D-D
H
K
F
VIEW S
G
C
Z
A
R
E
J
0.485
0.485
0.165
0.090
0.013
0.026
0.020
0.025
0.450
0.450
0.042
0.042
0.042 — 2
°
0.410
0.040
0.495
0.495
0.180
0.110
0.019
0.032 — —
0.456
0.456
0.048
0.048
0.056
0.020
10
°
0.430 —
0.050 BSC
-N-
Y BRK
D
D
W
-M-
-L-
28 1
V
G1
K1
Page 4
MC10E404 MC100E404
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–4
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MC10E404/D
*MC10E404/D*
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