Page 1
7
SDA
6
XTAL2
14
TV AND VCR
PLL TUNING CIRCUITS
WITH 1.3 GHz PRESCALER
AND I2C BUS
PIN CONNECTIONS
Order this document by MC44824/D
116
15
14
13
12
11
10
9
2
3
4
5
6
8
PD
XTAL1
XTAL2
B
7
B
4
CA
UD
B
2
D SUFFIX
PLASTIC PACKAGE
CASE 751B
(SO–16)
16
1
SCL
GND
HF2
HF1
V
CC
B
0
B
1
(Top View)
14
1
D SUFFIX
PLASTIC PACKAGE
CASE 751A
(SO–14)
13
12
11
10
9
8
1
2
3
4
5
7
PD
XTAL1
SCL
B
7
CA B
2
SDA
UD
GND
HF2
HF1
V
CC
B
1
(Top View)
MC44824
MC44825
1
MOTOROLA ANALOG IC DEVICE DATA
The MC44824/25 are tuning circuits for TV and VCR tuner applications.
They contain on one chip all the functions required for PLL control of a VCO.
The integrated circuits also contain a high frequency prescaler and thus can
handle frequencies up to 1.3 GHz.
The MC44824/25 are manufactured on a single silicon chip using
Motorola’s high density bipolar process, MOSAIC (Motorola Oxide Self
Aligned Implanted Circuits).
• Complete Single Chip System for MPU Control (I
2
C Bus). Data and
Clock Inputs are 3–Wire Bus Compatible
• Divide–by–8 Prescaler Accepts Frequencies up to 1.3 GHz
• 15 Bit Programmable Divider
• Reference Divider: Programmable for Division Ratios 512 and 1024
• 3–State Phase/Frequency Comparator
• 4 Programmable Chip Addresses
• 3 Output Buffers (MC44824) respectively 5 Output Buffers (MC44825)
for 10 mA/15 V
• Operational Amplifier for use with External NPN Transistor
• SO–14 Package for MC44824 and SO–16 for MC44825
• High Sensitivity Preamplifier
• Fully ESD Protected
MOSAIC is a trademark of Motorola, Inc.
ORDERING INFORMATION
Device
Operating
Temperature Range
Package
MC44824D
°
°
SO–14
MC44825D
T
A
= –
20° t
o +
80°C
SO–16
Motorola, Inc. 1996 Rev 1
Page 2
MC44824/25
2
MOTOROLA ANALOG IC DEVICE DATA
Representative Block Diagram
This device contains 3,204 active transistors.
Gnd
Test
Logic
Buffers
Latches
P–On
Reset
I2C Bus
Receiver
Latches
Phase
Comp
Ref
Divider
3.2 or 4.0
MHz Osc
Latch Control
Program Divider
15 Bit
Latches B
Latches A
Shift Register
15 Bit
÷
8
Prescaler
Preamp
DTB2
POR
Operational
Amplifier
2.7 V
DTB1
CL
Data
RL
DTF
F
out
TDI
F
out
F
ref
T10, T
11
T9, T12, T
14
T
13
T
8
4
7
9
(10)
8
(9)(7)
6
(6)
14
(16)
10
(12)
5.0 V
F
out
F
ref
13 (15)
7 (8)
4 (4)
5 (5)
11 (13)
CA
SDA
SCL
HF Input1
V
CC
UD
PD
XTAL2
B
7
B
4
B2B
1
DTS, EN
512/1024
1 (1)
3 (3)
12 (14)
HF Input2
XTAL1
2 (2)
Gnd
(11)
B
0
MC44825 Pin Numbers ( )
PIN FUNCTION DESCRIPTION
Pin
MC44824 MC44825
Symbol Description
1 1 PD Input of tuning voltage amplifier
2 2 XTAL1 First crystal input is the active pin at the oscillators
3 3 XTAL2 Second crystal input is the internal ground
4 4 SDA Data input
5 5 SCL Clock input of the I2C bus
6, 8, 9 – B7, B2, B
1
Band buffer (open collector) outputs for up to 10 mA
– 6, 7, 9, 10, 11 B7, B4, B2, B1, B
0
Band buffer (open collector) outputs for up to 10 mA
7 8 CA Chip address selection pin
10 12 V
CC
Supply voltage, typical 5.0 V
11, 12 13, 14 HF1/HF2 Symmetric HF inputs from local oscillator
13 15 GND Ground
14 16 UD Output of the tuning voltage amplifier. Needs an external NPN with pull–up
resistor to drive the varicaps
Page 3
MC44824/25
3
MOTOROLA ANALOG IC DEVICE DATA
MAXIMUM RATINGS (T
A
= 25°C, unless otherwise noted.)
Pin
Rating
MC44824 MC44825
Value Unit
Power Supply Voltage
(VCC)
10 12 6.0 V
Band Buffer “Off” Voltage 6, 8, 9 6, 7, 9, 10, 11 15 V
Band Buffer “On” Current 6, 8, 9 6, 7, 9, 10, 11 15 mA
Storage Temperature – – –65 to +150 ° C
Operating Temperature
Range
– – –20 to +80 °C
RF Input Level (10 MHz
to 1.3 GHz)
11, 12 13, 14 1.5 Vrms
ELECTRICAL CHARACTERISTICS (V
CC
= 5.0 V , TA = 25°C, unless otherwise noted.)
Pin
Characteristic
MC44824 MC44825
Min Typ Max Unit
VCC Supply Voltage Range 10 12 4.5 5.0 5.5 V
VCC Supply Current (VCC = 5.0 V) 10 12 – 40 55 mA
Band Buffer Leakage Current when “Off” at 12 V 6, 8, 9 6, 7, 9, 10, 11 – 0.01 1.0 µA
Band Buffer Saturation Voltage when “On” at 10 mA 6, 8, 9 6, 7, 9, 10, 11 – 1.6 1.8 V
Data Saturation Voltage at 15 mA Acknowledge “On” 4 4 – – 1.0 V
Data/Clock/Enable Current at 0 V 4, 5 4, 5 –10 – 0 µA
Data/Clock/Enable Current at 5.0 V 4, 5 4, 5 0 – 1.0 µA
Data/Clock/Enable Input Voltage Low 4, 5 4, 5 – – 1.5 V
Data/Clock/Enable Input Voltage High 4, 5 4, 5 3.0 – – V
Clock Frequency Range 5 5 – – 100 kHz
Oscillator Frequency Range 2, 3 2, 3 3.15 3.2 4.05 MHz
Operational Amplifier Input Current 1 1 –15 0 15 nA
Phase Detector Current in High Impedance State 1 1 –15 0 15 nA
Charge Pump Current of Phase Comparator, T14 = 0 1 1 30 40 60 µA
Charge Pump Current of Phase Comparator, T14 = 1 1 1 100 125 200 µA
HF CHARACTERISTICS (See Figure NO T AG)
Pin
Characteristic
MC44824 MC44825
Min Typ Max Unit
DC Bias 11, 12 13, 14 – 1.6 – V
Input Voltage Range mVrms
80–150 MHz 11, 12 13, 14 10 – 315
150–600 MHz 11, 12 13, 14 5.0 – 315
600–950 MHz 11, 12 13, 14 10 – 315
950–1300 MHz 11, 12 13, 14 50 – 315
Page 4
MC44824/25
4
MOTOROLA ANALOG IC DEVICE DATA
MC44824/25
Figure 1. HF Sensitivity Test Circuit
Device is in test mode. B2 and B7 are “On”.
Sensitivity is level of HF generator on 50 Ω load.
SDA, SCL
Gnd B
7
B
2
Bus Controller
HF Generator
HF Out Gnd
V
CC
5.0 V
Frequency
Counter
In
I2C Bus
470470
50
Ω
50 Ω Cable
1.0 nF
HF
V
CC
1.0 nF HF
V
CC
2
1.3 GHz
500 MHz
–j +j
2
0.5
1
0.5
1
2
0.5
1
Figure 2. Typical HF Input Impedance
ZO = 50
Ω
1.0 GHz
50 MHz
0
Data Format and Bus Receiver
The circuit receives the information for tuning and control
via the I2C bus. The incoming information, consisting of a
chip address byte followed by two or four data bytes, is
treated in the I2C bus receiver. The definition of the
permissible bus protocol is shown below:
1_ST A CA CO BA STO
2_ST A CA FM FL STO
3_ST A CA CO BA FM FL STO
4_ST A CA FM FL CO BA STO
STA = Start Condition
STO = Stop Condition
CA = Chip Address Byte
CO = Data Byte for Control Information
BA = Band Information
FM = Data Byte for Frequency Information (MSB’s)
FL = Data Byte for Frequency Information (LSB’s)
Page 5
MC44824/25
5
MOTOROLA ANALOG IC DEVICE DATA
Figure 3. Complete Data Transfer Process
SDA
SCL
S P
1–7 8 9 1–7 8 9 1–7 8 9
STA ADDRESSCAR/W ACK DATA ACK DATA ACK STO
Figure 4 shows the five bytes of information that are
needed for circuit operation: there is the chip address, two
bytes of control and band information and two bytes of
frequency information.
After the chip address, two or four data bytes may be
received: if three data bytes are received, the third data byte
is ignored.
If five or more data bytes are received, the fifth and
following data bytes are ignored and the last acknowledge
pulse is sent at the end of the fourth data byte.
The first and the third data bytes contain a function bit
which allows the IC to distinguish between frequency
information and control plus band information.
Frequency information is preceded by a Logic “0”. If the
function bit is Logic “1” the two following bytes contain control
and band information. The first data byte, shifted after the
chip address, may be byte CO or byte FM.
The two permissible bus protocols with five bytes are
shown in Figure 4.
Figure 4. Definition of Bytes
CA_Chip Address 1 1 0 0 0 0/1 0/1 0 ACK
CO_Information
1
T
14
T
13
T
12
T
11
T
10
T
9
T
8
ACK
BA_Band Information B
7
X X B4* X B
2
B
1
B0* ACK
FM_Frequency Information
0
N
14
N
13
N
12
N
11
N
10
N
9
N
8
ACK
FL_Frequency Information N
7
N
6
N
5
N
4
N
3
N
2
N
1
N
0
ACK
CA_Chip Address 1 1 0 0 0 0/1 0/1 0 ACK
FM_Frequency Information
0
N
14
N
13
N
12
N
11
N
10
N
9
N
8
ACK
FL_Frequency Information N
7
N
6
N
5
N
4
N
3
N
2
N
1
N
0
ACK
CO_Information
1
T
14
T
13
T
12
T
11
T
10
T
9
T
8
ACK
BA_Band Information B
7
X X B4* X B
2
B
1
B0* ACK
* B0 and B4 are only available on MC44825. On MC44824 this data is random.
Chip Address
The chip address is programmable by Pin 7 (8), CA.
CA – Pin 7 (8) Address (HEX.)
Gnd to 0.1 V
CC1
C0
Open or 0.2 V
CC1
to 0.3 V
CC1
C2
0.4 V
CC1
to 0.7 V
CC1
C4
0.8 V
CC1
to 1.1 V
CC1
C6
Bits B0, B1, B2, B4, B7: Control the Band Buffers
B0, B1, B2, B4, B7 = 0
B0, B1, B2, B4, B7 = 1
Buffer “Off”
Buffer “On”
Bit T8: Controls the Output of the Operational Amplifier
T8 = 0
T8 = 1
Normal Operation
Operational Amplifier Active
Output State of Operational Amplifier Switched “Off”,
Output Pulls High Through an External Pull–Up
Resistor
Bits T9, T12: Control the Phase Comparator
T
9
T
12
Function
1
1
0
0
0
1
0
1
Normal Operation
High Impedance
Upper Source “On” Only
Lower Source “On” Only
Page 6
MC44824/25
6
MOTOROLA ANALOG IC DEVICE DATA
Bits T10, T11: Control the Reference Ratio
T
10
T
11
Division Ratio
0
0
1
1
0
1
0
1
512
1024
1024
512
Bit T13: Switches the Internal Signals F
ref
and F
BY2
to
Bit T13: the Band Buffer Outputs (Test)
T13 = 0
T13 = 1
Normal Operation
Test Mode
F
ref
Output at B
7
F
BY2
Output at B
2
Bits B2 and B7 have to be “Off”, B2 = B7 = 0 in the test mode.
F
ref
is the reference frequency.
F
BY2
is the output frequency of the programmable divider, divided by two.
Bit T14: Controls the Charge Pump Current of the
Bit T14: Phase Comparator
T14 = 0
T13 = 1
Pump Current 40 µA Typical
Pump Current 125 µA Typical
The Band Buffers
BA_Band Information
MC44824 14 Pin version
B7XXXXB
2
B
1
X ACK
MC44825 16 Pin version
B7XXB
4
XB
2
B
1
B
0
ACK
The band buffers are open collector buffers and are active
“low” at Bn = 1. They are designed for 10 mA with a typical
“On” resistance of 160 Ω. These buffers are designed to
withstand relative high output voltage in the “Off” state.
B2 and B7 buffers may also be used to output internal IC
signals (reference frequency and programmable divider
output frequency divided by 2) for test purposes.
The bit B2 and/or B7 have to be zero if the buffers are used
for these additional functions.
The Programmable Divider
The programmable divider is a presettable down counter .
When it has counted to zero it takes its required division
ratio out of the latches B. Latches B are loaded from latches
A by means of signal TDI which is synchronous to the
programmable divider output signal.
Since latches A receive the data asynchronously with the
programmable divider, this double latch scheme is needed to
assure correct data transfer to the counter.
The division ratio definition is given by:
N = 16384 x N14 + 8192 x N13 + … + 4 x N2 + 2 x N1 + N
0
Maximum Ratio 32767
Minimum Ratio 17
Where N0 … N14 are the different bits for frequency
information.
The counter may be used for any ratio between 17 and
32767 and reloads correctly as long as its output frequency
does not exceed 1.0 MHz.
The data transfer between latches A and B (signal TDI) is
also initiated by any start condition on the I2C bus.
At power–on, the whole bus receiver is reset and the
programmable divider is set to a counting ration of N = 256 or
higher.
The first I2C message must be sent only when the
POWER ON RESET is completed.
The Prescaler
The prescaler has a preamplifier which guarantees high
input sensitivity.
The Phase Comparator
The phase comparator is phase and frequency sensitive
and has very low output leakage current in the high
impedance state.
The Tuning Voltage Amplifier
The amplifier is designed for very low noise, low input bias
current and high power supply rejection. The positive input is
biased internally. The tuning voltage amplifier needs an
external NPN with a pull–up resistor to generate the tuning
voltage.
The amplifier can be switched “Off” through bit T8. When
bit T8 is “One”, the amplifier is “Off”. The tuning voltage is
then pulled high by the external pull–up resistor.
Figure 5 shows a possible filter arrangement. The
component values depend very much on the application
(tuner characteristic, reference frequency, etc.).
As a starting point for optimization, the component values
in Figure 5 may be used for 7.8125 kHz reference frequency
in a multiband TV tuner.
The Oscillator
The oscillator uses a 4.0 MHz crystal tied to ground “or
between Pins 2 and 3” through a series capacitor. The crystal
oscillates in its series resonance mode.
The voltage at Pin 13 XTAL1, has low amplitude and low
harmonic distortion.
Pin XTAL2 is the internal ground of the oscillator; it is
connected internally to ground Pin 13 (15).
Page 7
MC44824/25
7
MOTOROLA ANALOG IC DEVICE DATA
1.0 nF
÷
8
Pres
Figure 5. Typical Tuner Applications
109711
B
4
B
2
B
1
B
0
12 pF
3.2/4.0 MHz
Gnd
15
16 1
B III
VHF
UHF
AGC
V
TUN
33 V
Phase
Comp
Program
Divider
2.7 V
Mixer
B. P. Filter
Antenna
Filter
Oscillator
IF
12
5.0 V
5
4
8
2
Osc &
Ref Div
F
osc
SCL
SDA
CA
Bus
Rec
22 nF
47 k
330 p
(See Note)
47 nF
NOTE: C2 = 330 pF minimum is required for stability.
External Switching
MC44825
14
6
B
7
3
13
1.0 nF
1.0 nF
÷
8
Pres
986
B7B2B
1
12 pF
3.2/4.0 MHz
Gnd
13
16 1
B III
VHF
UHF
AGC
V
TUN
33 V
Phase
Comp
Program
Divider
2.7 V
Mixer
B. P. Filter
Antenna
Filter
Oscillator
IF
10
5.0 V
5
4
7
2
Osc &
Ref Div
F
osc
SCL
SDA
CA
Bus
Rec
22 nF
47 k
330 p
(See Note)
47 nF
MC44824
12
3
11
1.0 nF
22 k
22 k
Page 8
MC44824/25
8
MOTOROLA ANALOG IC DEVICE DATA
D SUFFIX
PLASTIC PACKAGE
CASE 751B–05
(SO–16)
ISSUE J
D SUFFIX
PLASTIC PACKAGE
CASE 751A–03
(SO–14)
ISSUE F
OUTLINE DIMENSIONS
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
–B–
G
P 7 PL
14 8
71
M
0.25 (0.010) B
M
S
B
M
0.25 (0.010) A
S
T
–T–
F
R
X 45
SEATING
PLANE
D 14 PL
K
C
J
M
_
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
18
16 9
SEATING
PLANE
F
J
M
R
X 45
_
G
8 PLP
–B–
–A–
M
0.25 (0.010) B
S
–T–
D
K
C
16 PL
S
B
M
0.25 (0.010) A
S
T
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
____
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
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INTERNET: http://Design–NET.com 51 Ting Ko k Road, Tai Po, N.T., Hong Kong. 852–26629298
MC44824/D
*MC44824/D*
◊
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