Datasheet MC10231FN, MC10231L, MC10231P Datasheet (Motorola)

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SEMICONDUCTOR TECHNICAL DATA

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The MC10231 is a dual master–slave type D flip–flop. Asynchronous Set (S)

Q1

Q

Q2

Q

1

2

(C

) inputs. Each flip–flop

E

2

3

V

= PIN 1

CC1

V

= PIN 16

CC2
VEE= PIN 8

15

14

and Reset (R) override Clock (CC) and Clock Enable
may be clocked separately by holding the common clock in the low state and
using the enable inputs for the clocking function. If the common clock is to be
used to clock the flip–flop, the Clock Enable

inputs must be in the low state. In
this case, the enable inputs perform the function of controlling the common
clock.

The output states of the flip–flop change on the positive transition of the
clock. A change in the information present at the data (D) input will not affect the
output information at any other time due to master–slave construction.

PD= 270 mW typ/pkg (No Load)
tpd= 2 ns typ

t

= 225 MHz typ

Tog

tr, tf= 2.0 ns typ (20%–80%)

LOGIC DIAGRAM

S1 5

D1 7

C

6

E1

R1 4

CC 9

R2 13

11

C

E2
D2 10



CERAMIC PACKAGE

PLASTIC PACKAGE

DIP

PIN ASSIGNMENT

V

CC1

Q1
Q1
R1

S1

C

E1

D1

V

EE

1
2
3
4
5
6
7
8

L SUFFIX

CASE 620–10

P SUFFIX

CASE 648–08

FN SUFFIX

PLCC

CASE 775–02

16
15
14
13
12
11
10

V
Q2
Q2
R2
S2
C
D2
C

9

CC2

E2

C

S2 12

CLOCKED TRUTH TABLE R–S TRUTH TABLE

C D Q

L X Q
H L L L H H
H H H H L L

C = CE + CC. A clock H is a clock
transition from a low to a high state.

3/93

 Motorola, Inc. 1996

n+1

n

3–202

R S Q

L L Q

H H N.D.

N.D. = Not Defined

Pin assignment is for Dual–in–Line Package.

For PLCC pin assignment, see the Pin Conversion

T ables on page 6–11 of the Motorola MECL Data

Book (DL122/D).

n+1

n

REV 5

MC10231

Under

ELECTRICAL CHARACTERISTICS

Test Limits

Pin

Characteristic Symbol

Power Supply Drain Current I
Input Current I

Output Voltage Logic 1 V

Output Voltage Logic 0 V

Threshold Voltage Logic 1 V

Threshold Voltage Logic 0 V

Switching Times (50Ω Load)
Clock Input

Propagation Delay t

Rise Time (20 to 80%) t
Fall Time (20 to 80%) t

Set Input ns

Propagation Delay t

Reset Input ns

Propagation Delay t

Setup Time t
Hold Time t
Toggle Frequency (Max) f

* Individually test each input; apply V

[

Output level to be measured after a clock pulse has been applied to the C

E

inH

I

inL

OH

OL

OHA

OLA

9+2–

t

6+2+

2+
2–

5+2+

t

12+15+

t

5+3–

t

12+14–

4+2–

t

13+15–

t

4+3–

t

13+14+

setup

hold

tog

ILmin

Under

Test

8 72 52 65 72 mAdc
4

5
6
7
9

4, 5*

6, 7, 9*

2

2

[

3

3

[

2

2

[

3

3

[

2
2

2 0.9 3.3 1.0 1.3 3.1 1.0 3.6
2 0.9 3.3 1.0 1.3 3.1 1.0 3.6

2

15

3

14

2

15

3

14

7 1.5 1.0 1.5 ns
7 0.9 0.75 0.9 ns
2 200 200 225 200 MHz

to pin under test.

–30°C +25°C +85°C

Min Max Min Typ Max Min Max

–1.060
–1.060

–1.890
–1.890

–1.080
–1.080

1.5

1.5

1.1

1.1

1.1

1.1

1.1

1.1

1.1

1.1

650
650
350
350
460

–0.890
–0.890

–1.675
–1.675

–1.655
–1.655

3.4

3.4

3.4

3.4

3.4

3.4

3.4

3.4

3.4

3.4

0.5

0.5

–0.960
–0.960

–1.850
–1.850

–0.980
–0.980

1.5

1.5

1.1

1.1

1.1

1.1

1.1

1.1

1.1

1.1

Input (Pin 6)

E

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

2.0

410
410
220
220
290

–0.810
–0.810

–1.650
–1.650

–1.630
–1.630

3.3

3.3

3.3

3.3

3.3

3.3

3.3

3.3

3.3

3.3

V

IHmax

V

ILmin

–0.890
–0.890

–1.825
–1.825

–0.910
–0.910

1.6

1.6

1.2

1.2

1.2

1.2

1.2

1.2

1.2

1.2

–0.700
–0.700

–1.615
–1.615

–1.595
–1.595

410
410
220
220
290

3.7

3.7

3.7

3.7

3.7

3.7

3.7

3.7

3.7

3.7

Unit

µAdc

µAdc

Vdc

Vdc

Vdc

Vdc

ns

DL122 — Rev 6

3–203 MOTOROLAMECL Data

MC10231

Und

(VCC)

ELECTRICAL CHARACTERISTICS (continued)

TEST VOLTAGE VALUES (Volts)

@ Test Temperature V

–30°C –0.890 –1.890 –1.205 –1.500 –5.2
+25°C –0.810 –1.850 –1.105 –1.475 –5.2
+85°C –0.700 –1.825 –1.035 –1.440 –5.2

Pin

Characteristic Symbol

Power Supply Drain Current I
Input Current I

Output Voltage Logic 1 V

Output Voltage Logic 0 V

Threshold Voltage Logic 1 V

Threshold Voltage Logic 0 V

Switching Times (50Ω Load)
Clock Input

Propagation Delay t

Rise Time (20 to 80%) t
Fall Time (20 to 80%) t

Set Input

Propagation Delay t

Reset Input

Propagation Delay t

Setup Time t
Hold Time t
Toggle Frequency (Max) f

* Individually test each input applying VIH or VIL to input under test.

[

Output level to be measured after a clock pulse has been applied to the C

Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.

E

inH

I

inL

OH

OL

OHA

OLA

9+2–

t

6+2+

2+
2–

5+2+

t

12+15+

t

5+3–

t

12+14–

4+2–

t

13+15–

t

4+3–

t

13+14+

setup

hold

tog

er

Test

8 8 1, 16
4

5
6
7
9

4, 5*

6, 7, 9*

2

2

[

3

3

[

2

2

[

3

3

[

2
2

2 7 9 2 8 1, 16
2 9 2 8 1, 16

2

15

3

14

2

15

3

14

7 6, 7 2 8 1, 16
7 6, 7 2 8 1, 16
2 * * 6 2 8 1, 16

IHmax

TEST VOLTAGE APPLIED TO PINS LISTED BELOW

V

IHmax

4
5
6
7
9

5
7

5
7

+1.11Vdc Pulse In Pulse Out –3.2 V +2.0 V

7

6
9

6
9

V

ILminVIHAmin

V

ILminVIHAmin

*
*

Input (Pin 6)

E

12
12

13
13

V

ILAmax

V

ILAmax

5
7

5
7

9
6

5
5

4
4

9

9

2
2

2

15

3

14

2

15

3

14

V

IHmax

V

ILmin

V

EE

V

EE

8
8
8
8
8

8
8

8
8

8
8

8
8

8
8

8
8

8
8
8
8

8
8
8
8

Gnd

1, 16
1, 16
1, 16
1, 16
1, 16

1, 16
1, 16

1, 16
1, 16

1, 16
1, 16

1, 16
1, 16

1, 16
1, 16

1, 16
1, 16

1, 16
1, 16
1, 16
1, 16

1, 16
1, 16
1, 16
1, 16

MOTOROLA MECL Data

3–204

DL122 — Rev 6

OUTLINE DIMENSIONS

FN SUFFIX

PLASTIC PLCC PACKAGE

CASE 775–02

ISSUE C

MC10231

–L–

20 1

Z

C

G

G1

0.010 (0.250) N

S

T

–N–

L–M

Y BRK

–M–

W

V

A

0.007 (0.180) N

0.007 (0.180) N

R

E

0.004 (0.100)

–T–

J

VIEW S

S

S

D

D

M

M

SEATING
PLANE

0.007 (0.180) N

B

0.007 (0.180) N

U

M

S

L–M

T

M

S

S

L–M

T

S

Z

0.010 (0.250) N

X

G1

S

S

L–M

T

S

VIEW D–D

S

L–M

T

L–M

T

S

S

S

0.007 (0.180) N

H

M

S

L–M

T

S

K1

K

0.007 (0.180) N

F

M

S

L–M

T

S

VIEW S

DL122 — Rev 6

NOTES:

1. DATUMS –L–, –M–, AND –N– DETERMINED
WHERE TOP OF LEAD SHOULDER EXITS PLASTIC
BODY AT MOLD PARTING LINE.

2. DIMENSION G1, TRUE POSITION TO BE
MEASURED AT DA TUM –T–, SEATING PLANE.

3. DIMENSIONS R AND U DO NOT INCLUDE MOLD
FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250)
PER SIDE.

4. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

5. CONTROLLING DIMENSION: INCH.

6. THE PACKAGE TOP MAY BE SMALLER THAN THE
PACKAGE BOTTOM BY UP TO 0.012 (0.300).
DIMENSIONS R AND U ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY
EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS,
GATE BURRS AND INTERLEAD FLASH, BUT
INCLUDING ANY MISMATCH BETWEEN THE TOP
AND BOTTOM OF THE PLASTIC BODY.

7. DIMENSION H DOES NOT INCLUDE DAMBAR
PROTRUSION OR INTRUSION. THE DAMBAR
PROTRUSION(S) SHALL NOT CAUSE THE H
DIMENSION TO BE GREATER THAN 0.037 (0.940).
THE DAMBAR INTRUSION(S) SHALL NOT CAUSE
THE H DIMENSION TO BE SMALLER THAN 0.025
(0.635).

3–205 MOTOROLAMECL Data

DIM MIN MAX MIN MAX

A 0.385 0.395 9.78 10.03
B 0.385 0.395 9.78 10.03
C 0.165 0.180 4.20 4.57
E 0.090 0.110 2.29 2.79
F 0.013 0.019 0.33 0.48
G 0.050 BSC 1.27 BSC
H 0.026 0.032 0.66 0.81
J 0.020 ––– 0.51 –––
K 0.025 ––– 0.64 –––
R 0.350 0.356 8.89 9.04
U 0.350 0.356 8.89 9.04
V 0.042 0.048 1.07 1.21
W 0.042 0.048 1.07 1.21
X 0.042 0.056 1.07 1.42
Y ––– 0.020 ––– 0.50
Z 2 10 2 10

____

G1 0.310 0.330 7.88 8.38
K1 0.040 ––– 1.02 –––

MILLIMETERSINCHES

MC10231

–T–

SEATING
PLANE

18

OUTLINE DIMENSIONS

L SUFFIX

CERAMIC DIP PACKAGE

–A–

16 9

–B–

18

C

N

E

F

G

16 PLD

0.25 (0.010) T

M

S

A

–A–

916

B

F

C

S

–T–

H

G

D

16 PL

0.25 (0.010) T

K

M

A

CASE 620–10

ISSUE V

L

K

16 PLJ

P SUFFIX

PLASTIC DIP PACKAGE

CASE 648–08

ISSUE R

SEATING
PLANE

J

M

M

0.25 (0.010) T

M

L

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.

4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.

DIM MIN MAX MIN MAX

A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C ––– 0.200 ––– 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC 1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC 2.54 BSC
H 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31

S

B

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

2. CONTROLLING DIMENSION: INCH.

3. DIMENSION L TO CENTER OF LEADS WHEN

4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.

5. ROUNDED CORNERS OPTIONAL.

L 0.300 BSC 7.62 BSC
M 0 15 0 15

____

N 0.020 0.040 0.51 1.01

Y14.5M, 1982.

FORMED PARALLEL.

DIM MIN MAX MIN MAX

A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC 2.54 BSC
H 0.050 BSC 1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01

MILLIMETERSINCHES

MILLIMETERSINCHES

____

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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
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applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
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Opportunity/Affirmative Action Employer.

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MOTOROLA MECL Data

3–206

*MC10231/D*

◊

MC10231/D

DL122 — Rev 6