Datasheet MC10135P, MC10135FN, MC10135L Datasheet (Motorola)

Page 1

SEMICONDUCTOR TECHNICAL DATA
   
The MC10135 is a dual master–slave dc coupled J–K flip–flop. Asynchro– nous set (S) and reset (R) are provided. The set and reset inputs override the clock.
A common clock is provided with separate J static, the J
–K inputs do not effect the output.
The output states of the flip–flop change on the positive transition of the clock.
PD= 280 mW typ/pkg (No Load)
f
= 140 MHz typ
Tog
tpd= 3.0 ns typ
tr, tf= 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
7
J1
6
K1
R1 4
C 9
S2 12
10
J2
K2 11
Q1
Q1
Q2
Q2
–K inputs. When the clock is
2
3
V
= PIN 1
CC1
V
= PIN 16
CC2 VEE= PIN 8
15
14

CERAMIC PACKAGE
PLASTIC PACKAGE
DIP
PIN ASSIGNMENT
V
CC1
Q1 Q1 R1
S1 K1
J1
V
EE
1 2 3 4 5 6 7 8
L SUFFIX
CASE 620–10
P SUFFIX
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
16 15 14 13 12 11 10
V Q2 Q2 R2 S2 K2 J2 C
9
CC2
R–S TRUTH TABLE CLOCK J–K TRUTH TABLE*
R S Q
L
L H H
N.D. = Not Defined *Output states change on positive
3/93
Motorola, Inc. 1996
R2 13
L H L H
n+1
Q
H
L
N.D.
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
J K Q
n
3–22
L
H
L
H
transition of clock for J condition present.
L
L H H
n+1
Q
L
H
Q
–K input
n
n
REV 5
Book (DL122/D).
Page 2
MC10135
Under
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50 Load) Clock Input
Propagation Delay t
Rise Time (20 to 80%) t2+, t Fall Time (20 to 80%) t2–, t
Set Input ns
Propagation Delay t
Reset Input ns
Propagation Delay t
Setup Time t Hold Time t Toggle Frequency (Max) f
1. Individually test each input; apply V
2. Individually test each input; apply V
3. Output level to be measured after a clock pulse has been applied to the C
4. Output level to be measured after a clock pulse has been applied to the CE Input (Pin 6)
E
inH
I
inL
OH
OL
OHA
OLA
9+2+
t
9+2–
5+2+
t
12+15+
t
5+3–
t
12+14–
4+2–
t
4+3–
t
13+15–
t
13+14+
setup
hold
tog
IHmax ILmin
3+ 3–
Under
Test
8 75 54 68 75 mAdc
6,7,9,10,1 1
4,5,12,13 4,5,6,7,9,
10,11,12,13
2
2 (3.)
3
3 (3.)
2
2 (4.)
3
3 (4.)
2
2 2, 3 1.1 4.8 1.1 2.0 4.5 1.1 4.7 2, 3 1.1 4.8 1.1 2.0 4.5 1.1 4.7
2
15
3
14
2
3
15 14
7 2.5 2.5 1.0 2.5 ns
7 1.5 1.5 1.0 2.5 ns
2 125 125 140 125 MHz
to pin under test.
to pin under test.
–30°C +25°C +85°C
Min Max Min Typ Max Min Max
0.5
0.5
–1.060 –1.060
–1.890 –1.890
–1.080 –1.080
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
425 620
–0.890 –0.890
–1.675 –1.675
–1.655 –1.655
5.0
5.0
5.6
5.6
5.6
5.6
5.6
5.6
5.6
5.6
0.5
0.5
–0.960 –0.960
–1.850 –1.850
–0.980 –0.980
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
1.8
Input (Pin 6)
E
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
265 390
–0.810 –0.810
–1.650 –1.650
–1.630 –1.630
4.5
4.5
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
V
IHmax
V
ILmin
V
IHAmax
V
ILAmin
–0.890 –0.890
–1.825 –1.825
–0.910 –0.910
0.3
0.3 –0.700
–0.700 –1.615
–1.615
–1.595 –1.595
1.8
1.8
1.8 5.2
1.8
1.8
1.8
1.8
265 390
4.6
4.6
5.2
5.2
5.2
5.2
5.2
5.2
5.2
Unit
µAdc
µAdc
Vdc
Vdc
Vdc
Vdc
ns
DL122 — Rev 6
3–23 MOTOROLAMECL Data
Page 3
MC10135
Und
(VCC)
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature V
–30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50 Load) Clock Input
Propagation Delay t
Rise Time (20 to 80%) t2+, t Fall Time (20 to 80%) t2–, t
Set Input
Propagation Delay t
Reset Input
Propagation Delay t
Setup Time t Hold Time t Toggle Frequency (Max) f
1. Individually test each input; apply V
2. Individually test each input; apply V
3. Output level to be measured after a clock pulse has been applied to the C
4. Output level to be measured after a clock pulse has been applied to the C Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
E
inH
I
inL
OH
OL
OHA
OLA
9+2+
t
9+2–
3+ 3–
5+2+
t
12+15+
t
5+3–
t
12+14–
4+2–
t
4+3–
t
13+15–
t
13+14+
setup
hold
tog
to pin under test.
IHmax
to pin under test.
ILmin
er
Test
8 8 1, 16
6,7,9,10,1 1
4,5,12,13 4,5,6,7,9,
10,11,12,13
2
2 (3.)
3
3 (3.)
2
2 (4.)
3
3 (4.)
2
2 2, 3 9 2, 3 8 1, 16 2, 3 9 2, 3 8 1, 16
2
15
3
14
2
3
15 14
7 6, 9 2 8 1, 16
7 6, 9 2 8 1, 16
2 9 2 8 1, 16
IHmax
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
V
IHmax
Note 1. Note 1.
5 6
5 6
6
6
V
ILminVIHAmin
V
ILminVIHAmin
Note 2. Note 2.
Input (Pin 6)
E
Input (Pin 6)
E
V
ILAmax
V
ILAmax
5 8
5 8
Pulse In Pulse Out –3.2 V +2.0 V
9 9
5
12
5
12
4
4 13 13
2 2
2
15
3
14
2
3 15 14
V
IHmax
V
ILmin
V
IHAmax
V
ILAmin
V
EE
V
EE
8 8
8 8
8 8
8 8
8
8
8 8
8 8 8 8
8 8 8 8
Gnd
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
MOTOROLA MECL Data
3–24
DL122 — Rev 6
Page 4
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
MC10135
–L–
20 1
Z
C
G
G1
0.010 (0.250) N
S
T
–N–
L–M
Y BRK
–M–
W
V
A
0.007 (0.180) N
0.007 (0.180) N
R
E
0.004 (0.100)
–T–
J
VIEW S
S
S
D
D
M
M
SEATING PLANE
0.007 (0.180) N
B
0.007 (0.180) N
U
M
S
L–M
T
M
S
S
L–M
T
S
Z
0.010 (0.250) N
X
G1
S
S
L–M
T
S
VIEW D–D
S
L–M
T
L–M
T
S
S
S
0.007 (0.180) N
H
M
S
L–M
T
S
K1
K
0.007 (0.180) N
F
M
S
L–M
T
S
VIEW S
DL122 — Rev 6
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DA TUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
3–25 MOTOROLAMECL Data
DIM MIN MAX MIN MAX
A 0.385 0.395 9.78 10.03 B 0.385 0.395 9.78 10.03 C 0.165 0.180 4.20 4.57 E 0.090 0.110 2.29 2.79 F 0.013 0.019 0.33 0.48 G 0.050 BSC 1.27 BSC H 0.026 0.032 0.66 0.81 J 0.020 ––– 0.51 ––– K 0.025 ––– 0.64 ––– R 0.350 0.356 8.89 9.04 U 0.350 0.356 8.89 9.04 V 0.042 0.048 1.07 1.21 W 0.042 0.048 1.07 1.21 X 0.042 0.056 1.07 1.42 Y ––– 0.020 ––– 0.50 Z 2 10 2 10
____
G1 0.310 0.330 7.88 8.38 K1 0.040 ––– 1.02 –––
MILLIMETERSINCHES
Page 5
MC10135
–T–
SEATING PLANE
18
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
–A–
16 9
–B–
18
C
N
E
F
G
16 PLD
0.25 (0.010) T
M
S
A
–A–
916
B
F
C
S
–T–
H
G
D
16 PL
0.25 (0.010) T
K
M
A
CASE 620–10
ISSUE V
L
K
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
SEATING PLANE
J
M
M
16 PLJ
0.25 (0.010) T
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY.
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93 B 0.240 0.295 6.10 7.49 C ––– 0.200 ––– 5.08 D 0.015 0.020 0.39 0.50 E 0.050 BSC 1.27 BSC F 0.055 0.065 1.40 1.65 G 0.100 BSC 2.54 BSC H 0.008 0.015 0.21 0.38 K 0.125 0.170 3.18 4.31
M
S
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
M
L 0.300 BSC 7.62 BSC M 0 15 0 15
____
N 0.020 0.040 0.51 1.01
Y14.5M, 1982.
FORMED PARALLEL.
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01
MILLIMETERSINCHES
MILLIMETERSINCHES
____
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MOTOROLA MECL Data
3–26
*MC10135/D*
MC10135/D
DL122 — Rev 6
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