Datasheet MC10134P, MC10134FN, MC10134L Datasheet (Motorola)

Page 1

SEMICONDUCTOR TECHNICAL DATA
3–17
REV 5
Motorola, Inc. 1996
3/93
   
The MC10134 is a dual multiplexer with clocked D type latches. Each latch may be clocked separately by holding the common clock in the low state, and using the clock enable inputs for the clocking function. If the common clock is to be used to clock the latch, the clock enable (CE
) inputs must be in the low state. In this mode, the enable inputs perform the function of controlling the common clock (CC).
The data select inputs determine which data input is enabled. A high (H) level on the A0 input enables data input D12 and a low (L) level on the A0 input enables data input D1 1. A high (H) level on the A1 input enables data input D22 and a low (L) level on the A1 input enables data input D21. Any change on the data input will be reflected at the outputs while the clock is low. The outputs are latched on the positive transition of the clock. While the clock is in the high state, a change in the information present at the data inputs will not affect the output information.
PD= 225 mW typ/pkg (No Load) tpd= 3.0 ns typ
tr, tf= 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
V
CC1
= PIN 1
V
CC2
= PIN 16
VEE= PIN 8
11A1
2Q1
4D11
5D12
10CEO
7C
C
9CE1
13D21
12D22
3Q1
15 Q2
14 Q
2
6A0
TRUTH TABLE
C A0 D11 D12 Q
n+1
L L L X L L L H X H L H X L L L H X H H H X X X Q
n
C = C
E
+ C
C

DIP
PIN ASSIGNMENT
V
CC1
Q1
Q1 D11 D12
A0
C
C
V
EE
V
CC2
Q2 Q2 D21 D22 A1 CEO CE1
16 15 14 13 12 11 10
9
1 2 3 4 5 6 7 8
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
Page 2
MC10134
MOTOROLA MECL Data
DL122 — Rev 6
3–18
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Under
–30°C +25°C +85°C
Characteristic Symbol
Under
Test
Min Max Min Typ Max Min Max
Unit
Power Supply Drain Current I
E
8 60 55 60 mAdc
Input Current I
inH
4 5 6 7
10
460 460 425 460 425
290 290 265 290 265
290 290 265 290 265
µAdc
I
inL
4* 0.5 0.5 0.3 µAdc
Output Voltage Logic 1 V
OH
2 2
–1.060 –1.060
–0.890 –0.890
–0.960 –0.960
–0.810 –0.810
–0.890 –0.890
–0.700 –0.700
Vdc
Output Voltage Logic 0 V
OL
2 2
–1.890 –1.890
–1.675 –1.675
–1.850 –1.850
–1.650 –1.650
–1.825 –1.825
–1.615 –1.615
Vdc
Threshold Voltage Logic 1 V
OHA
2 2
–1.080 –1.080
–0.980 –0.980
–0.910 –0.910
Vdc
Threshold Voltage Logic 0 V
OLA
2 2
–1.655 –1.655
–1.630 –1.630
–1.595 –1.595
Vdc
Switching Times (50 Load) ns Propagation Delay Data
Clock
Select
t
4+2+
t
10–2+ t
6+2+
2 2 2
1.0
1.0
1.0
3.5
6.0
4.8
1.0
1.0
1.0
3.3
5.7
4.6
1.0
1.0
1.0
3.6
6.3
5.0
Setup Time Data
Select
t
setup
t
setup
2 2
2.5
3.5
2.5
3.5
2.5
3.5
Hold Time Data
Select
t
hold
t
hold
2 2
1.5
1.0
1.5
1.0
1.5
1.0
Rise Time (20 to 80%) t
2+
2 1.5 3.7 1.5 3.5 1.5 3.8
Fall Time (20 to 80%) t
2–
2 1.5 3.7 1.5 3.5 1.5 3.8
* All other inputs tested in the same manner.
Page 3
MC10134
3–19 MOTOROLAMECL Data
DL122 — Rev 6
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature V
IHmax
V
ILmin
V
IHAminVILAmax
V
EE
–30°C –0.890 –1.890 –1.205 –1.500 –5.2 +25°C –0.810 –1.850 –1.105 –1.475 –5.2 +85°C –0.700 –1.825 –1.035 –1.440 –5.2
Pin
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
Characteristic Symbol
Und
er
Test
V
IHmax
V
ILmin
V
IHAminVILAmax
V
EE
(VCC)
Gnd
Power Supply Drain Current I
E
8 8 1, 16
Input Current I
inH
4 5 6 7
10
4 5 6 7
10
8 8 8
1, 16 1, 16 1, 16
I
inL
4* 4 8 1, 16
Output Voltage Logic 1 V
OH
2 2
4
5,6
6,7,10
7,10
8 8
1, 16 1, 16
Output Voltage Logic 0 V
OL
2 2
6
4,6,7,10
5,7,10
8 8
1, 16 1, 16
Threshold Voltage Logic 1 V
OHA
2 2
6
6,7,10
7,10
4 5
8 8
1, 16 1, 16
Threshold Voltage Logic 0 V
OLA
2 2
6
6,7,10
7,10
4 5
8 8
1, 16
1, 16 Switching Times (50 Load) +1.11 V +0.31 V Pulse In Pulse Out –3.2 V +2.0 V Propagation Delay Data
Clock
Select
t
4+2+
t
10–2+ t
6+2+
2 2 2
4 5
6,7,10
7
7,10
4
10
6
2 2 2
8 8 8
1, 16
1, 16
1, 16 Setup Time Data
Select
t
setup
t
setup
2 2
5
6,7
7,11
4,10 6,10
2 2
8 8
1, 16
1, 16 Hold Time Data
Select
t
hold
t
hold
2 2
5
6,7
7,11
4,10 6,10
2 2
8 8
1, 16
1, 16 Rise Time (20 to 80%) t
2+
2 6,7,10 4 2 8 1, 16
Fall Time (20 to 80%) t
2–
2 6,7,10 4 2 8 1, 16
* All other inputs tested in the same manner. Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
Page 4
MC10134
MOTOROLA MECL Data
DL122 — Rev 6
3–20
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
–M–
–N–
–L–
Y BRK
W
V
D
D
S
L–M
M
0.007 (0.180) N
S
T
S
L–M
M
0.007 (0.180) N
S
T
S
L–M
S
0.010 (0.250) N
S
T
X
G1
B
U
Z
VIEW D–D
20 1
S
L–M
M
0.007 (0.180) N
S
T
S
L–M
M
0.007 (0.180) N
S
T
S
L–M
S
0.010 (0.250) N
S
T
C
G
VIEW S
E
J
R
Z
A
0.004 (0.100)
–T–
SEATING PLANE
S
L–M
M
0.007 (0.180) N
S
T
S
L–M
M
0.007 (0.180) N
S
T
H
VIEW S
K
K1
F
G1
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.385 0.395 9.78 10.03 B 0.385 0.395 9.78 10.03 C 0.165 0.180 4.20 4.57 E 0.090 0.110 2.29 2.79 F 0.013 0.019 0.33 0.48 G 0.050 BSC 1.27 BSC H 0.026 0.032 0.66 0.81 J 0.020 ––– 0.51 ––– K 0.025 ––– 0.64 ––– R 0.350 0.356 8.89 9.04 U 0.350 0.356 8.89 9.04 V 0.042 0.048 1.07 1.21 W 0.042 0.048 1.07 1.21 X 0.042 0.056 1.07 1.42 Y ––– 0.020 ––– 0.50
Z 2 10 2 10 G1 0.310 0.330 7.88 8.38 K1 0.040 ––– 1.02 –––
____
Page 5
MC10134
3–21 MOTOROLAMECL Data
DL122 — Rev 6
OUTLINE DIMENSIONS
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
–A–
B
F
C
S
H
G
D
J
L
M
16 PL
SEATING
18
916
K
PLANE
–T–
M
A
M
0.25 (0.010) T
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74 M 0 10 0 10 S 0.020 0.040 0.51 1.01
____
L SUFFIX
CERAMIC DIP PACKAGE
CASE 620–10
ISSUE V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY.
–A–
–B–
–T–
F
E
G
N
K
C
SEATING PLANE
16 PLD
S
A
M
0.25 (0.010) T
16 PLJ
S
B
M
0.25 (0.010) T
M
L
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.750 0.785 19.05 19.93 B 0.240 0.295 6.10 7.49 C ––– 0.200 ––– 5.08 D 0.015 0.020 0.39 0.50 E 0.050 BSC 1.27 BSC F 0.055 0.065 1.40 1.65 G 0.100 BSC 2.54 BSC H 0.008 0.015 0.21 0.38 K 0.125 0.170 3.18 4.31 L 0.300 BSC 7.62 BSC M 0 15 0 15 N 0.020 0.040 0.51 1.01
____
16 9
18
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MC10134/D
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