Datasheet MC10114L, MC10114P, MC10114FN Datasheet (Motorola)

Page 1

SEMICONDUCTOR TECHNICAL DATA
  
The MC101 14 is a triple line receiver designed for use in sensing differential signals over long lines. An active current source and translated emitter follower inputs provide the line receiver with a common mode noise rejection limit of one volt in either the positive or the negative direction. This allows a large amount of common mode noise immunity for extra long lines.
Another feature of the MC101 14 is that the OR outputs go to a logic low level whenever the inputs are left floating. The outputs are each capable of driving 50 ohm transmission lines.
This device is useful in high speed central processors, minicomputers, peripheral controllers, digital communication systems, testing and instrumen– tation systems. The MC10114 can also be used for MOS to MECL interfacing and it is ideal as a sense amplifier for MOS RAM’s.
A VBB reference is provided which is useful in making the MC101 14 a Schmit trigger, allowing single–ended driving of the inputs, or other applications where a stable reference voltage is necessary . See MECL Design Handbook (HB205) pages 226 and 228.
PD= 145 mW typ/pkg tpd= 2.4 ns typ (Single Ended Input) tpd= 2.0 ns typ (Differential Input)
tr, tf= 2.1 ns typ (20% to 80%)
LOGIC DIAGRAM
10 12
13
4 5
9
V
= PIN 1
CC1
V
= PIN 16
CC2 VEE= PIN 8
VBB*
2 3
6 7
14 15
11

L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
V
CC1
A
OUT
A
OUT
A
IN
A
IN
B
OUT
B
OUT
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
1 2 3 4 5 6 7 8
Book (DL122/D).
16 15 14 13 12 11 10
V
CC2
C
OUT
C
OUT
C
IN
C
IN
V
BB
B
IN
B
9
IN
*VBB to be used to supply bias to the MC10114 only and bypassed (when used) with
0.01 µF to 0.1 µF capacitor to ground (0 V). VBB can source < 1.0 mA.
When the input pin with the bubble goes positive, its respective output pin with bubble goes positive.
3/93
Motorola, Inc. 1996
3–53
REV 5
Page 2
MC10114
Under
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Reference Voltage V Common Mode Rejection
Test
Switching Times (50 Load) Min Max Min Typ Max Min Max ns Propagation Delay t
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
inH
I
CBO
OH
OL
OHA
OLA
BB
V
OH
V
OL
4+2+
t
4–2–
t
4+3–
t
4–3+
2+
t
3+ 2–
t
3–
E
Under
Test
8 39 28 35 39 mAdc 4 70 45 45 µAdc 4 1.5 1.0 1.0 µAdc 2
3 2
3 2
3 2
3
11 –1.420 –1.280 –1.350 –1.230 –1.295 –1.150 Vdc
2 3
2 3
2 2 3 3
2 3
2 3
–30°C +25°C +85°C
Min Max Min Typ Max Min Max
–1.060 –1.060
–1.890 –1.890
–1.080 –1.080
–1.060 –1.060
–1.890 –1.890
1.0
1.0
1.0
1.0
1.5
1.5
1.5
1.5
–0.890 –0.890
–1.675 –1.675
–1.655 –1.655
–0.890 –0.890
–1.675 –1.675
4.4
4.4
4.4
4.4
3.8
3.8
3.8
3.8
–0.960 –0.960
–1.850 –1.850
–0.980 –0.980
–0.960 –0.960
–1.850 –1.850
1.0
1.0
1.0
1.0
1.5
1.5
1.5
1.5
2.4
2.4
2.4
2.4
2.1
2.1
2.1
2.1
–0.810 –0.810
–1.650 –1.650
–1.630 –1.630
–0.810 –0.810
–1.650 –1.650
4.0
4.0
4.0
4.0
3.5
3.5
3.5
3.5
–0.890 –0.890
–1.825 –1.825
–0.910 –0.910
–0.890 –0.890
–1.825 –1.825
0.9
0.9
0.9
0.9
1.5
1.5
1.5
1.5
–0.700 –0.700
–1.615 –1.615
–1.595 –1.595
–0.700 –0.700
–1.615 –1.615
4.3
4.3
4.3
4.3
3.7
3.7
3.7
3.7
Unit
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
MOTOROLA MECL Data
3–54
DL122 — Rev 6
Page 3
ELECTRICAL CHARACTERISTICS (continued)
From
Und
TEST VOLTAGE VALUES (Volts)
@ Test Temperature V
–30°C –0.890 –1.890 –1.205 –1.500 +25°C –0.810 –1.850 –1.105 –1.475 +85°C –0.700 –1.825 –1.035 –1.440
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Reference Voltage V Common Mode Rejection Test V
Switching Times (50 Load) Pulse In Pulse Out Propagation Delay t
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
inH
I
inL
OH
OL
OHA
OLA
BB OH
V
OL
4+2+
t
4–2–
t
4+3–
t
4–3+
2+
t
3+ 2–
t
3–
E
Test
8 4, 9, 12 5, 10, 13 mAdc 4 4 9, 12 5, 10, 13 µAdc 4 9, 12 5, 10, 13 µAdc 2
3 2
3 2
3 2
3
11 5, 10, 13 Vdc
2 3
2 3
2 2 3 3
2 3
2 3
IHmax
er
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
V
IHmax
4
9, 12 9, 12
4
9, 12 9, 12
V
ILminVIHAminVILAmax
V
ILminVIHAminVILAmax
9, 12
4 4
9, 12 9, 12 4
9, 12 4
4 4 4 4
4 4
4 4
4 4 5, 10, 13
2 2 3 3
2 3
2 3
V
BB
From
Pin
11
V
BB
5, 10, 13 5, 10, 13
5, 10, 13 5, 10, 13
5, 10, 13 5, 10, 13
5, 10, 13
5, 10, 13 5, 10, 13 5, 10, 13 5, 10, 13
5, 10, 13 5, 10, 13
5, 10, 13 5, 10, 13
MC10114
Unit
Vdc
Vdc
Vdc
Vdc
Vdc
Vdc
ns
DL122 — Rev 6
3–55 MOTOROLAMECL Data
Page 4
MC10114
Und
(VCC)
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature V
–30°C +0.110 –0.890 –1.890 –2.890 –5.2 +25°C +0.190 –0.850 –1.810 –2.850 –5.2 +85°C +0.300 –0.825 –1.700 –2.825 –5.2
Pin
Characteristic Symbol
Power Supply Drain Current I Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Reference Voltage V Common Mode Rejection Test V
Switching Times (50 Load) –3.2 V +2.0 V Propagation Delay t
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
*V
= Input Logic 1 level shifted positive one volt for common mode rejection tests
IHH
V
= Input Logic 0 level shifted positive one volt for common mode rejection tests
ILH
V
= Input Logic 1 level shifted negative one volt for common mode rejection tests
IHL
V
= Input Logic 0 level shifted negative one volt for common mode rejection tests
ILL
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
inH
I
inL OH
OL
OHA
OLA
BB
OH
V
OL
4+2+
t
4–2–
t
4+3–
t
4–3+
2+
t
3+ 2–
t
3–
E
er
Test
8 8 1, 16 4 8 1, 16 4 8, 4 1, 16 2
3 2
3 2
3 2
3
11 8 1, 16
2 3
2 3
2 2 3 3
2 3
2 3
* V
IHH
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
V
* V
IHH
4 5
4 5
ILH
ILH
* V
* V
* V
IHL
* V
IHL
5 4 5 4 8
* V
ILL
* V
ILL
EE
EE
8 8
8 8
8 8
8 8
8 8
8
8 8 8 8
8 8
8 8
Gnd
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
1, 16 1, 16 1, 16 1, 16
1, 16 1, 16
1, 16 1, 16
MOTOROLA MECL Data
3–56
DL122 — Rev 6
Page 5
OUTLINE DIMENSIONS
FN SUFFIX
PLASTIC PLCC PACKAGE
CASE 775–02
ISSUE C
MC10114
–L–
20 1
Z
C
G
G1
0.010 (0.250) N
S
T
–N–
L–M
Y BRK
–M–
W
V
A
0.007 (0.180) N
0.007 (0.180) N
R
E
0.004 (0.100)
–T–
J
VIEW S
S
S
D
D
M
M
SEATING PLANE
0.007 (0.180) N
B
U
M
0.007 (0.180) N
S
L–M
T
M
S
S
L–M
T
S
Z
0.010 (0.250) N
X
G1
S
S
L–M
T
S
VIEW D–D
S
L–M
T
L–M
T
S
S
S
0.007 (0.180) N
H
M
S
L–M
T
S
K1
K
0.007 (0.180) N
F
M
S
L–M
T
S
VIEW S
DL122 — Rev 6
NOTES:
1. DATUMS –L–, –M–, AND –N– DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE.
2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DA TUM –T–, SEATING PLANE.
3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE.
4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
5. CONTROLLING DIMENSION: INCH.
6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY.
7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
3–57 MOTOROLAMECL Data
DIM MIN MAX MIN MAX
A 0.385 0.395 9.78 10.03 B 0.385 0.395 9.78 10.03 C 0.165 0.180 4.20 4.57 E 0.090 0.110 2.29 2.79 F 0.013 0.019 0.33 0.48 G 0.050 BSC 1.27 BSC H 0.026 0.032 0.66 0.81 J 0.020 ––– 0.51 ––– K 0.025 ––– 0.64 ––– R 0.350 0.356 8.89 9.04 U 0.350 0.356 8.89 9.04 V 0.042 0.048 1.07 1.21 W 0.042 0.048 1.07 1.21 X 0.042 0.056 1.07 1.42 Y ––– 0.020 ––– 0.50 Z 2 10 2 10
____
G1 0.310 0.330 7.88 8.38 K1 0.040 ––– 1.02 –––
MILLIMETERSINCHES
Page 6
MC10114
–T–
SEATING PLANE
18
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
–A–
16 9
–B–
18
C
N
E
F
G
16 PLD
0.25 (0.010) T
M
S
A
–A–
916
B
F
C
S
–T–
H
G
D
16 PL
0.25 (0.010) T
K
M
A
CASE 620–10
ISSUE V
L
K
P SUFFIX
PLASTIC DIP PACKAGE
CASE 648–08
ISSUE R
SEATING PLANE
J
M
M
16 PLJ
0.25 (0.010) T
L
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY.
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93 B 0.240 0.295 6.10 7.49 C ––– 0.200 ––– 5.08 D 0.015 0.020 0.39 0.50 E 0.050 BSC 1.27 BSC F 0.055 0.065 1.40 1.65 G 0.100 BSC 2.54 BSC H 0.008 0.015 0.21 0.38 K 0.125 0.170 3.18 4.31
M
S
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
M
L 0.300 BSC 7.62 BSC M 0 15 0 15
____
N 0.020 0.040 0.51 1.01
Y14.5M, 1982.
FORMED PARALLEL.
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55 B 0.250 0.270 6.35 6.85 C 0.145 0.175 3.69 4.44 D 0.015 0.021 0.39 0.53 F 0.040 0.70 1.02 1.77 G 0.100 BSC 2.54 BSC H 0.050 BSC 1.27 BSC J 0.008 0.015 0.21 0.38 K 0.110 0.130 2.80 3.30 L 0.295 0.305 7.50 7.74
M 0 10 0 10
S 0.020 0.040 0.51 1.01
MILLIMETERSINCHES
MILLIMETERSINCHES
____
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MOTOROLA MECL Data
3–58
*MC10114/D*
MC10114/D
DL122 — Rev 6
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